CN102246275A - Methods of forming multi-doped junctions on a substrate - Google Patents

Methods of forming multi-doped junctions on a substrate Download PDF

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CN102246275A
CN102246275A CN2008801322471A CN200880132247A CN102246275A CN 102246275 A CN102246275 A CN 102246275A CN 2008801322471 A CN2008801322471 A CN 2008801322471A CN 200880132247 A CN200880132247 A CN 200880132247A CN 102246275 A CN102246275 A CN 102246275A
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substrate
zone
diffusion
temperature
minutes
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CN102246275B (en
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苏尼尔·沙阿
马尔科姆·阿博特
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Innovalight Inc
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic System
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

A method of forming a multi-doped junction on a substrate is disclosed. The method includes providing the substrate doped with boron, the substrate including a first substrate surface with a first surface region and a second surface region. The method also includes depositing a first set of nanoparticles on the first surface region, the first set of nanoparticles including a first dopant. The method further includes heating the substrate in an inert ambient to a first temperature and for a first time period creating a first densified film, and further creating a first diffused region with a first diffusion depth in the substrate beneath the first surface region. The method also includes exposing the substrate to a diffusion gas including phosphorous at a second temperature and for a second time period creating a PSG layer on the first substrate surface and further creating a second diffused region with a second diffusion depth in the substrate beneath the second surface region, wherein the first diffused region is proximate to the second diffused region. The method further includes exposing the substrate to a oxidizing gas at a third temperature and for a third time period, wherein a SiO2 layer is formed between the PSG layer and the substrate surface, wherein the first diffusion depth is substantially greater than the second diffusion depth.

Description

On substrate, form the method for many doped junctions
Technical field
This disclosure relates generally to p-n junction, and relates to the method that is used for forming many doped junctions on substrate particularly.
Background technology
Semiconductor has formed the basis that hyundai electronics is learned.Because have the physical characteristic that can optionally change and control between conduction and insulation, semiconductor is necessary in most of modern electrical equipments (for example, computer, portable phone, photovoltaic cell etc.).
One of the most useful semiconductor structure is a p-n junction.As the essential structure piece of many electronic devices and electric equipment, p-n junction trends towards in one direction conduction current and block electric current on another direction, and trends towards producing electric field.This last characteristic is useful for the application of drawing electric charge (as solar cell).
In typical solar cell, absorbed light generally will produce electron-hole pair.Afterwards, electronics in electric field (or built-in electromotive force) on the p-n junction p type side can attracted to n type zone (being doped with phosphorus usually) and repel mutually with p type zone (being doped with boron usually), and the hole on the p-n junction n type side can attracted to p type zone and repel mutually with n type zone in electric field.Usually, n type zone and/or p type zone can comprise the relative doping content of varying level separately respectively, usually are expressed as n-, n+, n++, p-, p+, p++ etc.Built-in electromotive force depends on two doped level between the adjacent layer usually, and therefore electric field strength depends on two doped level between the adjacent layer usually.
Most of solar cells generally are formed on the silicon wafer that is doped with first dopant (normally boron), this first dopant forms absorbent body area, the second counter-doping agent (normally phosphorus) thus diffusion forms emitter region on this absorbent body area, to finish p-n junction.After adding passivation and antireflecting coating, can add Metal Contact part (finger on emitter and busbar, and at the liner (pad) at the absorber back side) so that draw the electric charge that is produced.Particularly, emitter dopants concentration must at carrier collection and with the contacting both and be optimized of metal electrode.
Generally speaking, the low concentration of the dopant atom in the emitter region will cause the two low again in conjunction with (so solar battery efficiency is higher) and with the electrically contacting of the difference of metal electrode.On the contrary, the high concentration of dopant atom will cause the two high again in conjunction with (reducing the efficient of solar cell) and with the low resistance ohmic contact of metal electrode.Usually, in order to reduce manufacturing cost, generally use single diffuse dopants to form emitter, the concentration of dopant is selected as the compromise between combination again and the ohmic contact.Therefore, the potential efficient of solar cell (being converted into the percentage of the sunlight of electricity) has been lowered.
A solution is to use binary doped or emitter optionally.Selective emitter uses at low second heavily doped region (having same dopant type) that is optimized that contacts in conjunction with first lightly doped region that is optimized and at the low resistance ohmic metal again.Yet the structure of selective emitter may be difficult to finish in a step diffusion process, and may relate to a plurality of masking steps, has therefore increased manufacturing cost.In addition, owing to generally between highly doped emitter region and low-doped emitter region, do not have visual border, may be difficult so the Metal Contact part is snapped on the highly doped zone of previous deposition.
As emitter region, the deposition of BSF (back surface field) also may have problems.BSF generally is the zone that is positioned at rear surface of solar cell, and it tends to make the minority carrier in the absorbent body area to repel mutually with the back of the body surface of wafer and the high recombination region territory at metallized area place.Usually can use with the dopant of those used same types in absorbent body area and form BSF, in this case, the concentration of the dopant atom among this BSF is chosen as the concentration that is higher than the absorbent body area that is used for mixing, therefore produces potential barrier with carrying on the back between the surface at the wafer body.
In addition, in typical solar battery structure, BSF forms with aluminium (or material of other depositions), generally at first it is screen-printed on the back side of solar cell, and in through furnace, fires jointly afterwards with front metal contact (the silver-colored paste by silk screen printing forms usually).Typically, the silicon atom in the wafer tends in aluminium diffusion and recrystallization subsequently, thereby the aluminium atom is attached in the silicon crystal.Yet although make relatively easily, the thermal coefficient of expansion of aluminium (about 24 μ m/m ℃) is much higher than silicon (about 3 μ m/m ℃).Therefore, be tending towards taking place wafer bending.Though with the Al BSF of silk screen printing realized charge carrier again in conjunction with aspect certain minimizing, yet still have overleaf significantly again in conjunction with taking place, this tends to reduce the efficient of solar cell.
Alternatively, can by with absorbent body area in the diffusion of dopant atom (counter-doping agent) of those opposite types of using will carry on the back surface passivation.In this case, set up floating junction in the rear side of substrate, verified this also provides effective passivation.Generally must use second diffusion zone to come to provide ohmic contact to the absorbent body area of solar cell.
At last, might use local heavily doped zone only on the zonule on back of the body surface, to form ohmic contact, and in other zones with surface passivation layer (SiN for example x, TiO 2, SiO 2) reduce combination again.In this case, these superficial layers have not only reduced the binding site again at the silicon face place, and the fixed charge that minority carrier and surface are repelled mutually also is provided.Be similar to the formation of high efficiency emitter (for example selective emitter), effectively the formation of BSF is usually directed to many treatment steps and therefore too high for the common cost of manufacturing.
In view of the foregoing, provide a kind of optimization method that on substrate, forms many doped junctions to make us wishing.
Summary of the invention
The present invention relates to the method that forms many doped junctions on substrate in one embodiment.This method comprises provides the substrate that is doped with boron, and this substrate comprises first substrate surface, and this first substrate surface has first surface zone and second surface zone.Described method comprises also that with first group of nanoparticle deposition on described first surface zone, this first group of nano particle comprises first dopant.Described method further is included under the inert environments and described substrate is heated to first temperature and lasting very first time section, thereby produce first dense film, and further produce first diffusion zone, have first diffusion depth in the substrate of this first diffusion zone under described first surface zone.Described method also is included under second temperature and is exposed in the diffusion gas that comprises phosphorus described substrate and lasting second time period, thereby on described first substrate surface, produce the PSG layer, and further produce second diffusion zone, have second diffusion depth in the substrate of this second diffusion zone under described second surface zone, wherein said first diffusion zone is adjacent with described second diffusion zone.Described method further is included under the 3rd temperature and is exposed in the oxidizing gas described substrate and lasting the 3rd time period, wherein forms SiO between described PSG layer and described substrate surface 2Layer, wherein said first diffusion depth is fully greater than described second diffusion depth.
Description of drawings
By way of example but not explained the present invention in the mode of restriction, same in the drawings reference number refers to similar key element, and wherein in the figure of accompanying drawing:
Figure 1A to Fig. 1 F shows one group of reduced graph according to a kind of optimization method of the present invention, and this method is used for using the while diffusing step to form many doped junctions on substrate;
Fig. 2 A to Fig. 2 G shows one group of reduced graph according to a kind of optimization method of the present invention, and this method is used for the selective emitter that diffusing step formation at the same time has nano particle BSF;
Fig. 3 A to Fig. 3 G shows one group of reduced graph according to a kind of optimization method of the present invention, and this method is used for the selective emitter that diffusing step at the same time forms the back of the body surface with backplate contact that area reduces and passivation;
Fig. 4 shows the reduced graph that has the solar cell of selective emitter and aluminium BSF according to of the present invention;
Fig. 5 shows the reduced graph that has the solar cell of selective emitter and dense film back side contact according to of the present invention;
Fig. 6 shows the reduced graph that the reflectivity according to the reflectivity of the nanometer particle film with densification of the present invention and the crystalline silicon on the silicon chip compares;
Fig. 7 A to Fig. 7 C shows the reduced graph according to the different electric characteristics of the zones of different of selective emitter of the present invention; And
Fig. 8 shows the reduced graph of one group of I-V curve that the solar cell that will only have a light dope emitter according to the present invention and the solar cell with selective emitter compare.
Embodiment
Describe the present invention in detail referring now to preferred implementations more of the present invention as shown in the drawing.In the following description, many details have been listed so that provide to thorough of the present invention.Yet what it should be apparent to those skilled in the art that is to implement the present invention without in these details some or all.In other cases, in order not cause unnecessary coverage, well-known treatment step and/or structure are not described in detail the present invention.
As discussed previously, on substrate, form many doped junctions (as being used for solar cell) and often have problems, because require diffusion process and a plurality of patterning step of a plurality of separation usually, thereby increased manufacturing cost.
In a kind of favourable mode, can be with diffusing step simultaneously by coming on substrate, to form many doped junctions in conjunction with IV family nano particle as the doping in high-concentration dopant agent layer and diffuse dopants source.Under the situation of selective emitter, first diffusion zone is identical dopant type (both is the n type or is the p type) with second diffusion zone, and under the situation of BSF, diffusion zone can form with arbitrary dopant type (n type and/or p type).Selective emitter and BSF also form in the diffusing step at the same time.
Generally speaking, nano particle be at least on one dimension less than a kind of microscopic particles of 100nm.Term " IV family nano particle " typically refers to the IV family nano particle of the hydrogen end-blocking with the average diameter between about 1nm to 100nm, and comprises silicon, germanium, carbon or their combination.Term " IV family nano particle " also comprises the IV family nano particle that is doped.With the massive material of the constant physical property (for example fusion temperature, boiling temperature, density, conductivity etc.) of tending to have irrelevant its size (＞100nm) compare.
Because their size is little, nano particle also tends to be difficult to operation.Therefore, in a kind of favourable mode, the nano particle of assembling can be suspended among colloidal dispersion or the colloid (for example ink), so that transport and preserve described nano particle.Usually, the colloidal dispersion of IV family nano particle is possible, because the interactional intensity of this particle surface and solvent is enough to overcome density contrast, density contrast can cause material to sink in liquid usually or float.That is the less bigger easier dispersion of nano particle of nano particle.
Generally speaking, IV family nano particle is under vacuum or be transferred under the environment of the basic anaerobic of inertia among the colloidal dispersion.In addition, can use the method and apparatus (as sonication method, high-shear mixer and high pressure/high shear homogenizer) of Dispersion of Particles to help nano particle in selected solvent or the dispersion in the solvent mixture.
The example of solvent comprises alcohols, aldehydes, ketone, carboxylic acids, ester class, amine, organosiloxane class, halogenated hydrocarbon and other varsols.In addition, these solvents can mix, so that optimize the physical characteristic such as viscosity, density, polarity etc.
In addition, for better with IV family nanoparticulate dispersed in colloidal dispersion, can form the nano particle end-capping group by being added with organic compounds such as alcohols, aldehydes, ketone, carboxylic acids, ester class, amine and organosiloxane class.Alternatively, can among gas being joined plasma chamber, come the on-the-spot end-capping group that adds.These end-capping groups can preheat middle removal subsequently in the process of sintering process or at proper lower temperature before sintering process.
For example, the large volume end-capping reagent that is suitable for using in the preparation of the IV of end-blocking family semiconductor nanoparticle comprises C4-C8 side chain alcohols, ring-type alcohols, aldehydes and ketone, as the tert-butyl alcohol, isobutanol, cyclohexanol, methyl cyclohexanol, hutanal, isobutylaldehyde, cyclohexanone, also include the organic siloxane class, as methoxyl group (three (TMS) silane) (MTTMSS), three (TMS) silane (TTMSS), decamethyltetrasiloxane (DMTS) and trimethyl methoxy silane (TMOS).
In case prepare, can be applied to colloidal dispersion on the substrate and through heat-treated, so that IV family nano particle is sintered to fine and close conducting film and makes diffuse dopants among wafer.The example of painting method includes but not limited to: roller coat covers, the coating of slit die formula, intaglio printing, flexographic plate roll printing and ink jet printing method etc.
In addition, the selectivity of the IV family nano particle that the different structure of the IV family nano particle colloidal dispersion of doping can be by that mix, unadulterated and/or different doping is mixed and is prepared.For example, can prepare the different formulations of the IV family nano particle colloidal dispersion of mixing, wherein the dopant level of Jie certain layer is to prepare by mixing with unadulterated IV family nano particle of will mixing, to reach the requirement of this layer.Alternatively, the IV family nano particle colloidal dispersion of described mixing can be used for the compensates for substrate defective, as the passivation of oxygen atom, so that reduce undesirable energy state.
Referring now to Figure 1A to Fig. 1 F,, one group of reduced graph has illustrated the method according to a kind of optimization of the present invention, this method is used for using the while diffusing step to form many doped junctions on substrate, as on the solar cell with selective emitter (using identical dopant type) or BSF (using different dopant type).
In Figure 1A, use on the surface such as the silicon chip 102 that roller coat covers, the painting method of the coating of slit die formula, intaglio printing, flexographic plate roll printing, ink jet printing method etc. is deposited on one group of nano particle 100 that mixes doping.After the nanoparticle deposition of mixing, for remove residual solvent can stoving temperature (preferably from 100 ℃ to 500 ℃, more preferably about 350 ℃ and about 450 ℃ and most preferably about 400 ℃) under cure described silicon chip.This cure can be under air ambient or under inert environments (as with nitrogen, argon gas or forming gas) carry out.
In Figure 1B, the silicon chip 102 of doping is positioned in the sintering furnace (for example quartz tube furnace, through furnace etc.).Randomly, can with extra heating process before spreading with particle presintering, so that improve the low formation of the ohmic contact of combination again.For example, the nano particle 100 that this group can be mixed sintering temperature (preferably between about 500 ℃ and about 1000 ℃, more preferably between about 750 ℃ and 850 ℃ and most preferably about 800 ℃) down sintering and lasting sintering time (preferably between about 5 seconds and about 2 minutes, more preferably between about 5 seconds and about 20 seconds and most preferably under inert environments (as nitrogen, argon gas etc.) about 15 seconds) so that the formation dense film.In addition, when this dense film formation, the dopant atom in the nano particle 100 that this group is mixed also may begin diffusion in the silicon chip 102 that mixes, thereby forms first initial doping (higher concentration of dopant) regional 112a.
In addition, under the situation of solar cell, BSF can be put on the back of the body surface of the silicon chip of doping, so that the minority carrier in the absorbent body area is repelled mutually with the high recombination region territory at wafer back surface and metallized area place.Can form BSF with Aluminum Paste (or material of other depositions), generally at first it is screen-printed on the back side of solar cell, and in through furnace, fire jointly afterwards with the front metal contact.
In Fig. 1 C, beginning is diffusing step simultaneously.The silicon chip 102 that mixes is loaded onto in the diffusion furnace and is heated to diffusion temperature (preferably continuing about 15 minutes at about 800 ℃ between lasting about 10 minutes and about 20 minutes and most preferably between about 750 ℃ and about 850 ℃ between lasting about 5 minutes and about 30 minutes and more preferably between about 700 ℃ and about 1000 ℃).
During this period of time, nitrogen is flowed through as carrier gas be filled with low concentration liquid POCl 3(phosphorous oxychloride), O 2Gas and N 2The bubbler of gas is handled gas 101 so that form.
In Fig. 1 D, in the thermal process of Fig. 1 C, O 2Molecule and POCl 3Molecule reacts and forms on the silicon chip 102 that mixes and comprise P 2O 5The PSG of (phosphorous oxides) (phosphosilicate glass) layer 106.Cl as the accessory substance generation 2Metal impurities in the silicon chip 102 of gas and doping react and are removed.Along with the continuation of this chemical process, phosphorous diffusion enters in the silicon wafer and forms second (lower doping content) zone 104 of mixing.
In Fig. 1 E, use O 2And N 2Form second oxidizing gas 109.At first furnace chamber is heated to oxidizing temperature (preferably between about 800 ℃ and about 1100 ℃, more preferably between about 950 ℃ and about 1050 ℃ and most preferably about 1000 ℃).Because the silicon atom in silicon chip 102 surfaces of oxygen and doping reacts, formed SiO afterwards 2(silicon dioxide) layer 107 (approximately 10-50nm) is (at N 2: O 2Under about 1: 1 mixture).
In case reached enough SiO 2Thickness for example after 15 to 30 minutes, then stops O 2Gas flow.Afterwards at N 2Under the environment quartz chamber is heated between about 900 ℃ and 1100 ℃, dopant atom in the nano particle 100 that this group is mixed enters the more depths of the silicon chip 102 of doping so that order about originally, thereby forms first final doping (higher doping content) regional 112b.That is to say, and by SiO 2Layer 107 prevention enter dopant atom difference in the silicon chip 102, in PSG layer 106, and the dopant atom in the nano particle 100 that this group is mixed can continue to diffuse among the first doped region 112b.Therefore, the diffusion depth of the first final doped region 112b can be fully greater than the diffusion depth of second doped region, 104 correspondences, thereby the feasible minimizing possibility that is penetrated into the shunting that is caused in the substrate of slight counter-doping by front metal contact (as shown in Figure 4).
In Fig. 1 F, if desired, then can PSG layer 206 be removed with batch formula HF wet-cleaned platform (wet bench) or other devices that is fit to.
Referring now to Fig. 2 A to Fig. 2 G,, one group of reduced graph has illustrated the method according to a kind of optimization of the present invention, and this method is used at the same time that diffusing step forms the selective emitter that has nano particle BSF.
In Fig. 2 A, use on the front surface such as the silicon chip 202 that roller coat covers, the painting method of the coating of slit die formula, intaglio printing, flexographic plate roll printing, ink jet printing method etc. will highly doped n type nano-particle layer 200 be deposited on the p doping.The deposition after, for remove residual solvent can first stoving temperature (preferably from 100 ℃ to 500 ℃, more preferably about 350 ℃ and about 450 ℃ and most preferably about 400 ℃) under cure described silicon chip.Curing can be under air ambient or under inert environments, and (as with nitrogen, argon gas or forming gas) carries out.
In Fig. 2 B, same use such as on the back of the body surface that roller coat covers, the painting method of the coating of slit die formula, intaglio printing, flexographic plate roll printing, ink jet printing method etc. will highly doped p type nano-particle layer 220 be deposited on the silicon chip 202 that p mixes subsequently so that form BSF (and so that with back metal contact (backplate grid) formation ohmic contact).
Afterwards, for remove in the highly doped p type nano-particle layer 220 residual solvent second stoving temperature (preferably from 100 ℃ to 500 ℃, more preferably about 350 ℃ and about 450 ℃ and most preferably about 400 ℃) under cure the silicon chip 202 that p mixes.This cure can be under air ambient or under inert environments (as with nitrogen, argon gas or forming gas) carry out.
In Fig. 2 C, beginning is diffusing step simultaneously.The silicon chip 202 that p mixes is positioned in the stove (for example quartz tube furnace, through furnace etc.).Randomly, can with extra heating process before spreading with particle presintering, so that improve the low formation of the ohmic contact of combination again.
Therefore, then the nano particle 220 that mixes of nano particle 200 that the n type can be mixed and p type simultaneously under the inert environments with the sintering temperature sintering so that each self-forming dense film (preferably between about 500 ℃ and about 1000 ℃, more preferably between about 750 ℃ and 850 ℃ and most preferably about 800 ℃), and at inert environments (N for example 2, Ar, forming gas) down lasting sintering time (preferably between about 5 seconds and about 2 minutes, more preferably between about 5 seconds and about 20 seconds and most preferably about 15 seconds).
When separately dense film forms, n dopant atom in the nano particle 200 that this group n type mixes begins in the silicon chip 202 that p mixes diffusion forming the area with high mercury 212a that initial n mixes, and the p dopant atom in the nano particle 220 that this group p type mixes also begins in the silicon chip 202 that p mixes diffusion to form the area with high mercury 222a that initial p mixes.
In Fig. 2 D, the silicon chip 202 that p mixes is heated to diffusion temperature (preferably continuing between about 5 minutes and about 30 minutes between about 700 ℃ and about 1000 ℃, more preferably continuing about 15 minutes at about 800 ℃ between lasting 10 minutes and 20 minutes and most preferably between about 750 ℃ and about 850 ℃), in during this period of time, nitrogen is flowed through as carrier gas be filled with low concentration liquid POCl 3(phosphorous oxychloride), O 2Gas and N 2The bubbler of gas is handled gas 230 so that form.
In Fig. 2 E, along with the continuation in the thermal process shown in Fig. 2 D, O 2Molecule and POCl 3Molecule reacts to form positive PSG layer 232 and back side PSG layer 234 on the silicon chip 202 that mixes at p, and the two includes P 2O 5(phosphorous oxides).Cl as the accessory substance generation 2Metal impurities in the silicon chip 202 that gas and p mix react and are removed.Along with the continuation of this chemical process, phosphorous diffusion enters in the silicon wafer to form the low concentration region 204 that positive n mixes.In addition, the nano-particle layer 201 that mixes in the p type is patterned in the solar battery structure of (not shown), and phosphorus does not have to spread in the zone of the nano-particle layer 201 that the p type mixes in silicon wafer usually.In addition, the phosphorus of low concentration (n type) spreads in BSF layer 220, and this BSF layer has boron (p type) concentration of dopant that improves greatly.
In Fig. 2 F, use O 2And N 2Form second oxidizing gas 236.With furnace chamber be heated to oxidizing temperature (preferably between about 800 ℃ and about 1100 ℃, more preferably between about 950 ℃ and 1050 ℃ and most preferably about 1000 ℃) continue between about 5 minutes and 30 minutes.
Along with the silicon atom in the silicon chip 302 of oxygen and p doping reacts, in the silicon wafer 202 that p mixes, form positive SiO 2(silicon dioxide) layer 207 and back side SiO 2(silicon dioxide) layer 240, each about naturally 10nm is to about 50nm.In case reached enough SiO 2Thickness then stops O 2Gas flow.
Afterwards at N 2Under the environment quartz chamber is heated to diffusion temperature and lasting diffusion time of section (preferably between about 5 minutes and about 60 minutes, more preferably between 15 and 30 minutes and most preferably, continue about 22 minutes) between about 900 ℃ and 1100 ℃, so that order about the more depths that dopant atom (originally in the nano-particle layer 220 that nano-particle layer 200 that the n type mixes and p type mix) enters the silicon chip 202 that p mixes, thereby form the area with high mercury 222b that area with high mercury 212a that final n mixes and final p mix.As discussed previously, the dopant atom in positive PSG layer 232 is by the SiO in front 2Layer 207 stops it further to diffuse in silicon chip 202 that p mixes, and overleaf the dopant atom in the PSG layer 234 by the SiO at the back side 2Layer 240 stops in its silicon chip 202 that further diffuses into the p doping.Therefore, the diffusion depth of low concentration region 204 correspondences that the diffusion depth of the area with high mercury 212b that final n mixes can be fully mixed greater than the n in front, thereby the feasible minimizing possibility that is penetrated into the shunting that is caused in the substrate of slight counter-doping by front metal contact (not shown).
In Fig. 2 G, if desired, then can positive PSG layer 232 and back side PSG layer 234 be removed with batch formula HF wet-cleaned platform or other devices that is fit to.
Referring now to Fig. 3 A to Fig. 3 G,, one group of reduced graph has illustrated the method according to a kind of optimization of the present invention, and this method is used for the selective emitter that diffusing step at the same time forms the back of the body surface with backplate contact that area reduces and passivation.
In Fig. 3 A, use as the front surface of the silicon chip 302 that roller coat covers, the painting method of the coating of slit die formula, intaglio printing, flexographic plate roll printing, ink jet printing method etc. is deposited on highly doped n type nano-particle layer 300 the p doping on.After the nanoparticle deposition of mixing, for remove residual solvent can first stoving temperature (preferably from about 100 ℃ to about 500 ℃, more preferably about 350 ℃ and about 450 ℃ and most preferably about 400 ℃) under cure described silicon chip.
This cure can be under air ambient or under inert environments (as with nitrogen, argon gas or forming gas) carry out.The nano particle 300 that this group n type mixes will form the highly doped part of described selective emitter.
In Fig. 3 B, then will highly doped p type nano-particle layer 301 be deposited on the back of the body surface of the silicon chip 302 that p mixes so that the back side contact that the formation area reduces.Forming after the ohmic contact, the back side contact that described area reduces is general also to be used as roller coat covers, the painting method of the coating of slit die formula, intaglio printing, flexographic plate roll printing, ink jet printing method etc. deposits to mate backplate grid (not shown) (the many wide lines of 120um that for example meet at right angles with the wide busbar line of a pair of 500um and separate with the 2mm spacing) by heavy doping.Generally must use SiO 2, SiN xOr other technologies are with zone 303 passivation of the remaining back side, so that minimize owing to the loss of combination again.
As previously mentioned, after nano-particle layer 301 depositions that nano-particle layer 300 that the n type mixes and p type mix, for remove residual solvent can second stoving temperature (preferably from about 100 ℃ to about 500 ℃, more preferably about 350 ℃ and about 450 ℃ and most preferably about 400 ℃) under cure the silicon chip 302 of p doping.This cure can be under air ambient or under inert environments (as with nitrogen, argon gas or forming gas) carry out.
In Fig. 3 C, the silicon chip 302 that p mixes is positioned in the stove (for example quartz tube furnace, through furnace etc.).Randomly, can with extra heating process before spreading with particle presintering, so that improve the low formation of the ohmic contact of combination again.
Therefore, afterwards the nano particle 301 that mixes of nano particle 300 that the n type can be mixed and p type simultaneously carry out sintering with sintering temperature under the inert environments so that each self-forming dense film (preferably between about 500 ℃ and about 1000 ℃, more preferably between about 750 ℃ and 850 ℃ and most preferably about 800 ℃), and at inert environments (N for example 2, Ar, forming gas) down lasting sintering time (preferably between about 5 seconds and about 2 minutes, more preferably between about 5 seconds and about 20 seconds and most preferably about 15 seconds).
When dense film formation separately, n dopant atom in the nano particle 300 that this group n type mixes begins in the silicon chip 302 that p mixes diffusion forming the area with high mercury 312a that initial n mixes, and the p dopant atom in the nano particle 301 that this group p type mixes also begins in the silicon chip 302 that p mixes diffusion to form the area with high mercury 313a that initial p mixes.
In Fig. 3 D, beginning is diffusing step simultaneously.The silicon chip 302 that p mixes is loaded in the diffusion furnace and is heated to diffusion temperature (preferably continuing between about 5 minutes and about 30 minutes between about 700 ℃ and about 1000 ℃, more preferably continuing about 15 minutes at about 800 ℃ between lasting 10 minutes and 20 minutes and most preferably between about 750 ℃ and about 850 ℃), in during this period of time, nitrogen is flowed through as carrier gas be filled with low concentration liquid POCl 3(phosphorous oxychloride), O 2Gas and N 2The bubbler of gas is handled gas 330 so that form.
In Fig. 3 E, along with the continuation in the thermal process shown in Fig. 3 D, O 2Molecule and POCl 3Molecule reacts to form positive PSG layer 332 and back side PSG layer 334 on the silicon chip 302 that mixes at p, and the two includes P 2O 5(phosphorous oxides).Cl as the accessory substance generation 2Metal impurities in the silicon chip 302 that gas and p mix react and are removed.Along with the continuation of this chemical process, phosphorous diffusion enters in the silicon wafer low concentration region 322 that mixes with the n that forms the low concentration region 304 that positive n mixes and the back side.As discussed previously, dopant concentration is tended to make again in conjunction with minimizing.
In Fig. 3 F, use O 2And N 2Form second oxidizing gas 336.With furnace chamber be heated to oxidizing temperature (preferably between about 800 ℃ and about 1100 ℃, more preferably between about 950 ℃ and about 1050 ℃ and most preferably about 1000 ℃) continue between about 5 minutes and 30 minutes.
Along with the silicon atom in the silicon chip 302 of oxygen and p doping reacts, in the silicon wafer 302 that p mixes, form positive SiO 2(silicon dioxide) layer 307 and back side SiO 2(silicon dioxide) layer 340, each about naturally 10nm is to about 50nm.In case reached enough SiO 2Thickness then stops O 2Gas flow.
Afterwards at N 2Under the environment quartz chamber is heated to diffusion temperature and lasting diffusion time of section (preferably between about 5 minutes and about 60 minutes, more preferably between 15 and 30 minutes and most preferably, continue about 22 minutes) between about 900 ℃ and 1100 ℃, so that order about the more depths that dopant atom (originally in the nano-particle layer 301 that nano-particle layer 300 that the n type mixes and p type mix) enters the silicon chip 302 that p mixes, thereby form the area with high mercury 313b that area with high mercury 312b that final n mixes and final p mix.As discussed previously, the dopant atom in positive PSG layer 332 is by positive SiO 2Layer 307 stops it further to diffuse in silicon chip 302 that p mixes, and overleaf the dopant atom in the PSG layer 334 by back side SiO 2Layer 340 stops in its silicon chip 302 that further diffuses into the p doping.
In Fig. 3 G, if desired, then can positive PSG layer 332 and back side PSG layer 334 be removed with batch formula HF wet-cleaned platform or other devices that is fit to.
Referring now to Fig. 4,, reduced graph has illustrated the solar cell that has selective emitter and aluminium BSF according to of the present invention.As discussed previously, n++ (highly doped) nano particle dense film 412 and n++ diffusion zone 414 form on p-(light dope) silicon chip 410 and sintering.Afterwards with POCl 3Process forms n-diffusion zone 408.On n-diffusion zone 408, form SiO afterwards 2Layer 406 so that help front surface passivation with silicon chip 410, and is controlled at POCl 3The diffusion of phosphorus atoms in the process.
SiN xLayer 404 is at SiO 2Form on the front surface of layer 406.Picture SiO 2Layer 406 is the same, SiN xLayer 404 helps the surface of passivation silicon chips 410, thereby makes the wafer body be subjected to the minimum contamination of external source and reduce the again combination of minority carrier in the surface of silicon chip 410.In addition, SiN xLayer 404 can be optimized to reduce the reflectivity of solar cell front surface, thereby substantially improves efficient and therefore improve performance.On silicon chip 410, form front metal contact 402 and BSF/ back metal contact 416 afterwards.Front metal contact 402 generally is by comprising Ag powder (70wt% is to 80wt%), lead borosilicate glass PbO-B 2O 3-SiO 2The Ag paste of (1wt% is to 10wt%) and organic component (15wt% is to 30wt%) forms.BSF/ back metal contact 416 is generally formed by aluminium, and is configured to produce electric field, and the back of the body surface that this electric field repels minority carrier and therefore the makes minority carrier influence of combination again minimizes.In addition, generally Ag liner (not shown) is applied on the BSF/ back metal contact 416, thereby so that assists welding to be interconnected in the module.
Referring now to Fig. 5,, reduced graph has illustrated the solar cell that has selective emitter and dense film back side contact according to of the present invention.N++ (highly doped) nano particle dense film 512, n++ diffusion zone 514, p++ nano particle dense film back side contact 520 and p++ nano particle diffusion zone 518 are to form and sintering on p-(light dope) silicon chip 510.Afterwards with POCl 3Process forms positive n-diffusion zone 508 and back side n-diffusion zone 526.On n diffusion zone 508, form SiO afterwards 2Layer 506.Afterwards at SiO 2Form SiN on the front surface of layer 506 x504 layers.On silicon chip 510, form front metal contact 502 and back metal contact 522 with previous described Ag paste afterwards.
Referring now to Fig. 6,, Fig. 6 is the reduced graph that the reflectivity of the reflectivity of compact nanometer particle film and the crystalline silicon on silicon chip is compared according to the present invention.As mentioned above, these two surfaces all are coated with the nitride layer of thermal growth oxide and PECVD deposition.Wavelength in nanometer is shown on transverse axis 602, and the percentage of reflectivity is shown on the longitudinal axis 604.
As mentioned above, use SiN usually xReduce the reflectivity of solar cell and therefore improve its efficient.For the light of any setted wavelength of directive solar cell, (at this mainly is SiN to the hyaline layer that percentage and light passed of this reflectivity xLayer) the thickness and the absorption feature of surface below are relevant.
Under the situation of the selective emitter of the diffusion described in Figure 1A to Fig. 1 F (not having fine and close nanometer particle film), for light dope emitter region and heavy doping emitter region for the two, SiN xThe thickness of layer is identical, and surface below all is crystalline silicon (or the crystalline silicon that is covered by thermic grow oxide thin layer), is identical therefore.Therefore, visually the front metal contact is snapped on the highly doped zone and may have problems.Yet in the present invention, described surface below is different and visually is different therefore.Though lightly doped emitter region 606 has the optical characteristics (being extinction coefficient and refractive index) of crystalline silicon, compact nanometer particle film 608 has the different optical characteristics similar slightly with the optical characteristics of amorphous silicon.At this, the reflectivity of lightly doped emitter region 606 has the minimal reflection point near the wavelength of 600nm, and this produces a kind of outward appearance of blueness, and the reflectivity of compact nanometer particle film 608 does not have tangible minimum value, and this produces a kind of outward appearance of white.Therefore, because this difference on optical characteristics tends to make each surface to have different colors, and high contrast is arranged between these colors, so visually the front metal contact is snapped on the highly doped zone and can more easily finish.
Referring now to Fig. 7 A to Fig. 7 C,, reduced graph has illustrated the different electric characteristics according to the zones of different of selective emitter of the present invention.At this, one group of nano particle substrate of preparation on slight boron doped silicon chip is measured 4 point probes of sheet resistance so that assist.In the first of this substrate surface, form the nano particle dense film 704 of phosphorus doping, and on second portion, form the phosphorous diffusion zone with PSG 702.
In Fig. 7 A, measure sheet resistance 706.Sheet resistance generally is that a kind of of resistance to film with uniform thickness or layer measures, and is that unit records with Ohm/sq.At this, substrate was spread 19 minutes down at 725 ℃ 1000 ℃ of following presintering 20 seconds and with the phosphorus deposit, annealed 30 minutes down 975 ℃ of following oxidations 15 minutes and at 1000 ℃ subsequently.As can be seen, the zone that comprises the nano particle dense film has the sheet resistance between 10Ohm/sq and 20Ohm/sq, and the zone with PSG is between 120-200Ohm/sq.
In Fig. 7 B, efficiency of measurement 708.The efficient of solar cell generally is when solar cell is connected with circuit, the percentage of the energy of (from the light that absorbs to electric energy) and collection of changing.In general, the loss of solar cell can be broken down into reflection loss, thermodynamic efficiency, again in conjunction with loss and resistance electrical loss.
This term be with maximum power point divided by the light irradiance of the input under standard test condition (STC) (with W/m 2Meter) and the surface area (m of solar cell 2) ratio calculate.The STC assigned temperature is that 25 ℃ and irradiance with air quality 1.5 (AM 1.5) spectrum are 1000W/m 2Maximum power is the maximized point of product that makes electric current (I) and voltage (V).Be IxV.
At this, half substrate is printed with the nanoparticle inks pattern, afterwards 1000 ℃ of sintering 20 seconds, and second half is not applied in nanoparticle inks.Then described substrate was spread 26 minutes down at 750 ℃ with the phosphorus deposit, annealed 30 minutes down 975 ℃ of following oxidations 15 minutes and at 1000 ℃ subsequently.In this case, to be higher than 100Ohm/sq and to have in the zone of printing ink be to be lower than 60Ohm/sq to the phosphorus doping intensity in not having the zone of printing ink.As can be seen, the zone that comprises the nano particle dense film has the efficient between about 12% and about 14%, and the zone with PSG is between about 2% and about 10%.
In Fig. 7 C, measure fill factor, curve factor (FF) 710.Fill factor, curve factor is that maximum power is divided by open circuit voltage (V Oc) and short circuit current (I Sc) ratio of product.At this, half substrate is printed with the nanoparticle inks of patterning, afterwards 800 ℃ of sintering 20 seconds, and second half does not have printing ink.Then described substrate was spread 26 minutes down at 750 ℃ with the phosphorus deposit, annealed 30 minutes down 975 ℃ of following oxidations 15 minutes and at 1000 ℃ subsequently.In this case, to be higher than 75Ohm/sq and to have in the zone of printing ink be to be lower than 50Ohm/sq to the phosphorus doping intensity in not having the zone of printing ink.Under all three kinds of situations, nano silicon particles printing ink has been assisted the formation of selective doping, has wherein formed heavily doped region in applying the scope of printing ink.As can be seen, the zone that comprises the nano particle dense film has the FF between about 75% and about 80%, and the zone with PSG is between about 55% and about 20%.
Referring now to Fig. 8,, reduced graph has illustrated one group of I-V curve that solar cell that will only have the light dope emitter according to the present invention and the solar cell with selective emitter compare.In general, along with the load in the solar cell from change near short circuit (zero resistance) near the open circuit (infinitely great resistance), can draw out the I-V curve.
At this, voltage (V) illustrates on transverse axis 802, and electric current (J) illustrates on the longitudinal axis 804.Curve 806 has been described the light dope emitter solar battery, and curve 808 has been described heavy doping nano particle dense film selective emitter.Though these two batteries all have front metal contact and back metal contact as previously mentioned, light dope emitter solar battery 806 has slight, uniform concentration of dopant on whole silicon chip (comprising the zone under the front metal contact).In contrast, heavy doping nano particle dense film selective emitter 808 has heavily doped zone under the front metal contact, and has lightly doped zone basically on the remainder of this solar cell.Consequently, heavy doping nano particle dense film selective emitter 808 forms better ohm (low-resistivity) with the front metal contact and contacts, and this is corresponding to higher net efficiency.This can see by the zone on the chart 810, has reflected that heavy doping nano particle dense film is achieved this net gain in the net gain of (and therefore on efficient) on the power.
Therefore, in favourable mode, selective emitter can be formed with the nano particle dense film, make like this to reach fully high bulk lifetime and surface of good recombination current density.
For the purpose of this disclosure and unless otherwise indicated, " one " or " a kind of " (" a, an ") meaning is " one or more ".This all patents, application, list of references and publication of quoting by reference its integral body incorporate this paper into, incorporate into by reference separately as them.
Specific present invention is described with illustrative execution mode with reference to different.Yet, yet be understood that and can carry out many changes and change still within the spirit and scope of the present invention.Advantage of the present invention is included as electric equipment (as solar cell) and produces low-cost and high efficiency knot.
The invention discloses illustrative embodiments and best mode, however can to disclosed execution mode change and change still as theme of the present invention and spirit that following claim limited within.

Claims (31)

1. method that is used on substrate forming many doped junctions, described method comprises:
The substrate that is doped with boron is provided, and described substrate comprises front surface, and described front surface has first surface zone and second surface zone;
First group of nanoparticle deposition that will comprise first dopant is on described first surface zone;
Under inert environments, described substrate is heated to first temperature and lasting very first time section, produces first dense film and first diffusion zone thus, have first diffusion depth in the substrate of described first diffusion zone under described first surface zone;
Under second temperature, be exposed in the diffusion gas that comprises phosphorus described substrate and lasting second time period, on the second surface zone of described front surface, produce the PSG layer and second diffusion zone thus, have second diffusion depth in the substrate of described second diffusion zone under described second surface zone, wherein said first diffusion zone is adjacent with described second diffusion zone; And
Under the 3rd temperature, be exposed in the oxidizing gas described substrate and lasting the 3rd time period, between described PSG layer and described front surface, form SiO thus 2Layer and increase described first diffusion depth with respect to described second diffusion depth.
2. the method for claim 1, wherein said first temperature is between about 500 ℃ and about 1000 ℃.
3. the method for claim 1, wherein said first temperature is between about 750 ℃ and about 850 ℃.
4. the method for claim 1, wherein said first temperature is about 800 ℃.
5. the method for claim 1, wherein said very first time section is between about 5 seconds and about 2 minutes.
6. the method for claim 1, wherein said very first time section is between about 5 seconds and about 20 seconds.
7. the method for claim 1, wherein said very first time section is about 15 seconds.
8. the method for claim 1, wherein said diffusion gas comprises POCl 3, O 2And N 2
9. the method for claim 1, wherein said second temperature is between about 700 ℃ and about 1000 ℃, and described second time period is between about 5 minutes and about 30 minutes.
10. the method for claim 1, wherein said second temperature is between about 750 ℃ and about 850 ℃, and described second time period is between about 10 minutes and about 20 minutes.
11. the method for claim 1, wherein said second temperature are about 800 ℃, and described second time period is about 15 minutes.
12. the method for claim 1, wherein said the 3rd temperature are between about 800 ℃ and about 1100 ℃.
13. the method for claim 1, wherein said the 3rd temperature are between about 950 ℃ and about 1050 ℃.
14. the method for claim 1, wherein said the 3rd temperature are about 1000 ℃.
15. the method for claim 1, wherein said the 3rd time period is between about 15 minutes and about 30 minutes.
16. the method for claim 1, described method further are included in after the described first group of nano particle of deposition, second group of nanoparticle deposition that will comprise second dopant is on the 3rd surf zone on the back of the body surface of described substrate.
17. method as claimed in claim 16, the step of wherein said heated substrate further produce second dense film and the 3rd diffusion zone, have the 3rd diffusion depth in the substrate of described the 3rd diffusion zone under described the 3rd surf zone.
18. method as claimed in claim 17, wherein said first dopant is a phosphorus, and described second dopant is a boron.
19. the method for claim 1, described method are deposited on the first metal paste on the back of the body surface of described substrate before further being included in and being exposed to described substrate in the described diffusion gas.
20. method as claimed in claim 19, wherein after being exposed to described substrate in the described oxidizing gas, described method further comprises at least one surface passivation is deposited upon on the front surface of described substrate, and the second metal paste is deposited on described at least one surface passivation layer.
21. a method that is used for forming many doped junctions on substrate, described method comprises:
The substrate that is doped with boron is provided, and described substrate comprises front surface, and described front surface has first surface zone and second surface zone;
First group of nanoparticle deposition that will comprise first dopant is on described first surface zone;
Under first temperature, be exposed in the diffusion gas that comprises phosphorus described substrate and lasting very first time section, produce first diffusion zone, the PSG layer on the second surface zone of described front surface and second diffusion zone thus, have first diffusion depth in the substrate of described first diffusion zone under described first surface zone, and have second diffusion depth in the substrate of described second diffusion zone under described second surface zone; And
Under second temperature, be exposed in the oxidizing gas described substrate and lasting second time period, between described PSG layer and described front surface, form SiO thus 2Layer and increase described first diffusion depth with respect to described second diffusion depth.
22. method as claimed in claim 21, wherein said diffusion gas comprises POCl 3, O 2, and N 2
23. method as claimed in claim 21, wherein said first temperature are between about 700 ℃ and about 1000 ℃, and described very first time section is between about 5 minutes and about 30 minutes.
24. method as claimed in claim 21, wherein said first temperature are about 800 ℃, and described very first time section is about 15 minutes.
25. method as claimed in claim 21, wherein said second temperature are between about 800 ℃ and about 1100 ℃.
26. method as claimed in claim 21, wherein said second temperature are about 1000 ℃.
27. method as claimed in claim 21, wherein said second time period is between about 15 minutes and about 30 minutes.
28. method as claimed in claim 21, described method further is included in after the described first group of nano particle of deposition, second group of nanoparticle deposition that will comprise second dopant on the 3rd surf zone on the back of the body surface of described substrate, the counter-doping agent that wherein said second dopant is described first dopant.
29. method as claimed in claim 28, wherein said first dopant is a phosphorus, and described second dopant is a boron.
30. method as claimed in claim 21, described method further are included in after the described first group of nano particle of deposition, the first metal paste are deposited on the back of the body surface of described substrate.
31. method as claimed in claim 30, wherein after being exposed to described substrate in the described oxidizing gas, described method further comprises at least one surface passivation is deposited upon on the front surface of described substrate, and the second metal paste is deposited on described at least one surface passivation layer.
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