KR20110089291A - Methods of forming multi-doped junctions on a substrate - Google Patents

Abstract

A method of forming a multi-doped junction on a substrate is disclosed. The method includes providing a substrate doped with boron and having a first substrate surface having a first surface region and a second surface region. The method also includes depositing a first set of nanoparticles comprising a first dopant in a first surface region. The method includes heating the substrate in an inert atmosphere to a first temperature for a first time to form a first high density film and further to form a first diffusion region having a first diffusion depth in the substrate below the first surface region. It includes more. The method also exposes the substrate to a diffusion gas comprising phosphorus for a second time at a second temperature to form a PSG layer on the first substrate surface and a second having a second diffusion depth on the substrate below the second surface area. Further forming a diffusion region, wherein the first diffusion region is adjacent to the second diffusion region. The method further includes exposing the substrate to an oxidizing gas for a third time at a third temperature to form a SiO ₂ layer between the PSG layer and the substrate surface, wherein the first diffusion depth is substantially greater than the second diffusion depth. Bigger

Description

Methods of Forming Multi-Doped Junctions on a Substrate}

FIELD OF THE INVENTION The present invention relates generally to p-n junctions and, in particular, to a method of forming multiple doped junctions on a substrate.

Semiconductors form the basis of modern electronics. Semiconductors are essential for most modern electrical devices (eg, computers, cell phones, photovoltaic cells, etc.) because they possess physical properties that can be selectively changed and controlled between conduction and insulation.

One of the most useful semiconductor structures is a p-n junction. The p-n junction, the basic building block of many electronic and electrical devices, tends to conduct current in one direction, block it in the other, and form an electric field. The last property is useful in charge extraction applications such as solar cells.

In conventional solar cells, absorbed light generally produces electron-hole pairs. Next, electrons on the p-type side of the junction in the (internal potential or) electric field can be attracted to the n-type region (usually doped with phosphorus) and pushed out of the p-type region (usually doped with boron) The holes on the n-type side of the junction in the electric field can be attracted to the p-type region and pushed out of the n-type region. In general, each of the n-type region and / or p-type region may consist of relative dopant concentrations with variable levels, often represented by n, n +, n ++, p, p +, p ++, and the like. The internal potential and thus the magnitude of the electric field generally depends on the level of doping between two adjacent layers.

Most solar cells are typically formed on a silicon wafer doped with a first dopant (usually boron) that forms an absorber region, on which a second counter dopant (typically phosphorus) is formed. and diffuse to complete the pn junction. After addition of the passivation and the antireflective coating, metal contacts (pads of the emitter's fingers and busbars and absorbers) can be added to extract the generated charge. In particular, the emitter dopant concentration should be optimized for both carrier collection and contact with the metal electrode.

In general, low concentrations of dopant atoms in the emitter region result in both low recombination (and thus high solar cell efficiency) and poor electrical contact with the metal electrode. High concentrations of dopant atoms, on the other hand, result in both high recombination (low solar cell efficiency) and low resistance ohmic contact with the metal electrode. Often, in order to reduce manufacturing costs, emitters are generally formed using a single dopant diffusion, and the doping concentration is chosen by compromise of recombination and ohmic contact. Thus, the potential solar cell efficiency (the percentage of sunlight converted to electricity) is reduced.

One solution is the use of double doped emitters or optional emitters. The selective emitter uses a first low concentration doped region optimized for low recombination, and a second high concentration doped region (same dopant type) optimized for low resistance ohmic metal contact. However, selective emitter configurations can be difficult to achieve a one-step diffusion process and may involve multiple masking processes, thus increasing manufacturing costs. Also, since there is generally no visual boundary between the heavily doped emitter regions and the lightly doped emitter regions, it may be difficult to align the metal contacts to the pre-deposited heavily doped regions.

As with the emitter region, there can be problems with the deposition of BSFs (rear fields). The BSF is a region generally located behind the solar cell and tends to push minority carriers in the absorber region from the high recombination zone in the backside and metallized region of the wafer. In general, the BSF can be formed using the same type of dopant as used in the absorber region, in which case the concentration of dopant atoms in the BSF is chosen to be higher than the concentration of the dopant atoms used to dope the absorber region. A potential barrier is formed between the wafer bulk and the backside.

In addition, in conventional solar cell structures, the BSF is generally formed using aluminum (or other deposition material), generally first screen printed on the back of the solar cell, and then on the front side metal contacts (usually screen printed). Is formed of silver paste) and simultaneously fired in a belt furnace. Typically, silicon atoms in the wafer tend to diffuse in aluminum and recrystallize, incorporating aluminum atoms into silicon crystals. However, although relatively easy to manufacture, wafer bowing may occur because the coefficient of thermal expansion (around 24 μm / m ° C.) of aluminum is much larger than silicon (about 3 μm / m ° C.). And while screen printed aluminum BSF achieves a constant reduction in carrier recombination, there is still a significant recombination at the rear, which tends to reduce solar cell efficiency.

Alternatively, the backside may be passivated by diffusion of dopant atoms of the type (counter dopant) opposite to the dopant atoms used in the absorber region. In this case, a floating junction is formed on the back side of the substrate, which also seems to provide effective passivation. In general, the second diffusion region should be used to provide ohmic contact to the absorber region of the solar cell.

Finally, localized, heavily doped regions can be used to form ohmic contacts only in small regions at the back and reduce recombination of other regions by surface passivation layers (eg, SiN _x , TiO ₂ , SiO ₂ ). It is possible. In this case, both surface layers not only reduce the recombination zone of the surface of the silicon, but also provide a fixed charge that pushes minority carriers from the surface. As with the formation of high efficiency emitters (eg, selective emitters), the formation of effective BSFs often involves a number of processing steps, and therefore the manufacturing costs are significant.

In view of the foregoing, there is a need for an optimized method of forming multiple doped junctions on a substrate.

In one embodiment, the present invention is directed to a method of forming a multi-doped junction on a substrate. The method includes providing a substrate doped with boron and having a first substrate surface having a first surface region and a second surface region. The method also includes depositing a first set of nanoparticles comprising a first dopant in a first surface area. The method includes heating the substrate in an inert atmosphere to a first temperature for a first time to form a first high density film and further to form a first diffusion region having a first diffusion depth in the substrate below the first surface region. It includes more. The method also exposes the substrate to a diffusion gas comprising phosphorus for a second time at a second temperature to form a PSG layer on the first substrate surface and a second having a second diffusion depth on the substrate below the second surface area. Further forming a diffusion region, wherein the first diffusion region is adjacent to the second diffusion region. The method further includes exposing the substrate to an oxidizing gas for a third time at a third temperature to form a SiO ₂ layer between the PSG layer and the substrate surface, wherein the first diffusion depth is substantially greater than the second diffusion depth. Is bigger.

The invention is illustrated by way of example and not by way of limitation in the accompanying drawings, in which like reference numerals designate like elements.
1A-1F show a series of schematic diagrams of an optimized method of forming multiple doped junctions to a substrate by a co-diffusion step in accordance with the present invention.
2A-2G show a series of schematic diagrams of an optimized method of forming selective emitters with nanoparticle BSF in a co-diffusion step in accordance with the present invention.
3A-3G show a series of schematic diagrams of an optimized method of forming selective emitters with passivated backsides with reduced area rear electrode contacts in a co-diffusion step in accordance with the present invention.
4 shows a schematic view of a solar cell with a selective emitter and aluminum BSF in accordance with the present invention.
5 shows a schematic view of a solar cell with a selective emitter and high density membrane back contact in accordance with the present invention.
6 shows a schematic diagram comparing the reflectance of crystalline silicon with high density nanoparticle film on a silicon substrate according to the present invention.
7A-7C show schematic diagrams of various electrical properties of different regions of a selective emitter in accordance with the present invention.
8 shows a schematic of a series of IV curves comparing a solar cell with a lightly doped emitter only and a solar cell with a selective emitter according to the present invention.

The invention is now described in detail with reference to some preferred embodiments as shown in the accompanying drawings. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those skilled in the art that the present invention may be practiced without some or all of these specific details. In other instances, well known process steps and / or structures have not been described in detail in order to avoid unnecessary ambiguity of the present invention.

As mentioned above, forming multiple doped junctions on a substrate, for example for a solar cell, can be problematic because it often requires a number of separate diffusion and patterning steps to increase manufacturing costs.

In an advantageous manner, multiple doped junctions can be formed in a substrate using a co-diffusion step by including doped Group IV nanoparticles as a high concentration dopant layer and dopant diffusion source. For selective emitters, the first and second diffusion regions are the same dopant type (both n-type or p-type), but for BSF, diffusion regions are formed using both dopant types (n-type and / or p-type). Can be. Both the optional emitter and the BSF can also be formed in a co-diffusion step.

Generally, nanoparticles are microscopic particles having at least one dimension of less than 100 nm. The term “Group IV nanoparticles” generally refers to hydrogen terminated Group IV nanoparticles having an average diameter between about 1 nm and 100 nm and composed of silicon, germanium, carbon, or a combination thereof. The term “Group IV nanoparticles” is also doped in comparison to bulk materials (> 100 nm) that tend to have constant physical properties regardless of size (eg, melting temperature, boiling temperature, density, conductivity, etc.). Group IV nanoparticles.

Due to their small size, nanoparticles also tend to be difficult to handle. Thus, in an advantageous manner, the aggregated nanoparticles can be suspended and transported and stored in colloidal dispersions such as inks or colloids. In general, colloidal dispersion of group IV nanoparticles is possible because the interaction of the particle surface with the solvent is so strong as to overcome the difference in density, usually resulting in a substance submerged or suspended in a liquid. That is, smaller nanoparticles disperse more easily than larger nanoparticles.

Generally, Group IV nanoparticles are delivered to the colloidal dispersion in a vacuum or inert, substantially oxygen deficient atmosphere. In addition, particle dispersion methods and equipment such as sonication, high shear mixers, and high pressure / high shear homogenizers can be used to facilitate the dispersion of nanoparticles in selected solvents or solvent mixtures.

Examples of solvents include alcohols, aldehydes, ketones, carboxylic acids, esters, amines, organosiloxanes, halogenated hydrocarbons, and other hydrocarbon solvents. In addition, the solvents can be mixed to optimize physical properties such as viscosity, density, polarity and the like.

In addition, nanoparticle capping groups are formed by the addition of organosiloxanes as well as organic compounds such as alcohols, aldehydes, ketones, carboxylic acids, esters, and amines to improve the dispersion of group IV nanoparticles in colloidal dispersions. Can be. Alternatively, the capping group can be added in place by adding gas to the plasma chamber. This capping group can then be removed during the sintering process or upon preheating of the lower temperature just before the sintering process.

For example, bulky capping agents suitable for use in the production of capped Group IV semiconductor nanoparticles include trimethylmethoxysilane (TMOS), decamethyltetrasiloxane (DMTS), tris (trimethylsilyl) silane (TTMSS), methoxy Organosiloxanes such as (tris (trimethylsilyl) silane) (MTTMSS), cyclohexanone, isobutanal, butanal, methyl-cyclohexanol, cyclohexanol, isobutanol, ketones such as tert-butanol, aldehydes , Cyclic alcohols, C4-C8 branched alcohols.

Once prepared, the colloidal dispersion is applied to the substrate and undergoes a heat treatment, so that the group IV nanoparticles can be sintered into a high density conductive film and the dopant can be diffused onto the wafer. Examples of application methods include, but are not limited to, roll coating, slot die coating, gravure printing, flexographic drum printing, ink jet printing methods, and the like.

Additionally, various configurations of the doped Group IV nanoparticle colloidal dispersion can be prepared by selective mixing of doped, undoped and / or differently doped Group IV nanoparticles. For example, various formulations of mixed Group IV nanoparticle colloidal dispersions can be prepared, wherein the dopant levels of a particular layer of junction are formulated by mixing doped Group IV nanoparticles with undoped Group IV nanoparticles. To achieve the requirements for this layer. Alternatively, mixed Group IV nanoparticle colloidal dispersions can be used to compensate for substrate defects, such as passivation of oxygen atoms, to reduce undesirable energy states.

Referring now to FIGS. 1A-1F, multiple doping into a substrate of a solar cell, for example, with an optional emitter (using the same dopant type) or BSF (using a different dopant type) by a co-diffusion step according to the present invention. A series of schematic diagrams of optimized methods of forming a junction is shown.

In FIG. 1A, a set of doped nanoparticles 100 is deposited on the doped silicon substrate 102 surface using a roll coating, slot die coating, gravure printing, flexographic drum printing, inkjet printing method, or the like. After deposition of the doped nanoparticles, the silicon substrate may be baked at a baking temperature (preferably between 100 ° C. and 500 ° C., more preferably between about 350 ° C. and about 450 ° C., most preferably about 400 ° C.) to remove residual solvent. . Such baking may be performed in an inert atmosphere or an atmospheric atmosphere using nitrogen gas, argon gas, molding gas, or the like.

In FIG. 1B, the doped silicon substrate 102 is located in a sintering furnace (eg, quartz tube furnace, belt furnace, etc.). Optionally, the particles may be presintered prior to diffusion by an additional thermal process to improve the formation of low recombination ohmic contact. For example, the doped nanoparticle set 100 may have a sintering time (preferably between about 500 ° C. and about 1000 ° C., more preferably between about 750 ° C. and about 850 ° C., most preferably about 800 ° C.). Sintering for about 5 seconds to about 2 minutes, more preferably about 5 seconds to about 20 seconds, most preferably about 15 seconds; inert atmosphere (such as nitrogen, argon, etc.) to form a dense thin film. Additionally, as the high density film is formed, dopant atoms of the doped nanoparticle set 100 can begin to diffuse into the doped silicon substrate 102 to form an initial first doped region 112a (higher dopant concentration). have.

In the case of solar cells, BSF can also be applied to the backside of the doped silicon substrate to push minority carriers in the absorber region from the high recombination zones in the backside and metallized regions of the wafer. The BSF can be formed using aluminum paste (or other deposition material), generally first screen printed on the back of the solar cell and then simultaneously fired in a belt furnace with the front metal contacts.

In FIG. 1C, the co-diffusion step is started. The doped silicon substrate 102 is mounted in a diffusion furnace and the diffusion temperature (preferably from about 700 ° C. to about 1000 ° C. for about 5 to about 30 minutes, more preferably from about 750 ° C. to about 20 minutes to about 20 minutes). 850 ° C., most preferably about 800 ° C. for about 15 minutes).

During this time, nitrogen flows through a bubbler filled with low concentration liquid Phosphorous Oxychloride (POCl ₃ ), O ₂ gas and N ₂ gas as the carrier gas to form process gas 101.

In FIG. 1D, during the thermal process of FIG. 1C, O ₂ molecules react with POCl ₃ molecules to form a Phosphorous Silicate Glass (PSG) layer comprising P ₂ O ₅ (Phosphorous Oxide) on the doped silicon substrate 102. 106). Cl ₂ gas generated as a by-product interacts with and removes metal impurities in the doped silicon substrate 102. As the chemical process continues, phosphorus diffuses into the silicon wafer to form a second doped region 104 (lower dopant concentration).

In FIG. 1E, a second oxidizing gas 109 is formed using O ₂ and N ₂ . The furnace chamber is first heated to an oxidation temperature (preferably between about 800 ° C and about 1100 ° C, more preferably between about 950 ° C and about 1050 ° C, most preferably about 1000 ° C). Next, a SiO ₂ (Silicon Dioxide) layer 107 (about 10) as a result of reacting with silicon atoms on the surface of the oxygen substrate doped silicon substrate 102 (in a mixture of about 1: 1 in an N ₂ : O ₂ ) Nm-50 nm) are formed.

For example, if a sufficient SiO ₂ thickness is achieved after 15-30 minutes, the O ₂ gas flow is terminated. The quartz chamber is heated to about 900 ° C. to 1100 ° C. in an N ₂ atmosphere, allowing the dopant atoms in the original doped nanoparticle set 100 to penetrate deeper into the doped silicon substrate 102, resulting in a final first doped region ( 112b) (higher dopant concentration). That is, unlike dopant atoms in the PSG layer 106 that cannot enter the silicon substrate 102 by the SiO ₂ layer 107, the dopant atoms in the doped nanoparticle set 100 continue to be the first doped region 112b. ) Can be spread. Therefore, the diffusion depth of the final first doped region 112b is substantially greater than the corresponding diffusion depth of the second doped region 104, and the front metal contact (shown in FIG. 4) is applied to the lightly counter-doped substrate. Minimize the possibility of shunting caused by penetration.

In FIG. 1F, the PSG layer 206 may be removed using a batch HF wet bench or other suitable means, if desired.

Referring now to FIGS. 2A-2G, a series of schematic diagrams of an optimized method of forming selective emitters with nanoparticle BSF in a co-diffusion step according to the present invention is shown.

In FIG. 2A, the heavily doped n-type nanoparticle layer 200 is a p-type doped silicon substrate 202 using an application method such as roll coating, slot die coating, gravure printing, flexographic drum printing, inkjet printing, or the like. E) is deposited on the front. After deposition, the silicon substrate may be baked at a first baking temperature (preferably about 100 ° C. to about 500 ° C., more preferably about 350 ° C. to about 450 ° C., most preferably about 400 ° C.) to remove residual solvent. Such baking may be performed in an inert atmosphere or an atmospheric atmosphere using nitrogen gas, argon gas, molding gas, or the like.

In FIG. 2B, next, the heavily doped p-type nanoparticle layer 220 is also p-doped using an application method such as roll coating, slot die coating, gravure printing, flexographic drum printing, inkjet printing, or the like. It is deposited on the backside of the silicon substrate 202 to form BSF (also forms ohmic contact with the back metal contact (rear electrode lattice)).

Next, the p-type doped silicon substrate 202 is baked at a second baking temperature (preferably between about 100 ° C. and about 500 ° C., more preferably between about 350 ° C. and about 450 ° C., most preferably about 400 ° C.) to obtain a high concentration. The residual solvent of the p-type nanoparticle layer 220 doped with is removed. Such baking may be performed in an inert atmosphere or an atmospheric atmosphere using nitrogen gas, argon gas, molding gas, or the like.

In Fig. 2c, the co-diffusion step is started. The p-type doped silicon substrate 202 is placed in a furnace (eg, quartz tube furnace, belt furnace, etc.). Optionally, the particles may be presintered prior to diffusion by an additional thermal process to improve the formation of low recombination ohmic contact.

Thus, next, the n-type doped nanoparticles 200 and the p-type doped nanoparticles 220 have a sintering temperature (preferably between about 500 ° C and about 1000 ° C, more preferably between about 750 ° C and about 850 ° C). , Most preferably at about 800 ° C. for a sintering time (preferably from about 5 seconds to about 2 minutes, more preferably from about 5 seconds to about 20 seconds, most preferably about 15 seconds) (eg, N ₂ , argon It can be sintered simultaneously in an inert atmosphere (using molding gas) to form high density thin films, respectively.

After each of the dense films is formed, n-type dopant atoms of the n-type doped nanoparticles 200 begin to diffuse into the p-type doped silicon substrate 202 to form an initial n-type doped high concentration region 212a. Meanwhile, the p-type dopant atoms of the p-type doped nanoparticles 220 also begin to diffuse into the p-type doped silicon substrate 202 to form the initial p-type doped high concentration region 222a.

In FIG. 2D, the p-type doped silicon substrate 202 has a diffusion temperature (preferably from about 700 ° C. to about 1000 ° C. for about 5 to about 30 minutes, more preferably from about 750 ° C. to about 10 minutes to about 20 minutes). Heated to about 850 ° C., most preferably about 800 ° C. for about 15 minutes, during which time nitrogen is passed through a bubbler filled with low concentration liquid Phosphorous Oxychloride (POCl ₃ ), O ₂ gas and N ₂ gas as carrier gas. Flow to form process gas 230.

In FIG. 2E, as the thermal process shown in FIG. 2D continues, the O ₂ molecules react with POCl ₃ molecules, thereby including P ₂ O ₅ (Phosphorous Oxide) in the p-type doped silicon substrate 202. PSG layer 232 and back PSG layer 234 are formed. Cl ₂ gas produced as a byproduct interacts with and removes metal impurities in the p-type doped silicon substrate 202. As the chemical process continues, phosphorus diffuses into the silicon wafer to form the front n-type doped low concentration region 204. In addition, in a solar cell configuration in which the p-type doped nanoparticle layer 201 is patterned (not shown), phosphorus generally diffuses into the silicon wafer in the region where the p-type doped nanoparticle layer 201 is absent. On the other hand, low concentrations of phosphorus (n-type) diffuse into the BSF layer 220, which has a substantially higher boron (p-type) dopant concentration.

In FIG. 2F, a second oxidizing gas 236 is formed using O ₂ and N ₂ . The furnace chamber is heated to the oxidation temperature (preferably from about 800 ° C. to about 1100 ° C., more preferably from about 950 ° C. to about 1050 ° C., most preferably about 1000 ° C.) for about 5 to 30 minutes.

As the oxygen gas reacts with the silicon atoms on the surface of the p-type doped silicon substrate 202, the front SiO ₂ (silicon dioxide) layer 207 and rear SiO ₂ (silicon dioxide) each of about 10 nm to about 50 nm Layer 240 is formed in the p-type doped silicon wafer 202. Once sufficient SiO ₂ thickness is achieved, the O ₂ gas flow is terminated.

The quartz chamber is then subjected to a diffusion time (preferably from about 5 minutes to about 60 minutes, more preferably from about 15 minutes to about 30 minutes, most preferably about 22 minutes in a N ₂ atmosphere to a diffusion temperature of about 900 ° C to 1100 ° C. ), Allowing the dopant atoms (in the original n-type doped nanoparticle layer 200 and p-type doped nanoparticle layer 220) to enter deeper into the p-type doped silicon substrate 202, resulting in a final n-type Doped high concentration region 212b and final p-type doped high concentration region 222b are formed. As described above, the dopant atoms of the front PSG layer 232 are prevented from further diffusing into the p-type doped silicon substrate 202 by the front SiO ₂ layer 207, while the back SiO ₂ layer 240 Thereby preventing the dopant atoms of the back PSG layer 234 from further diffusing to the p-type doped silicon substrate 202. Thus, the diffusion depth of the final n-type doped high concentration region 212b is substantially greater than the corresponding diffusion depth of the front n-type doped low concentration region 204, and the front metal contact (not shown) is counter-doped at low concentration. Minimize the possibility of shunts caused by penetration into the substrate.

In FIG. 2G, front PSG layer 232 and rear PSG layer 234 may be removed using a batch HF wet bench or other suitable means, if desired.

Referring now to FIGS. 3A-3G, a series of schematic diagrams of an optimized method of forming selective emitters with a passivated backside with a reduced area of rear electrode contacts in a co-diffusion step in accordance with the present invention.

In FIG. 3A, the heavily doped n-type nanoparticle layer 300 is a p-type doped silicon substrate 302 using an application method such as roll coating, slot die coating, gravure printing, flexographic drum printing, inkjet printing, or the like. E) is deposited on the front. After deposition of the doped nanoparticles, the silicon substrate is baked at a first baking temperature (preferably between about 100 ° C. and about 500 ° C., more preferably between about 350 ° C. and about 450 ° C., most preferably about 400 ° C.) to remove residual solvent. Can be removed.

Such baking may be performed in an inert atmosphere or an atmospheric atmosphere using nitrogen gas, argon gas, molding gas, or the like. N-type doped nanoparticle set 300 will form a heavily doped portion of the optional emitter.

In FIG. 3B, a heavily doped p-type nanoparticle layer 301 is then deposited on the backside of the p-doped silicon substrate 302 to form a reduced area of back contact. As heavily doped to form an ohmic contact, the reduced area of the rear contact is generally followed by a rear electrode lattice using an application method such as roll coating, slot die coating, gravure printing, flexographic drum printing, inkjet printing, or the like. Not shown) (eg, 120 μm wide lines are deposited to match a 500 μm wide busbar line pair spaced at intervals of 2 mm at right angles). The remaining back region 303 should generally be passivated to minimize losses due to recombination using SiO ₂ , SiN _x , or other techniques.

As before, after deposition of the n-type doped nanoparticle layer 300 and the p-type doped nanoparticle layer 301, the p-type doped silicon substrate 302 may have a second baking temperature (preferably between about 100 ° C. and about 500 ° C.). ° C, more preferably from about 350 ° C to about 450 ° C, most preferably about 400 ° C) to remove residual solvent. Such baking may be performed in an inert atmosphere or an atmospheric atmosphere using nitrogen gas, argon gas, molding gas, or the like.

In FIG. 3C, a p-type doped silicon substrate 302 is placed in a furnace (eg, quartz tube furnace, belt furnace, etc.). Optionally, the particles may be presintered prior to diffusion by an additional thermal process to improve the formation of low recombination ohmic contact.

Thus, next, the n-type doped nanoparticles 300 and the p-type doped nanoparticles 301 have a sintering temperature (preferably between about 500 ° C and about 1000 ° C, more preferably between about 750 ° C and about 850 ° C). , Most preferably at about 800 ° C. for a sintering time (preferably from about 5 seconds to about 2 minutes, more preferably from about 5 seconds to about 20 seconds, most preferably about 15 seconds) (eg, N ₂ , argon It can be sintered simultaneously in an inert atmosphere (using molding gas) to form high density thin films, respectively.

After each of the dense films is formed, the n-type dopant atoms of the n-type doped nanoparticle set 300 begin to diffuse into the p-type doped silicon substrate 302 to form an initial n-type doped high concentration region 312a. Meanwhile, the p-type dopant atoms of the p-type doped nanoparticle set 301 also begin to diffuse into the p-type doped silicon substrate 302 to form the initial p-type doped high concentration region 313a.

In Fig. 3d, the co-diffusion step is started. A p-doped silicon substrate 302 is mounted in a diffusion furnace, and the diffusion temperature (preferably about 700 ° C. to about 1000 ° C. for about 5 to about 30 minutes, more preferably about 750 ° C. for about 10 to about 20 minutes). To a temperature of about 850 ° C., most preferably about 800 ° C. for about 15 minutes, during which time nitrogen is charged with a low concentration liquid POCl ₃ (Phosphorous Oxychloride), O ₂ gas and N ₂ gas as carrier gas. Flow through it to form the processing gas 330.

In FIG. 3E, as the thermal process shown in FIG. 3D continues, the O ₂ molecules react with POCl ₃ molecules to include P ₂ O ₅ (Phosphorous Oxide) in the p-type doped silicon substrate 302. PSG layer 332 and back PSG layer 334 are formed. Cl ₂ gas generated as a byproduct interacts with and removes metal impurities in the p-type doped silicon substrate 302. As the chemical process continues, phosphorus diffuses into the silicon wafer to form the front n-type doped low concentration region 304 and the back n-type doped low concentration region 322. As mentioned above, low dopant concentrations tend to minimize recombination.

In FIG. 3F, a second oxidizing gas 336 is formed using O ₂ and N ₂ . The furnace chamber is heated to the oxidation temperature (preferably from about 800 ° C. to about 1100 ° C., more preferably from about 950 ° C. to about 1050 ° C., most preferably about 1000 ° C.) for about 5 to 30 minutes.

As the oxygen gas reacts with the silicon atoms of the p-type doped silicon substrate 302, a front SiO ₂ (SiO ₂ ) layer 307 and a rear SiO ₂ (SiO ₂ ), each about 10 nm to about 50 nm Layer 340 is formed in p-type doped silicon wafer 302. Once sufficient SiO ₂ thickness is achieved, the O ₂ gas flow is terminated.

The quartz chamber is then subjected to a diffusion time (preferably from about 5 minutes to about 60 minutes, more preferably from about 15 minutes to about 30 minutes, most preferably about 22 minutes in a N ₂ atmosphere to a diffusion temperature of about 900 ° C to 1100 ° C. ), Allowing the dopant atoms (in the original n-type doped nanoparticle layer 300 and p-type doped nanoparticle layer 301) to enter deeper into the p-type doped silicon substrate 302, resulting in a final n-type Doped high concentration region 312b and final p-type doped high concentration region 313b are formed. As described above, the dopant atoms of the front PSG layer 332 are prevented from further diffusing into the p-type doped silicon substrate 302 by the front SiO ₂ layer 307, while the back SiO ₂ layer 340 Thereby preventing the dopant atoms of the back PSG layer 334 from further diffusing to the p-type doped silicon substrate 302.

In FIG. 3G, the front PSG layer 332 and the rear PSG layer 334 can be removed using a batch HF wet bench or other suitable means, if desired.

Referring now to FIG. 4, there is shown a schematic diagram of a solar cell with a selective emitter and aluminum BSF in accordance with the present invention. As described above, n ++ (highly doped) nanoparticle high density film 412 and n ++ diffusion region 414 are formed and sintered on p-type (lightly doped) silicon substrate 410. Next, an n-type diffusion region 408 is formed by the POCL ₃ process. A SiO ₂ layer 406 is formed over the n-type diffusion region 408 to help passivation of the front surface of the silicon substrate 410 as well as to control the diffusion of phosphorus atoms during the POCL ₃ process.

SiN _x layer 404 is formed on the entire surface of SiO ₂ layer 406. Like the SiO ₂ layer 406, the SiN _x layer 404 assists passivation of the silicon substrate 410 surface and minimizes contamination of the wafer bulk from an external source, as well as minority carrier recombination at the surface of the silicon substrate 410. Reduce Additionally, the SiN _x layer 404 can be optimized to reduce the reflectance of the front side of the solar cell, substantially improving efficiency and hence performance. Next, front metal contacts 402 and BSF / rear metal contacts 416 are formed in the silicon substrate 410. The front metal contacts 402 are generally composed of organic components (15 wt% to 30 wt%), PbO-B ₂ O ₃ -SiO ₂ (Lead Borosilicate Glass, 1 wt% to 10 wt%), and silver powder (70 wt% to 80 wt%). It is formed of a silver paste containing. The BSF / rear metal contacts 416 are generally formed of aluminum and are configured to create a retracting electric field and thus minimize the effects of minority carrier back recombination. In addition, silver pads (not shown) are generally applied to the BSF / rear metal contacts 416 to facilitate soldering for module wiring.

Referring now to FIG. 5, there is shown a schematic diagram of a solar cell with a selective emitter and high density film back contact in accordance with the present invention. The n ++ (highly doped) nanoparticle high density film 512, n ++ diffusion region 514, p ++ nanoparticle high density film back contact 520, and p ++ nanoparticle diffusion region 518 are p-type (lightly doped) ) Is formed on the silicon substrate 510 and sintered. Next, the front n-type diffusion region 508 and the rear n-type diffusion region 526 are formed by the POCL ₃ process. SiO ₂ layer 506 is formed over n-type diffusion region 508. Next, a SiN _x layer 504 is formed on the entire surface of the SiO ₂ layer 506. As described above, the front metal contact 502 and the rear metal contact 522 are formed on the silicon substrate 510 using silver paste.

Referring now to FIG. 6, there is shown a schematic diagram comparing the reflectivity of crystalline silicon with high density nanoparticle films on a silicon substrate in accordance with the present invention. As mentioned above, both surfaces are coated with a layer of thermally grown oxide and PECVD deposited nitride. Wavelengths in nanometers are shown on the horizontal axis 602 and reflectances in percent are shown on the vertical axis 604.

As mentioned above, SiN _x is often used to reduce the reflectance of a solar cell and increase its efficiency. For any given wavelength that strikes the solar cell, the percent reflectance relates to the thickness of the translucent layer through which light passes, the excitation mainly the SiN _x layer, and the absorption characteristics of the underlying surface.

For diffused selective emitters (without high-density nanoparticle films) as described in FIGS. 1A-1F, the SiN _x layer and underlying layers were deposited for both the lightly doped and heavily doped emitter regions. The thickness of the surface is the same with crystalline silicon (or crystalline silicon covered with a thin layer of thermally grown oxide). Therefore, visually aligning the front metal contact to the heavily doped region can be problematic. In the present invention, however, the underlying surfaces are different and thus visually distinct. The lightly doped emitter regions 606 have the optical properties (eg, extinction coefficient and refractive index) of the crystalline silicon, while the high density nanoparticle thin film 608 has different optical properties, which is different from the optical properties of the amorphous silicon. Somewhat similar. Here, the reflectance of the lightly doped emitter region 606 has a minimum reflection point near the wavelength of 600 nm, resulting in a blue appearance, while the reflectance of the high density nanoparticle thin film 608 has no apparent minimum point, resulting in a white appearance. Cause. Thus, this difference in optical properties tends to make each face a different color with high color contrast, and it can be made much easier to visually align the front metal contacts to the heavily doped regions.

Referring now to FIGS. 7A-7C, there is shown a schematic diagram of various electrical properties of different regions of a selective emitter in accordance with the present invention. Here, a set of nanoparticle substrates are prepared on a lightly doped boron doped silicon substrate to facilitate measurement with four probes of sheet resistance. A phosphor-doped nanoparticle high density film 704 was formed in the first portion of the substrate surface, and a phosphorus diffusion region was formed in the second portion using the PSG 702.

In FIG. 7A, the sheet resistance 706 was measured. Sheet resistance is generally a measure of the resistance of thin or thin layers with uniform thickness, Ohm / sq. Measured in units. Here, the substrate was presintered at 1000 ° C. for 20 seconds, phosphorus deposited diffusion at 725 ° C. for 19 minutes, then oxidized at 975 ° C. for 15 minutes and annealed at 1000 ° C. for 30 minutes. As can be seen, the region containing the high density nanoparticles is 10 Ohm / sq. With a sheet resistance of between 20 Ohm / sq., While the region with PSG is 120 Ohm / sq. To sheet resistances from 200 Ohm / sq.

In FIG. 7B, the efficiency 708 was measured. Solar cell efficiency is generally the percentage of power that is converted and collected (from absorbed light to electrical energy) when the solar cell is connected to an electrical circuit. In general, losses of solar cells can be divided into reflectance losses, thermodynamic losses, recombination losses, and resistive electrical losses.

This term is calculated using the ratio of the maximum power point divided by the surface area of the solar cell (m 2) and the input light brightness (W / m 2) under standard test conditions (STC). STC specifies a temperature of 25 ° C. and a luminance of 1000 W / m 2 in the air mass 1.5 (AM1.5) spectrum. The maximum output is the point that maximizes the product of current (I) and voltage (V). That is, I x V.

Here, half of the substrates were sintered at 1000 ° C. for 20 seconds after being printed with the nanoparticle ink pattern, while the other half had no nanoparticle ink applied. Subsequently, the substrates were phosphorus deposited diffused at 750 ° C. for 26 minutes, then oxidized at 975 ° C. for 15 minutes and annealed at 1000 ° C. for 30 minutes. In this case, the phosphorus doping strength exceeded 100 Ohm / sq. In the region without ink and 60 Ohm / sq. Was less. As can be seen, regions containing high density nanoparticles exhibited an efficiency of about 12% to about 14%, while regions with PSG exhibited an efficiency of about 2% to about 10%.

In FIG. 7C, fill factor 710 was measured. The charge rate is the ratio of the maximum output divided by the product of the open voltage (V _oc ) and the short circuit current (I _sc ). Here, half of the substrates were sintered at 800 ° C. for 20 seconds after being printed with a nanoparticle ink pattern, while no ink was applied to the other half. Subsequently, the substrates were phosphorus deposited diffused at 750 ° C. for 26 minutes, then oxidized at 975 ° C. for 15 minutes and annealed at 1000 ° C. for 30 minutes. In this case, the phosphorus doping strength exceeded 75 Ohm / sq. In the region without ink and 50 Ohm / sq. Was less. In all three cases, silicon nanoparticle inks facilitated the formation of selective doping, and heavily doped regions were formed in the ink application area. As can be seen, regions containing high density nanoparticles show a fill factor (FF) of about 75% to about 80%, while regions with PSG show an efficiency of about 55% to about 20%.

Referring now to FIG. 8, there is shown a schematic of a series of I-V curves comparing a solar cell with a lightly doped emitter only and a solar cell with a selective emitter in accordance with the present invention. In general, an I-V curve can be plotted when the load varies from near the short circuit state (zero resistance) to near the open state (infinite resistance) in the solar cell.

Here, the voltage V is shown on the horizontal axis 802 and the current J is shown on the vertical axis 804. Line 806 represents a lightly doped emitter solar cell, while line 808 represents a heavily doped nanoparticle high density film selective emitter. As noted above, when both cells have a front metal contact and a back metal contact, the lightly doped emitter solar cell 806 is low and uniform throughout the silicon substrate, including the area under the front metal contacts. Has a dopant concentration. On the other hand, the heavily doped nanoparticle high density film selective emitter 808 has a heavily doped region under the front metal contacts and has a lightly doped region on the substantial remainder of the solar cell. Thus, the heavily doped nanoparticle high density film selective emitter 808 makes better ohmic contact (low resistance) with the front metal contacts, corresponding to greater net efficiency. This can be seen in the area 810 of the graph which reflects the net power gain (and thus efficiency) made possible by the highly doped nanoparticle high density film.

In an advantageous manner, therefore, the selective emitter can be formed into a nanoparticle high density thin film, thus achieving substantially high bulk life and good surface recombination current density.

For the purposes of the present disclosure, unless otherwise specified, "a" or "an" means "one or more". All patents, patent applications, references, and publications cited herein are incorporated by reference in their entirety to the same extent as if individually incorporated by reference.

The present invention has been described with reference to various specific exemplary embodiments. However, various changes and modifications may be made within the spirit and scope of the invention. Advantages of the present invention include the fabrication of low cost, high efficiency junctions for electrical devices such as solar cells.

Although exemplary and best embodiments have been disclosed, variations and modifications may be made to the disclosed embodiments within the spirit and spirit of the invention as defined in the following claims.

Claims (31)

By forming a multi-doped junction on a substrate,
Providing a substrate doped with boron and having a front surface having a first surface region and a second surface region;
Depositing a first set of nanoparticles comprising a first dopant in a first surface area;
Heating the substrate for a first time in an inert atmosphere to a first temperature to form a first high density film and to form a first diffusion region having a first diffusion depth in the substrate below the first surface region;
The substrate is exposed to a diffusion gas containing phosphorus for a second time at a second temperature, thereby forming a PSG layer in the second surface region on the front surface and having a second diffusion depth in the substrate below the second surface region and having a first diffusion region. Forming a second diffusion region adjacent to; And
Exposing the substrate to an oxidizing gas for a third time at a third temperature to form an SiO ₂ layer between the PSG layer and the front surface and to increase the first diffusion depth relative to the second diffusion depth. The method of claim 1, wherein the first temperature is about 500 ° C. to about 1000 ° C. 3. The method of claim 1, wherein the first temperature is about 750 ° C. to about 850 ° C. 7. The method of claim 1, wherein the first temperature is about 800 ° C. 3. The method of claim 1, wherein the first time is about 5 seconds to about 2 minutes. The method of claim 1, wherein the first time is about 5 seconds to about 20 seconds. The method of claim 1, wherein the first time is about 15 seconds. The method of claim 1, wherein the diffusion gas comprises POCl ₃ , O ₂ , and N ₂ . The method of claim 1, wherein the second temperature is about 700 ° C. to about 1000 ° C. and the second time is about 5 minutes to about 30 minutes. The method of claim 1, wherein the second temperature is about 750 ° C. to about 850 ° C. and the second time is about 10 minutes to about 20 minutes. The method of claim 1, wherein the second temperature is about 800 ° C. and the second time is about 15 minutes. The method of claim 1, wherein the third temperature is between about 800 ° C. and about 1100 ° C. 3. The method of claim 1, wherein the third temperature is about 950 ° C. to about 1050 ° C. 3. The method of claim 1, wherein the third temperature is about 1000 ° C. 3. The method of claim 1, wherein the third time is about 15 minutes to about 30 minutes. The method of claim 1, further comprising depositing a second set of nanoparticles comprising a second dopant in a third surface region of the backside of the substrate after depositing the first set of nanoparticles. The method of claim 16, wherein heating the substrate further forms a second high density film and forms a third diffusion region having a third diffusion depth in the substrate below the third surface region. The method of claim 17, wherein the first dopant is phosphorous and the second dopant is boron. The method of claim 1, further comprising depositing a first metal paste on the backside of the substrate prior to exposing the substrate to the diffusing gas. 20. The method of claim 19, further comprising depositing at least one surface passivation layer on the front side of the substrate after exposing the substrate to oxidizing gas and depositing a second metal paste on the at least one surface passivation layer. By forming a multi-doped junction on a substrate,
Providing a substrate doped with boron and having a front surface having a first surface region and a second surface region;
Depositing a first set of nanoparticles comprising a first dopant in a first surface area;
The substrate is exposed to a diffusion gas comprising phosphorus for a first time at a first temperature to form a first diffusion region having a first diffusion depth in the substrate below the first surface region, and PSG in the second surface region on the front surface. Forming a layer, and forming a second diffusion region having a second diffusion depth in the substrate below the second surface region; And
Exposing the substrate to an oxidizing gas at a second temperature for a second time to form a SiO ₂ layer between the PSG layer and the front surface and increasing the first diffusion depth relative to the second diffusion depth. The method of claim 21, wherein the diffusion gas comprises POCl ₃ , O ₂ , and N ₂ . The method of claim 21, wherein the first temperature is about 700 ° C. to about 1000 ° C. and the first time is about 5 minutes to about 30 minutes. The method of claim 21, wherein the first temperature is about 800 ° C. and the first time is about 15 minutes. The method of claim 21, wherein the second temperature is about 800 ° C. to about 1100 ° C. 23. The method of claim 21, wherein the second temperature is about 1000 ° C. 23. The method of claim 21, wherein the second time is about 15 minutes to about 30 minutes. 22. The method of claim 21, further comprising depositing a second set of nanoparticles comprising a second dopant that is a counter dopant of the first dopant in a third surface region of the backside of the substrate after depositing the first set of nanoparticles. Way. The method of claim 28, wherein the first dopant is phosphorus and the second dopant is boron. 22. The method of claim 21, further comprising depositing a first metal paste on the back side of the substrate after depositing the first set of nanoparticles. 31. The method of claim 30, further comprising depositing one or more surface passivation layers on the front side of the substrate after exposing the substrate to oxidizing gas and depositing a second metal paste on the one or more surface passivation layers.

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