CN102244082B - Manufacturing method of array substrate - Google Patents

Manufacturing method of array substrate Download PDF

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Publication number
CN102244082B
CN102244082B CN201010178636.7A CN201010178636A CN102244082B CN 102244082 B CN102244082 B CN 102244082B CN 201010178636 A CN201010178636 A CN 201010178636A CN 102244082 B CN102244082 B CN 102244082B
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short
circuit line
array base
metal
electrostatic discharge
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CN102244082A (en
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金利波
邱承彬
夏军
李懿馨
凌严
于祥国
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Shanghai Tianma Microelectronics Co Ltd
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Shanghai Tianma Microelectronics Co Ltd
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Abstract

The invention relates to a manufacturing method of an array substrate. The manufacturing method comprises the following steps: providing a substrate, depositing and etching a first metal layer on the substrate, forming a first metal interconnection line, a first short-circuit line and a first electrostatic discharge protective electrode; forming and etching an insulating layer respectively above the first metal interconnection line, the first short-circuit line and the first electrostatic discharge protective electrode, respectively forming via holes on the insulating layers above the first metal interconnection line, the first short-circuit line and the first electrostatic discharge protective electrode; depositing and etching second metal layers on the insulating layers, and forming a second metal interconnection line which is electrically connected with the first metal interconnection line through a corresponding via hole, a second short-circuit line and a second electrostatic discharge protective electrode electrically connected with the first electrostatic discharge protective electrode through a corresponding via hole, wherein the second short-circuit line connects the second metal interconnection line and the second electrostatic discharge protective electrode; etching and for disconnecting the first short-circuit line. In the method, the electrostatic discharge protection on an X-ray detector is started from the first process without increasing processing steps.

Description

Manufacturing method of array base plate
Technical field
The present invention relates to manufacturing method of array base plate, particularly there is the manufacturing method of array base plate of electrostatic protection.
Background technology
The development of modern medicine has changed the life of people completely, and a lot of illness just can be known in the early stage and win golden hour, and the pathology of organ can clearly be seen, this all be unable to do without medical imaging technology is such as X-ray transmission technology.Along with the development of science and technology, X-ray transmission technology moves towards digitlization, and the tester that in digital x-ray technology, people pay close attention to the most is X-ray detector.
Please refer to Fig. 1, Fig. 1 is the array substrate circuit structural representation of existing X-ray detector.Described array base palte comprises glass substrate (not shown), described glass substrate comprises viewing area 101, and the region beyond viewing area 101 is outer peripheral areas.Described viewing area comprises some pixel cells, the thin-film transistor 1011 that each pixel cell comprises a photodiode 1012 and is connected with the negative electrode of photodiode 1012.Described array base palte also has multi-strip scanning line 1013 and data wire 1014, described scan line 1013 and data wire 1014 vertical distribution mutually, wherein the thin-film transistor 1011 of each pixel cell controlled with data wire 1014 by the scan line 1013 of correspondence.Described scan line 1013 or data wire 1014 work under the control of peripheral processes circuit being positioned at non-display area.Described photodiode 1012 is for opto-electronic conversion, and the signal of telecommunication that photodiode exports, as the control switch of photodiode 1012, under the driving of described scan line 1013, is transferred to peripheral processes circuit through data wire by described thin-film transistor 1011.By peripheral processes circuit, rear output is processed to the described signal of telecommunication.
In the array base palte manufacturing process of X-ray detector, due to some external factor, such as continuous print process operations, carrying or environmental change etc., can produce the accumulation of electrostatic charge usually on panel.Because glass itself is megohmite insulant, therefore unless there are suitable discharge channel, otherwise electrostatic charge can rest on glass baseplate surface always.After static charge accumulation to some, electric discharge (ESD, Electrostatic Discharge) will be produced.The time that static discharge occurs is very short, and a large amount of electric charges transfer occurs in a short period of time and will produce high electric current thus the circuit caused on array base palte or substrate itself be destroyed.
In order to avoid there is static discharge in prior art; general employing by all metal electrode short-circuit lines (short bar) in X-ray detector together with electrostatic discharge (ESD) protection Electrode connection; by electrostatic discharge (ESD) protection electrode grounding, described electrostatic charge is by short-circuit line and the release of electrostatic discharge (ESD) protection electrode.After the array base palte of X-ray detector completes, with laser wire cutting device, short-circuit line is excised.The method of described electrostatic discharge (ESD) protection needs special laser wire cutting device, and usual described laser wire cutting device is expensive.The method of described electrostatic discharge (ESD) protection also needs to increase unnecessary manufacturing step simultaneously, and increases the manufacturing cost that processing step can increase plate amorphous silicon X-ray detector.Therefore, prior art is generally form electrostatic discharge protective equipment in the process of the array base palte manufacturing X-ray detector.
As the patent No. United States Patent (USP) that is US7217591B2 provide the array base palte of X-ray detector manufacture method.Be described to the manufacture method of described array base palte below.Fig. 2 to Fig. 6 is the manufacture method schematic top plan view of prior art array base palte.
First, with reference to figure 2, and composition graphs 7, Fig. 7 is the cross-sectional view of Fig. 2 along AA line.There is provided substrate 100, described substrate 100 is glass substrate.
Then, described substrate 100 deposits the first metal layer, described the first metal layer is etched, form the first metal interconnecting wires 101.
Then, with reference to figure 3, and composition graphs 8, Fig. 8 is the cross-sectional view of Fig. 3 along AA line.Described substrate 100 forms insulating barrier 102, and described insulating barrier 102 is positioned at above described first metal interconnecting wires 101, and has via hole 103, and described via hole 103 exposes described first metal interconnecting wires 101.
Then, with reference to figure 4, and composition graphs 9, Fig. 9 is the cross-sectional view of Fig. 4 along AA line.Depositing second metal layer on described insulating barrier 102; described second metal level is etched; form the second metal interconnecting wires 104, electrostatic discharge (ESD) protection electrode 106, short-circuit line 105; the two ends of described short-circuit line 105 connect electrostatic discharge (ESD) protection electrode 106 and described second metal interconnecting wires 104 respectively, and described electrostatic discharge (ESD) protection electrode 106 is ground connection usually.Described second metal interconnecting wires 104 contacts with the first metal interconnecting wires 101 at via hole 103 place; so that follow-up formation welded gasket (bonding pad); short-circuit line 105 and electrostatic discharge (ESD) protection electrode 106 constitute electrostatic discharging path simultaneously, and the electrostatic charge in successive process is discharged by short-circuit line 105, electrostatic discharge (ESD) protection electrode 106.
Then, with reference to figure 5, and be the cross-sectional view of Fig. 5 along AA line in conjunction with Figure 10, Figure 10.Form passivation layer 107 at described second metal interconnecting wires 104, electrostatic discharge (ESD) protection electrode 106, short-circuit line 105 disposed thereon, described passivation layer 107 has via hole 108 above described short-circuit line 105, and described via hole 108 exposes short-circuit line 105.
Finally, with reference to figure 6, and be the cross-sectional view of Fig. 6 along AA line in conjunction with Figure 11, Figure 11.Etch the partial short circuit line 105 below via hole 108, expose substrate 100, short-circuit line 105 removes, and the array base palte of electrostatic discharging path and X-ray detector disconnects.
The electrostatic discharge (ESD) protection electrode 106 that said method is formed after second layer metal etching, short-circuit line 105 are that the substrate in follow-up manufacturing process and the device on substrate provide electrostatic discharge (ESD) protection; but the device in second layer metal and former manufacturing process thereof on substrate and substrate is not protected.
Therefore, need a kind of new manufacturing method of array base plate, just can carry out electrostatic protection to the device on substrate and substrate to first technique.
Summary of the invention
The problem that the present invention solves there is provided a kind of manufacturing method of array base plate, just can carry out electrostatic protection to the device on substrate and substrate to first technique.
In order to solve the problem, the invention provides a kind of manufacture method with the array base palte of electrostatic protection, described method comprises:
Substrate is provided, deposits the first metal layer on the substrate;
Etch described the first metal layer, form the first metal interconnecting wires, the first short-circuit line, the first electrostatic discharge (ESD) protection electrode, described first short-circuit line connects the first metal interconnecting wires and the first electrostatic discharge (ESD) protection electrode;
Insulating barrier is formed above described first short-circuit line, the first metal interconnecting wires, the first electrostatic discharge (ESD) protection electrode;
Etch described insulating barrier, the insulating barrier above described first short-circuit line, the first metal interconnecting wires, the first electrostatic discharge (ESD) protection electrode forms via hole respectively;
At described insulating barrier disposed thereon second metal level;
Described second metal level is etched, form the second metal interconnecting wires, the second short-circuit line, the second electrostatic discharge (ESD) protection electrode by via hole and the first electrostatic discharge (ESD) protection electrode that are electrically connected with the first metal interconnecting wires by via hole, described second short-circuit line connects the second metal interconnecting wires and the second electrostatic discharge (ESD) protection electrode;
By the via hole on described first short-circuit line, described first short-circuit line is etched, described first short-circuit line etching is disconnected.
Optionally, described first short-circuit line etching is disconnected and completes being etched in same etching process of the second metal level.
Optionally, described first short-circuit line and described second short-circuit line stagger mutually.
Optionally, described array base palte is X-ray detector array base palte.
Optionally, described formation and etch described the first metal layer utilize be the step forming thin-film transistor gate in X-ray detector array base palte manufacturing process, described first metal interconnecting wires is electrically connected described thin-film transistor gate.
Optionally, described the first metal layer is formed by the method for physical vapour deposition (PVD).
Optionally, wet etching is comprised to the etching of described the first metal layer.
Optionally, described formation and to etch described insulating barrier be the step forming insulating barrier and etching insulating layer in X-ray detector array base palte manufacturing process.
Optionally, the described etching to described insulating barrier comprises dry etching.
Optionally, described insulating layer material is silicon nitride.
Optionally, described formation and etch described second metal level utilize be in X-ray detector array base palte manufacturing process, form the source-drain electrode of thin-film transistor and the step of photodiode underlying metal.
Optionally, the described etching to the second metal level comprises wet etching.
Optionally, the manufacture method of described array base palte also comprises:
Described second metal interconnecting wires, the second short-circuit line, the second electrostatic discharge (ESD) protection electrode form passivation layer;
Described passivation layer is etched, in the passivation layer above described second short-circuit line, forms via hole;
Side's deposition third layer metal over the passivation layer;
Described third layer metal is etched;
By the via hole above the second short-circuit line, described second short-circuit line is etched, described second short-circuit line etching is disconnected.
Optionally, described second short-circuit line etching is disconnected and completes being etched in same etching process of the 3rd metal level.
Optionally, described second short-circuit line etching is disconnected and described first short-circuit line etching disconnection is completed in same etching process.
Optionally, described formation and to etch described passivation layer be the step forming passivation layer and Etch Passivation in X-ray detector array base palte manufacturing process.
Optionally, described formation and etch described third layer metal utilizes the formation and etch step that form photoresist layer.
Compared with prior art, the present invention has following advantage: deposition and etching first metal layer, form the first metal interconnecting wires, the first short-circuit line, the first electrostatic discharge (ESD) protection electrode, described first short-circuit line connects the first metal interconnecting wires and the first electrostatic discharge (ESD) protection electrode, and the array base palte of described first short-circuit line and the first electrostatic discharge (ESD) protection electrode pair X-ray detector carries out electrostatic discharge (ESD) protection; Deposition and etching the second metal level; form the second metal interconnecting wires, the second short-circuit line, the second electrostatic discharge (ESD) protection electrode by via hole and the first electrostatic discharge (ESD) protection electrode that are electrically connected with the first metal interconnecting wires by via hole; described second short-circuit line connects the second metal interconnecting wires and the second electrostatic discharge (ESD) protection electrode, and the array base palte that described second short-circuit line and the second electrostatic discharge (ESD) protection electrode replace first paragraph route and the first electrostatic discharge (ESD) protection electrode pair X-ray detector carries out electrostatic discharge (ESD) protection.Described method carries out electrostatic discharge (ESD) protection from the first technique of the manufacture process of the array base palte of X-ray detector to it, avoids static discharge array substrate and the element that formed thereof to damage above.
Further, what described formation and etching first metal layer utilized is the step forming thin-film transistor gate in X-ray detector array base palte manufacturing process; Describedly the first short-circuit line is disconnected and same etching process is etched in the second metal level completes; What the step depositing and etch the second metal level utilized is the step forming the source-drain electrode of thin-film transistor and the underlying metal of photodiode in the manufacturing process of X-ray detector array base palte; Second short-circuit line etching is disconnected and is etched in same etching cavity the 3rd metal level and has etched, and described method utilizes the step forming passivation layer and Etch Passivation in X-ray detector array base palte manufacturing process, does not increase unnecessary processing step.
Accompanying drawing explanation
Fig. 1 is the array substrate circuit structural representation of existing X-ray detector.
Fig. 2 to Fig. 6 is the manufacture method schematic top plan view of prior art array base palte.
Fig. 7 is the cross-sectional view of Fig. 2 along AA line.
Fig. 8 is the cross-sectional view of Fig. 3 along AA line.
Fig. 9 is the cross-sectional view of Fig. 4 along AA line.
Figure 10 is the cross-sectional view of Fig. 5 along AA line.
Figure 11 is the cross-sectional view of Fig. 6 along AA line.
Figure 12, Figure 14, Figure 17, Figure 20, Figure 23 are the manufacture method schematic top plan view of array base palte of the present invention.
Figure 13 is the cross-sectional view of Figure 12 along BB line.
Figure 15 is the cross-sectional view of Figure 14 along BB line.
Figure 16 is the cross-sectional view of Figure 14 along CC line.
Figure 18 is the cross-sectional view of Figure 17 along BB line.
Figure 19 is the cross-sectional view of Figure 17 along CC line.
Figure 21 is the cross-sectional view of Figure 20 along BB line.
Figure 22 is the cross-sectional view of Figure 20 along CC line.
Figure 24 is the cross-sectional view of Figure 23 along BB line.
Figure 25 is the cross-sectional view of Figure 23 along CC line.
Embodiment
In the production process of the array base palte of X-ray detector; in order to the thin-film transistor ensureing array base palte and formed on described array base palte, photodiode avoid being subject to the destruction of static discharge; do not increase processing step simultaneously; the invention provides a kind of manufacture method with the array base palte of electrostatic protection; described method starts to protect the device on the substrate of substrate and follow-up formation in the first technique of the array base palte manufacture of X-ray detector; avoid the accumulation of electrostatic charge in production process, described method comprises:
Substrate is provided, deposits the first metal layer on the substrate;
Etch described the first metal layer, form the first metal interconnecting wires, the first short-circuit line, the first electrostatic discharge (ESD) protection electrode, described first short-circuit line connects the first metal interconnecting wires and the first electrostatic discharge (ESD) protection electrode;
Insulating barrier is formed above described first short-circuit line, the first metal interconnecting wires, the first electrostatic discharge (ESD) protection electrode;
Etch described insulating barrier, the insulating barrier above described first short-circuit line, the first metal interconnecting wires, the first electrostatic discharge (ESD) protection electrode forms via hole respectively;
At described insulating barrier disposed thereon second metal level;
Described second metal level is etched, form the second metal interconnecting wires, the second short-circuit line, the second electrostatic discharge (ESD) protection electrode by via hole and the first electrostatic discharge (ESD) protection electrode that are electrically connected with the first metal interconnecting wires by via hole, described second short-circuit line connects the second metal interconnecting wires and the second electrostatic discharge (ESD) protection electrode;
By the via hole on described first short-circuit line, described first short-circuit line is etched, described first short-circuit line etching is disconnected.
It should be noted that; the present invention is using the manufacture method of the array base palte of X-ray detector as preferred embodiment; the manufacture method of the array base palte with electrostatic discharge (ESD) protection is described; described method forms the X-ray detector with electrostatic protection; achieve and electrostatic protection is carried out to each step of X-ray detector manufacturing process; but described method is not limited to the array base palte of X-ray detector, such as described method can also form the array base palte of the display panels with electrostatic protection.
The array base palte of X-ray detector of the present invention comprises interior zone and outer peripheral areas, and manufacture method of the present invention only illustrates for the substrate manufacture process of outer peripheral areas.Usual described outer peripheral areas comprises pad area, shorting region, electrostatic discharge (ESD) protection district.The welded gasket that described pad area is connected with outside for the formation of the thin-film transistor of interior zone, shorting region and electrostatic discharge (ESD) protection district are used for the Electro-static Driven Comb that will be formed.Same as the prior art in the structure of the interior zone of described substrate, as the known technology of those skilled in the art, do not add diagram.
Below in conjunction with accompanying drawing, the specific embodiment of the present invention is described in detail.Figure 12, Figure 14, Figure 17, Figure 20, Figure 23 are the manufacture method schematic top plan view of array base palte of the present invention.
First; please refer to Figure 12; substrate (not shown) is provided; described substrate is glass substrate; and substrate described in the present embodiment is as the array base palte of X-ray detector, comprise pad area (not shown), shorting region (not shown), electrostatic discharge (ESD) protection district (not shown).
Deposit the first metal layer on the substrate; described the first metal layer is etched; the first metal interconnecting wires 201 is formed at described pad area; the first short-circuit line 202 is formed at described shorting region; formed in electrostatic discharge (ESD) protection district and carry out the first electrostatic discharge (ESD) protection electrode 203; described first short-circuit line 202 connects the first metal interconnecting wires 201 and the first electrostatic discharge (ESD) protection electrode 203, forms the first electrostatic discharging path.
In order to described structure is better described, please refer to Figure 13, Figure 13 is the cross-sectional view of Figure 12 along BB line.Define the first short-circuit line 202, first metal interconnecting wires 201, first electrostatic discharge (ESD) protection electrode 203, first metal interconnecting wires 201 above described substrate 200 to be connected by the first short-circuit line 202 with the first electrostatic discharge (ESD) protection electrode 203.Described first metal interconnecting wires 201 is electrically connected described thin-film transistor gate.Usually, described first metal interconnecting wires 201 as the gate control lines (being also called scan line) of thin-film transistor, for providing grid control signal to thin-film transistor.Described first electrostatic discharge (ESD) protection electrode 203 ground connection.In follow-up manufacture process, the electrostatic charge on any wire be connected with the first metal interconnecting wires 201 can be discharged by described first short-circuit line 202 and the first electrostatic discharge (ESD) protection electrode 203.
As the preferred embodiments of the present invention, described deposition the first metal layer and what etch that the step of described the first metal layer utilizes is the step forming thin-film transistor gate in the manufacturing process of X-ray detector array base palte, does not need to increase extra processing step like this.Position and the structure of described grid are same as the prior art, as the known technology of those skilled in the art, are not described in detail at this.
In the present embodiment, described the first metal layer be formed by the method for physical vapour deposition (PVD).The material of described the first metal layer is molybdenum.The lithographic method of described the first metal layer comprises the method for wet etching.
Then, with reference to Figure 14, at described first short-circuit line 202, first metal interconnecting wires 201, insulating barrier (not shown) is formed above first electrostatic discharge (ESD) protection electrode 203, described insulating barrier is etched, insulating barrier above the first short-circuit line 202 forms via hole 206, expose described first short-circuit line 202, via hole 205 is formed above the first metal interconnecting wires 201 of pad area, expose described first metal interconnecting wires 201, and above the first electrostatic discharge (ESD) protection electrode 203 in electrostatic discharge (ESD) protection district, form via hole 213 expose described first electrostatic discharge (ESD) protection electrode 203.Described via hole 206 extends to substrate surface, exposes described substrate.
As the preferred embodiments of the present invention, described formation insulating barrier and what etch that described insulating barrier utilizes is the step of the insulating barrier forming thin-film transistor in X-ray detector manufacturing process and the etch step of carrying out described insulating barrier, position and the structure of the insulating barrier of the thin-film transistor that described etching is formed are same as the prior art, as the known technology of those skilled in the art, do not describe in detail at this.
Please refer to Figure 15, Figure 15 is the cross-sectional view of Figure 14 along BB line.Above described first short-circuit line 202, first metal interconnecting wires 201, first electrostatic discharge (ESD) protection electrode 203, form insulating barrier 204, described via hole 206 exposes described first short-circuit line 202.Described via hole 205 exposes the first metal interconnecting wires 201 surface.Described via hole 213 exposes the first electrostatic discharge (ESD) protection electrode 203 surface.
Reference Figure 16, Figure 16 are the cross-sectional view of Figure 14 along CC line.Described via hole 205 exposes the first metal interconnecting wires 201 surface, and described via hole 206 exposes the surface of substrate 200.
In the present embodiment, the material of described insulating barrier 204 is silicon nitride.The formation method of described insulating barrier 204 comprises the method for chemical vapour deposition (CVD).Dry etching is comprised to the lithographic method of described insulating barrier 204.
With reference to Figure 14, described via hole 205 is for making the weld pad of the first metal interconnecting wires 201, and described via hole 213 to be formed with the second electrostatic discharge (ESD) protection electrode of follow-up formation for the first electrostatic discharge (ESD) protection electrode 203 and contacts.
With reference to Figure 15,16; in the present invention; described insulating barrier 204 1 aspect is used for protecting described first metal interconnecting wires 201; on the other hand; the grid of thin-film transistor is protected, the grid of thin-film transistor preventing follow-up etching technics damage metal interconnecting wires 201 and be connected with metal interconnecting wires 201.
In X-ray detector manufacturing process; electrostatic charge on any first short-circuit line or the grid of transistor that is connected with the first short-circuit line by the first short-circuit line, the first electrostatic discharge (ESD) protection electrode grounding, can ensure that the electrostatic charge in described plate amorphous silicon X-ray detector manufacturing process can discharge.
Then, with reference to Figure 17, at described insulating barrier disposed thereon second metal level; described second metal level is etched; form the second metal interconnecting wires 209 at pad area, form the second short-circuit line 207 at shorting region, form the second electrostatic discharge (ESD) protection electrode 208 in electrostatic discharge (ESD) protection district.Described second metal interconnecting wires 209, second electrostatic discharge (ESD) protection electrode 208 is connected by the second short-circuit line 207, forms the second electrostatic discharging path.Described second metal interconnecting wires 209 covers insulating barrier, is formed contact with the first metal interconnecting wires 201 below the via hole 205 of pad area.Described second electrostatic discharge (ESD) protection electrode 208 ground connection, and cover described first electrostatic discharge (ESD) protection electrode 203, be connected with the first electrostatic discharge (ESD) protection electrode 203 by via hole 213.Avoid the unsettled of the first electrostatic discharge (ESD) protection electrode 203 like this and accumulate electrostatic, the first electrostatic discharge (ESD) protection electrode 203 is by the second electrostatic discharge (ESD) protection electrode 208 ground connection.As an embodiment, described first short-circuit line 207 and the second short-circuit line 208 mutually stagger and arrange.
Please refer to Figure 18, Figure 18 is the cross-sectional view of Figure 17 along BB line.At described insulating barrier 204 disposed thereon second metal level, described second metal interconnecting wires 209 covers the first metal interconnecting wires 201, is connected with the first metal interconnecting wires 201 by via hole 205.Etch the first short-circuit line 202, removed by part first short-circuit line 202 below the via hole 206 of shorting region, in the first short-circuit line 202, form via hole 212, described via hole 212 replaces via hole 206, exposes the surface of substrate 200.So far the first short-circuit line 202 is chopped off.
Reference Figure 19, Figure 19 are the cross-sectional view of Figure 18 along CC line.Described second short-circuit line 207 connects the second metal interconnecting wires 209 and is connected with the second electrostatic discharge (ESD) protection electrode 208.The second electrostatic discharging path that second short-circuit line 207, second metal interconnecting wires 209 and the second electrostatic discharge (ESD) protection electrode 208 are formed replaces the first electrostatic discharging path that the first metal interconnecting wires 201, first short-circuit line 202 and the first electrostatic discharge (ESD) protection electrode 203 are formed, and carries out electrostatic discharge (ESD) protection to follow-up manufacturing process.As an embodiment, the deposition process of described second metal level is the method for physical vapour deposition (PVD), and the material of described second metal level is molybdenum.Described etching comprises wet etching.Part first short-circuit line 202 removes by described etching; the the second electrostatic discharge (ESD) protection electrode 208 forming the second short-circuit line 207 and be connected with described second short-circuit line 207; described second short-circuit line 207 replaces the first short-circuit line 202; second electrostatic discharge (ESD) protection electrode 208 replaces the first electrostatic discharge (ESD) protection electrode 203, carries out electrostatic discharge (ESD) protection to the device in X-ray detector manufacture process.In the manufacture process of X-ray detector, the electrostatic charge of the electrode of any be connected with the second metal interconnecting wires 209 with the first metal interconnecting wires 201 metal wire or transistor can be discharged by the second short-circuit line 207, second electrostatic discharge (ESD) protection electrode 208.
First short-circuit line 202 etches and disconnects and complete being etched in same etch chamber process of the second metal level by the present invention, removes, and form the second short-circuit line 207 to replace the first short-circuit line 202 by the first short-circuit line 202, reduces processing step.
As preferred embodiment, what described depositing second metal layer and the step of etching the second metal level utilized is the step forming the source-drain electrode (not shown) of thin-film transistor and the underlying metal of photodiode in the manufacturing process of the array base palte of X-ray detector, does not need like this to increase extra processing step.Position and the structure of the source-drain electrode of described thin-film transistor and the underlying metal of photodiode are same as the prior art, as the known technology of those skilled in the art, are not described in detail at this.The underlying metal of described photodiode is connected with the source electrode of thin-film transistor, and described drain electrode is connected with the second metal interconnecting wires.Described second metal interconnecting wires is simultaneously as the data wire of X-ray detector.
As another embodiment of the present invention, described second metal level etching is carried out with separating the etching of the first short-circuit line below the via hole of shorting region.Comprise particularly:
Second metal level is etched, forms the second metal interconnecting wires 209 at pad area, form the second short-circuit line 207 at shorting region, form the second electrostatic discharge (ESD) protection electrode 208 in electrostatic discharge (ESD) protection district;
The first short-circuit line 201 below via hole is etched simultaneously, etch at the first short-circuit line 201 disconnected, expose glass substrate to form via hole.
So far, the thin-film transistor of X-ray detector is formed, the first metal interconnecting wires be connected with described thin-film transistor gate is formed, and formed with described thin-film transistor the second metal interconnecting wires be connected that drains, the photodiode bottom metal be connected with thin-film transistor source electrode is formed.The per pass manufacture craft started at the first metal layer has the first electrostatic discharge (ESD) protection electrode or the second electrostatic discharge (ESD) protection electrode to carry out electrostatic discharge (ESD) protection; improve the yield of product; and when the second electrostatic discharge (ESD) protection electrode replaces the first electrostatic discharge (ESD) protection electrode; make use of existing etching technics the first short-circuit line is chopped off; first electrostatic discharge (ESD) protection electrode and substrate are disconnected, does not increase processing step.
Then, with reference to Figure 20, described second metal layer forms passivation layer (not shown), and etch described passivation layer, the second short-circuit line 207 of shorting region forms via hole 211, the size of described via hole 211 is greater than the size of via hole 212.Described via hole 211 exposes the second short-circuit line 207 surface.Described passivation layer, usually used as the passivation layer of the thin-film transistor of X-ray detector, for the protection of active layer and the source-drain electrode of thin-film transistor, makes it avoid damaging in follow-up etching.The material of described passivation layer is silicon nitride.The method of described etching comprises dry etching.
What the step of formation passivation layer of the present invention and the described passivation layer of etching utilized is the passivation layer making step of thin-film transistor in the array base palte manufacturing process of X-ray detector, position and the structure of the passivation layer of the thin-film transistor that described etching is formed are same as the prior art, as the known technology of those skilled in the art, do not describe in detail at this.
Please refer to Figure 21, Figure 21 is the cross-sectional view of Figure 20 along BB line.Described second metal layer forms passivation layer 210, and described passivation layer 210 covers the second metal interconnecting wires 209 and the second electrostatic discharge (ESD) protection electrode 208.Described via hole 211 exposes the surface of substrate 200.Please refer to Figure 22, Figure 22 is the cross-sectional view of Figure 20 along CC line.Described passivation layer 210 covers the second metal interconnecting wires 209 and the second electrostatic discharge (ESD) protection electrode 208.Described via hole 211 exposes the surface of the second short-circuit line 207.The manufacture craft of existing X-ray detector, after described passivation layer has etched, has needed active layer, the passivation layer of diode, the manufacture craft of common electrode layer of carrying out photodiode successively.Described manufacture craft is identical with the manufacture craft of existing X-ray detector.As technology as well known to those skilled in the art, do not describe in detail at this.In the process of the passivation layer of the active layer of described formation photodiode, diode, common electrode layer, the electrostatic charge on any first metal interconnecting wires or the second metal interconnecting wires can lead to corresponding short-circuit line, electrostatic discharge (ESD) protection electrode grounding.
As embodiments of the invention, please refer to Figure 23, side's deposition the 3rd metal level (not shown) over the passivation layer, described 3rd metal level is etched, the second short-circuit line 207 below the via hole 211 of described shorting region is as shown in figure 20 removed by described etching simultaneously, the second short-circuit line 207 forms via hole 214 and exposes substrate.Described via hole 214 replaces via hole 211, and it is inner that described via hole 214 extends to the first short-circuit line 202, exposes the surface of substrate.Now, the second electrostatic discharge (ESD) protection electrode 208 is disconnected by the second short-circuit line 207 and the second metal interconnecting wires 209, and electrostatic discharging path removes from X-ray detector.
As preferred embodiment, deposition of the present invention 3rd metal level and what utilize the etch step of described 3rd metal level is that the array base palte manufacture process of X-ray detector is to the formation of the photoresist layer of thin-film transistor and etch step, do not increase processing step, the step of usual making photoresist layer comprises: side's deposition the 3rd metal level over the passivation layer, described 3rd metal level is etched, above the active layer of thin-film transistor, forms photoresist layer.Described etching comprises wet etching.The present invention utilizes the etch step to photoresist layer, is removed by electrostatic discharge protective equipment from X-ray detector.Structure and the position of described photoresist layer are same as the prior art, as the known technology of those skilled in the art, do not describe in detail at this.
Please refer to Figure 24, Figure 24 is the cross-sectional view of Figure 23 along BB line.Form via hole 214, described via hole 214 exposes the surface of substrate 200.Reference Figure 25, Figure 25 are the cross-sectional view of Figure 23 along CC line.Described via hole 214, by disconnected for the second short-circuit line (not shown) etching, exposes the surface of substrate 200.
So far; the invention provides the manufacture method of the array base palte of X-ray detector; described method make use of the processing step in the manufacturing process of the array base palte of X-ray detector and carries out electrostatic discharge (ESD) protection to the array base palte of X-ray detector, does not increase unnecessary processing step.
Although the present invention with preferred embodiment openly as above; but it is not for limiting the present invention; any those skilled in the art without departing from the spirit and scope of the present invention; the Method and Technology content of above-mentioned announcement can be utilized to make possible variation and amendment to technical solution of the present invention; therefore; every content not departing from technical solution of the present invention; the any simple modification done above embodiment according to technical spirit of the present invention, equivalent variations and modification, all belong to the protection range of technical solution of the present invention.

Claims (17)

1. have a manufacturing method of array base plate for electrostatic protection, described method comprises:
Substrate is provided, deposits the first metal layer on the substrate;
Etch described the first metal layer, form the first metal interconnecting wires, the first short-circuit line, the first electrostatic discharge (ESD) protection electrode, described first short-circuit line connects the first metal interconnecting wires and the first electrostatic discharge (ESD) protection electrode;
Insulating barrier is formed above described first short-circuit line, the first metal interconnecting wires, the first electrostatic discharge (ESD) protection electrode;
Etch described insulating barrier, the insulating barrier above described first short-circuit line, the first metal interconnecting wires, the first electrostatic discharge (ESD) protection electrode forms via hole respectively;
At described insulating barrier disposed thereon second metal level;
Described second metal level is etched, form the second metal interconnecting wires, the second short-circuit line, the second electrostatic discharge (ESD) protection electrode by via hole and the first electrostatic discharge (ESD) protection electrode that are electrically connected with the first metal interconnecting wires by via hole, described second short-circuit line connects the second metal interconnecting wires and the second electrostatic discharge (ESD) protection electrode;
By the via hole on described first short-circuit line, described first short-circuit line is etched, described first short-circuit line etching is disconnected.
2. manufacturing method of array base plate as claimed in claim 1, is characterized in that, described first short-circuit line etching is disconnected and completed being etched in same etching process of the second metal level.
3. manufacturing method of array base plate as claimed in claim 1, it is characterized in that, described first short-circuit line and described second short-circuit line stagger mutually.
4. manufacturing method of array base plate as claimed in claim 1, it is characterized in that, described array base palte is X-ray detector array base palte.
5. manufacturing method of array base plate as claimed in claim 4, it is characterized in that, what deposit and etch the utilization of described the first metal layer is the step forming thin-film transistor gate in X-ray detector array base palte manufacturing process, and described first metal interconnecting wires is electrically connected described thin-film transistor gate.
6. manufacturing method of array base plate as claimed in claim 5, it is characterized in that, described the first metal layer is formed by the method for physical vapour deposition (PVD).
7. manufacturing method of array base plate as claimed in claim 5, is characterized in that, comprise wet etching to the etching of described the first metal layer.
8. manufacturing method of array base plate as claimed in claim 4, it is characterized in that, forming and etch described insulating barrier is the step forming insulating barrier and etching insulating layer in X-ray detector array base palte manufacturing process.
9. manufacturing method of array base plate as claimed in claim 8, is characterized in that, describedly carries out etching to described insulating barrier and comprises dry etching.
10. manufacturing method of array base plate as claimed in claim 8, it is characterized in that, described insulating layer material is silicon nitride.
11. manufacturing method of array base plate as claimed in claim 4, it is characterized in that, what deposit and etch described second metal level utilization is form the source-drain electrode of thin-film transistor and the step of photodiode underlying metal in X-ray detector array base palte manufacturing process.
12. manufacturing method of array base plate as described in claim 11, is characterized in that, comprise wet etching to the etching of the second metal level.
13. manufacturing method of array base plate as claimed in claim 1, is characterized in that, also comprise:
Described second metal interconnecting wires, the second short-circuit line, the second electrostatic discharge (ESD) protection electrode form passivation layer;
Described passivation layer is etched, in the passivation layer above described second short-circuit line, forms via hole;
Side's deposition third layer metal over the passivation layer;
Described third layer metal is etched;
By the via hole above the second short-circuit line, described second short-circuit line is etched, described second short-circuit line etching is disconnected.
14. manufacturing method of array base plate as claimed in claim 13, is characterized in that, described second short-circuit line etching is disconnected and completed being etched in same etching process of the 3rd metal level.
15. manufacturing method of array base plate as claimed in claim 13, is characterized in that, described second short-circuit line etching are disconnected and described first short-circuit line etching disconnected completing in same etching process.
16. manufacturing method of array base plate as claimed in claim 13, is characterized in that, forming and etch described passivation layer is the step forming passivation layer and Etch Passivation in X-ray detector array base palte manufacturing process.
17. manufacturing method of array base plate as claimed in claim 13, is characterized in that, deposition and etching third layer metal utilize the formation and etch step that form photoresist layer.
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CN102298239A (en) * 2011-08-25 2011-12-28 南京中电熊猫液晶显示科技有限公司 Metal-layer electrode on thin film transistor-liquid crystal display array substrate
US9142954B2 (en) 2012-06-29 2015-09-22 Shanghai Tianma Micro-electronics Co., Ltd. ESD protection system and X-ray flat panel detector
CN103296012B (en) * 2012-06-29 2016-02-10 上海天马微电子有限公司 ESD protective system and X-ray flat panel detector
CN104051455B (en) * 2014-06-09 2017-06-23 京东方科技集团股份有限公司 Array base palte and preparation method thereof, display device
CN104280912B (en) * 2014-10-13 2017-06-09 合肥鑫晟光电科技有限公司 Short-circuit unit and array base palte
CN104900633B (en) 2015-03-30 2018-04-03 京东方科技集团股份有限公司 A kind of manufacturing method of array base plate, array base palte and display device
CN107910333A (en) * 2017-10-27 2018-04-13 武汉华星光电半导体显示技术有限公司 Array base palte and display device
CN109727973B (en) * 2019-01-02 2021-04-23 合肥鑫晟光电科技有限公司 Preparation method of array substrate and array substrate

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6013923A (en) * 1995-07-31 2000-01-11 1294339 Ontario, Inc. Semiconductor switch array with electrostatic discharge protection and method of fabricating
CN1928681A (en) * 2005-09-05 2007-03-14 中华映管股份有限公司 Thin-film transistor array substrate, its electric static discharge protector and method for making same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7217591B2 (en) * 2004-06-02 2007-05-15 Perkinelmer, Inc. Method and process intermediate for electrostatic discharge protection in flat panel imaging detectors

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6013923A (en) * 1995-07-31 2000-01-11 1294339 Ontario, Inc. Semiconductor switch array with electrostatic discharge protection and method of fabricating
CN1928681A (en) * 2005-09-05 2007-03-14 中华映管股份有限公司 Thin-film transistor array substrate, its electric static discharge protector and method for making same

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