CN102243275A - Measuring method for parasitic capacitance in capacitance DC (direct current) model - Google Patents
Measuring method for parasitic capacitance in capacitance DC (direct current) model Download PDFInfo
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- CN102243275A CN102243275A CN201110103323XA CN201110103323A CN102243275A CN 102243275 A CN102243275 A CN 102243275A CN 201110103323X A CN201110103323X A CN 201110103323XA CN 201110103323 A CN201110103323 A CN 201110103323A CN 102243275 A CN102243275 A CN 102243275A
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Abstract
The invention relates to a measuring method for a parasitic capacitance in a capacitance DC (direct current) model. The measuring method comprises the following steps: selecting a capacitor and measuring the capacitance value between two test pads; forming a guide wire which is connected with the test pads, measuring and calculating the capacitance value generated by the guide wire; forming a rod-shaped wire which is connected with the guide wire, measuring and calculating the capacitance value generated by the rod-shaped wire; calculating the capacitance values generated by the guide wire and rod-shaped wire of a capacitor to be tested by using the size ratio of the guide wire and rod-shaped wire of the capacitor to be tested to the guide wire and rod-shaped wire of the selected capacitor; and calculating the parasitic capacitance of the capacitor to be tested according to the capacitance value between the test pads, the capacitance value generated by the guide wire of the capacitor to be tested and the capacitance value generated by the rod-shaped wire of the capacitor to be tested. The method provided by the invention can be used for reducing the wafer area occupied by a de-embedding structure.
Description
Technical field
The present invention relates to the field tests of semiconductor element, relate in particular to the measuring method of stray capacitance in a kind of electric capacity DC model.
Background technology
The integrated circuit that is formed on the semiconductor substrate comprises a plurality of active and passive elements, for example resistor, inductor, capacitor, transistor, amplifier etc.Said elements is to make according to design specification (design specification), wherein design specification definition electrology characteristic (as resistance value, inductance value, capacitance, gain etc.) and architectural feature that said elements showed.Generally speaking, hope can confirm whether the element of each manufacturing meets its specific design specification, yet after element was integrated into integrated circuit, individual other element usually can't be tested at an easy rate.Therefore, the independently duplicated element of integrated circuit individual elements (stand-alone copies) is made on the wafer (wafer), wherein, reproduction element is by the technology manufacturing identical with integrated circuit component, and have electrology characteristic identical and architectural feature, thereby replace the electrology characteristic of testing integrated circuit components with integrated circuit component.
At test period, reproduction element is connected to testing cushion (test pads) by shaft-like line (bar line) and guide wire (feed line), and testing cushion further is electrically connected to outside proving installation.Yet, though reproduction element can replace the architectural feature and the electrology characteristic of integrated circuit component accurately, but because the existence of shaft-like line, guide wire and testing cushion, the electrology characteristic that adopts reproduction element to measure comprises the ghost effect (parasitics) that is produced by described shaft-like line, guide wire and testing cushion (resistance value, capacitance and the inductance value of for example shaft-like line, guide wire and testing cushion).Prior art adopts the method that is called embedding (de-embedding) usually, measures the ghost effect that described shaft-like line, guide wire and testing cushion produce.
In the prior art, set up the electric capacity that electric capacity DC model need be measured various different lengths and width usually.The electric capacity of different size, the shaft-like line that is used to measure and the length of guide wire are also different with width, therefore, for the electric capacity to different size is removed ghost effect, just need make the corresponding embedded structure (de-embedding structure) that goes to the electric capacity of every kind of size, thereby cause needs to make the more embedded structure that goes, these go embedded structure can take bigger wafer area.
Summary of the invention
In order to reduce the wafer area that embedded structure takies, the invention provides the measuring method of stray capacitance in a kind of electric capacity DC model.
The measuring method of stray capacitance comprises the steps: to choose electric capacity in a kind of electric capacity DC model, is formed for measuring two testing cushion of the described electric capacity of choosing, and measures the capacitance between described two testing cushion; Formation is connected in the guide wire of described testing cushion, measures and calculate the capacitance that described guide wire produces; Formation is connected in the shaft-like line of described guide wire, measures and calculate the capacitance that described shaft-like line produces; Utilize the guide wire and the described dimension ratio of choosing the guide wire of electric capacity of testing capacitance, calculate the capacitance of the guide wire generation of described testing capacitance; Utilize the shaft-like line and the described dimension ratio of choosing the shaft-like line of electric capacity of testing capacitance, calculate the capacitance of the shaft-like line generation of described testing capacitance; According to the capacitance between the described testing cushion, the capacitance that the guide wire of described testing capacitance produces, the capacitance that the shaft-like line of described testing capacitance produces calculates the stray capacitance of described testing capacitance.
The preferred a kind of technical scheme of said method, form described guide wire after, measure the capacitance C2 between described two testing cushion, the capacitance C3=C2-C1 that then described guide wire produces, wherein, C1 is before described guide wire forms, the capacitance between described two testing cushion.
The preferred a kind of technical scheme of said method after formation is connected in the shaft-like line of described guide wire, is measured the capacitance C4 between described two testing cushion, the capacitance C5=C4-C2 that then described shaft-like line produces.
The preferred a kind of technical scheme of said method, the parasitic capacitance value C6=C1+C3*X+C5*Y of described testing capacitance, wherein, X is the guide wire and the described dimension ratio of choosing the guide wire of electric capacity of described testing capacitance, and Y is the shaft-like line and the described dimension ratio of choosing the shaft-like line of electric capacity of described testing capacitance.
The preferred a kind of technical scheme of said method, ratio X equals ratio Y.
The preferred a kind of technical scheme of said method, X is the guide wire and the described length ratio of choosing the guide wire of electric capacity of described testing capacitance.
The preferred a kind of technical scheme of said method, Y is the shaft-like line and the described length ratio of choosing the shaft-like line of electric capacity of described testing capacitance.
Compared with prior art, method of testing of the present invention is utilized the proportionate relationship between the size of capacitance that the shaft-like line, guide wire of different electric capacity produce and shaft-like line, guide wire, by making a kind of embedded structure that goes of electric capacity, can calculate the stray capacitance of different electric capacity, thereby reduce to take the area of wafer.
Description of drawings
Fig. 1 is the process flow diagram of the measuring method of stray capacitance in the electric capacity DC model of the present invention.
Fig. 2 is each step synoptic diagram of the measuring method of stray capacitance in the electric capacity DC model of the present invention to Fig. 5.
Embodiment
The stray capacitance of the stray capacitance that method of the present invention is used to measure for producing by shaft-like line, guide wire and testing cushion.The present invention utilizes the proportionate relationship between the size of capacitance that the shaft-like line, guide wire of different electric capacity produce and shaft-like line, guide wire, by making a kind of embedded structure that goes of electric capacity, can calculate the stray capacitance of different electric capacity.For making the purpose, technical solutions and advantages of the present invention clearer, the present invention is described in further detail below in conjunction with accompanying drawing.
See also Fig. 1, Fig. 1 is the process flow diagram of the measuring method of stray capacitance in the electric capacity DC model of the present invention.The measuring method of stray capacitance comprises the steps: in the electric capacity DC model of the present invention
Choose electric capacity, be formed for measuring two testing cushion 11 of the described electric capacity of choosing, as shown in Figure 2, measure the capacitance C1 between described two testing cushion 11.
Formation is connected in the guide wire 12 of described testing cushion 11, as shown in Figure 3, measures and calculate the capacitance C3 that described guide wire 12 produces.Preferably, after forming described guide wire 12, measure the capacitance C2 between described two testing cushion 12, then the capacitance C3=C2-C1 that produces of the guide wire 12 between two testing cushion 11.
Formation is connected in the shaft-like line 13 of described guide wire 12, as shown in Figure 4, measures and calculate the capacitance C5 that described shaft-like line 13 produces.Preferably, after forming described shaft-like line 13, measure the capacitance C4 between described two testing cushion 11, the capacitance C5=C4-C2 that then described shaft-like line 13 produces.
Choose testing capacitance, as shown in Figure 5, utilize the guide wire 14 and the described dimension ratio of choosing the guide wire 12 of electric capacity of testing capacitance, calculate the capacitance C3*X of guide wire 14 generations of described testing capacitance, wherein, X is the guide wire 14 and the described dimension ratio of choosing the guide wire 12 of electric capacity of described testing capacitance, and preferred, described ratio is length ratio.
Utilize the shaft-like line 15 and the described dimension ratio of choosing the shaft-like line 13 of electric capacity of testing capacitance, calculate the capacitance C5*Y of shaft-like line 15 generations of described testing capacitance, wherein, Y is the shaft-like line 15 and the described dimension ratio of choosing the shaft-like line 13 of electric capacity of described testing capacitance, preferably, described ratio is length ratio, and described ratio X also can equate with Y.
According to the capacitance C1 between the described testing cushion 11, the capacitance C3*X that the guide wire of described testing capacitance 14 produces, the capacitance C5*Y that the shaft-like line 15 of described testing capacitance produces calculates the stray capacitance C6=C1+C3*X+C5*Y of described testing capacitance.Preferably, when X=Y, the stray capacitance C6=C1+C3*X+C5*X of described testing capacitance.
Compared with prior art, method of testing of the present invention is utilized the proportionate relationship between the size of capacitance that the shaft-like line, guide wire of different electric capacity produce and shaft-like line, guide wire, by making a kind of embedded structure that goes of electric capacity, can calculate the stray capacitance of different electric capacity, thereby reduce to take the area of wafer.
Under situation without departing from the spirit and scope of the present invention, can also constitute many very embodiment of big difference that have.Should be appreciated that except as defined by the appended claims, the present invention is not limited at the specific embodiment described in the instructions.
Claims (7)
1. the measuring method of stray capacitance in the electric capacity DC model is characterized in that, comprises the steps:
Choose electric capacity, be formed for measuring two testing cushion of the described electric capacity of choosing, measure the capacitance between described two testing cushion;
Formation is connected in the guide wire of described testing cushion, measures and calculate the capacitance that described guide wire produces;
Formation is connected in the shaft-like line of described guide wire, measures and calculate the capacitance that described shaft-like line produces;
Utilize the guide wire and the described dimension ratio of choosing the guide wire of electric capacity of testing capacitance, calculate the capacitance of the guide wire generation of described testing capacitance;
Utilize the shaft-like line and the described dimension ratio of choosing the shaft-like line of electric capacity of testing capacitance, calculate the capacitance of the shaft-like line generation of described testing capacitance;
According to the capacitance between the described testing cushion, the capacitance that the guide wire of described testing capacitance produces, the capacitance that the shaft-like line of described testing capacitance produces calculates the stray capacitance of described testing capacitance.
2. the measuring method of stray capacitance in the electric capacity DC model as claimed in claim 1, it is characterized in that, after forming described guide wire, measure the capacitance C2 between described two testing cushion, the capacitance C3=C2-C1 that then described guide wire produces, wherein, C1 is before described guide wire forms, the capacitance between described two testing cushion.
3. the measuring method of stray capacitance in the electric capacity DC model as claimed in claim 2, it is characterized in that, after formation is connected in the shaft-like line of described guide wire, measure the capacitance C4 between described two testing cushion, the capacitance C5=C4-C2 that then described shaft-like line produces.
4. the measuring method of stray capacitance in the electric capacity DC model as claimed in claim 3, it is characterized in that, the parasitic capacitance value C6=C1+C3*X+C5*Y of described testing capacitance, wherein, X is the guide wire and the described dimension ratio of choosing the guide wire of electric capacity of described testing capacitance, and Y is the shaft-like line and the described dimension ratio of choosing the shaft-like line of electric capacity of described testing capacitance.
5. the measuring method of stray capacitance is characterized in that X=Y in the electric capacity DC model as claimed in claim 4.
6. the measuring method of stray capacitance is characterized in that in the electric capacity DC model as claimed in claim 4, and X is the guide wire and the described length ratio of choosing the guide wire of electric capacity of described testing capacitance.
7. the measuring method of stray capacitance is characterized in that in the electric capacity DC model as claimed in claim 4, and Y is the shaft-like line and the described length ratio of choosing the shaft-like line of electric capacity of described testing capacitance.
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| CN201110103323.XA CN102243275B (en) | 2011-04-25 | 2011-04-25 | Measuring method for parasitic capacitance in capacitance DC (direct current) model |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104635135A (en) * | 2015-01-30 | 2015-05-20 | 中国科学院微电子研究所 | De-embedding method of compound semiconductor device |
| CN106154052A (en) * | 2016-07-18 | 2016-11-23 | 武汉华星光电技术有限公司 | The method for measurement of the parasitic capacitance of the metal routing of display floater |
| CN112881882A (en) * | 2021-01-08 | 2021-06-01 | 苏州苏纳光电有限公司 | Method and device for testing parasitic capacitance of semiconductor chip |
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2011
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Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104635135A (en) * | 2015-01-30 | 2015-05-20 | 中国科学院微电子研究所 | De-embedding method of compound semiconductor device |
| CN106154052A (en) * | 2016-07-18 | 2016-11-23 | 武汉华星光电技术有限公司 | The method for measurement of the parasitic capacitance of the metal routing of display floater |
| CN112881882A (en) * | 2021-01-08 | 2021-06-01 | 苏州苏纳光电有限公司 | Method and device for testing parasitic capacitance of semiconductor chip |
| CN112881882B (en) * | 2021-01-08 | 2023-02-07 | 苏州苏纳光电有限公司 | Method and device for testing parasitic capacitance of semiconductor chip |
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| CN102243275B (en) | 2015-05-20 |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HONGLI SEMICONDUCTOR MANUFACTURE CO LTD, SHANGHAI Effective date: 20140429 |
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