CN102237488A - Phase-change random access memory device unit and preparation method thereof - Google Patents

Phase-change random access memory device unit and preparation method thereof Download PDF

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CN102237488A
CN102237488A CN2010101524557A CN201010152455A CN102237488A CN 102237488 A CN102237488 A CN 102237488A CN 2010101524557 A CN2010101524557 A CN 2010101524557A CN 201010152455 A CN201010152455 A CN 201010152455A CN 102237488 A CN102237488 A CN 102237488A
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insulating barrier
electrode material
change material
phase
unit
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CN102237488B (en
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徐成
宋志棠
刘波
吴关平
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Shanghai Institute of Microsystem and Information Technology of CAS
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Shanghai Institute of Microsystem and Information Technology of CAS
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Abstract

The invention relates to a phase-change random access memory device unit and a preparation method thereof. A heating electrode material of the device unit is in an inverted cone shape; the area of a bottom surface of the heating electrode material is smaller than that of a top surface of the inverted cone; and the heating electrode material is positioned above a phase-change material unit, extends downwards and is contacted with the phase-change material unit. The method comprises the following steps of: preparing a phase-change material; preparing an inverted conical hole by using an advanced semiconductor etching technology; and adding the heating electrode material, and planarizing to make a phase-change area formed at an upper edge of the phase-change material. By using the advanced etching technology, the size of the lower end of the inverted conical hole is further reduced, and contact area of the heating electrode material and the phase-change material is reduced, so the aims of reducing an operating current of the device unit, reducing energy consumption and improving the reliability of the device unit are fulfilled.

Description

A kind of phase transformation memory device unit and preparation method
Technical field
The present invention relates to a kind of phase transition storage, device cell of especially a kind of phase transition storage and preparation method thereof.The invention belongs to the micro-nano art of electronics.
Background technology
Phase transition storage (Phase Change Random Access Memory, PCRAM) technology is based on S.R.Ovshinsky at late 1960s (Phys.Rev.Lett., 21,1450-1453,1968) beginning of the seventies (Appl.Phys.Lett., 18,254-257,1971) propose that conception that phase-change thin film can be applied to the phase change memory medium sets up.Phase transition storage is compared the advantage that has clearly with present dynamic random access memory (DRAM), flash memory (FLASH): volume is little, driving voltage is low, power consumption is little, read or write speed is fast and non-volatile characteristic.PCRAM is not only non-volatility memorizer, can impact by anti-high and low-temp, and therefore anti-irradiation, anti-vibration not only will be widely applied to civilian daily portable electronic products, and in military fields such as Aero-Space huge potential application be arranged.Major companies such as existing in the world Ovonyx, Intel, Samsung, Hitachi, STMicroelectronics and British Aerpspace are carrying out the R﹠D work of the aspects such as perfect and manufacturability of technology in the research of carrying out the PCM memory.
Low operating current and low-power consumption when the target of PCRAM research at present is to realize the phase transition storage operation.PCRAM realizes that the mode that writes and wipe of information is to utilize Joule heat that the phase-change material of tiny area is undergone phase transition, and the size of phase change region is more little, and it is just low more to undergo phase transition required power consumption.More little even reach the three-dimensional manometer yardstick when the size of device cell, the superiority of PCRAM will be got over fully and be embodied.Therefore, to the focus of being developed to of PCRAM device architecture in order to study.The PCRAM device unit construction of having studied at present has a variety of, comprise " mushroom-shaped " device architecture (International Electron Devices Meeting, 2006), EDGE CONTACT (Symposium on VLSI Technology Digest of TechnicalPapers, 175,2003), u shape structure (IEEE Solid-State Circuits, 40,1557,2005), annular electrode structure (Jpn.J.Appl.Phys., 46,2007), phase-change material bridge architecture (IEDM, 2006) and vertical diode and autoregistration lower electrode arrangement (ISSCC, 472,2007) or the like.Yet, in these structures, except the structural phase-change material of EDGE CONTACT contacts at horizontal direction with heating electrode, phase-change material all is positioned at the top of heating electrode in all the other structures, phase change region is the lower edge of phase-change material, in these structures, there is technical bottleneck in the size of further dwindling heating electrode.
Summary of the invention
The technical problem that the present invention mainly solves is to provide a kind of phase transformation memory device unit and preparation method.
In order to solve the problems of the technologies described above, the present invention adopts following technical scheme:
A kind of phase transformation memory device unit, comprise: substrate, be positioned at first insulating barrier on the described substrate, be positioned at the lower electrode layer on described first insulating barrier, be positioned at second insulating barrier on the described lower electrode layer, be positioned at the phase change material unit on described second insulating barrier;
In described second insulating barrier, be provided with first electrode material, respectively with its under lower electrode layer contact with phase change material unit on it; Being provided with the phase-change material protective layer on described phase change material unit wraps up described phase change material unit;
On described phase change material unit and described second insulating barrier, be provided with the 3rd insulating barrier, be provided with the heating electrode material and second electrode material in described the 3rd insulating barrier; Described heating electrode material is a back taper, and its base area be positioned at described phase change material unit top, and extension contacts downwards less than top surface area with described phase change material unit; Described second electrode material extends downward described lower electrode layer, and contacts with described lower electrode layer, and does not contact with described phase change material unit;
On the described heating electrode material and second electrode material, be respectively equipped with top electrode; On described the 3rd insulating barrier and around the described top electrode, be provided with the 4th insulating barrier, only expose the upper surface of described top electrode.
Wherein, the shape of cross section of described phase change material unit is any one in annular, circle, rectangle, ellipse and the polygon; The height of described phase change material unit is 3-300nm; Any 2 ultimate range is 3-500nm on the section girth of described phase change material unit.
The shape of cross section of described first electrode material, second electrode material and heating electrode material is any one in annular, circle, rectangle, ellipse and the polygon; The height of described first electrode material and second electrode material is 3-300nm, and any 2 ultimate range is 3-500nm on the section girth.
The material of described first, second, third and fourth insulating barrier is a kind of in oxide, nitride, carbide or the sulfide or the mixture of at least two kinds of compositions wherein; The material of described lower electrode layer, first electrode material, second electrode material, heating electrode material and top electrode is any one or at least two kinds of alloy materials that are combined into wherein among W, Ti, TiN, Al, AlCu, Cu, Pt, Au, the Ni; The material of described phase change material unit is a kind of or wherein at least two kinds the combination among chalcogenide compound, GeTi or the SiSb; The material of described phase-change material protective layer is a kind of in oxide, nitride, carbide or the sulfide or the mixture of at least two kinds of compositions wherein.
As one of preferred version of the present invention, be respectively equipped with thermal insulation layer between described phase change material unit and described first electrode material and the heating electrode material.The material of described thermal insulation layer is GeN, TiO 2, Ta 2O 5In a kind of.
The preparation method of above-mentioned phase transformation memory device unit comprises the steps:
(1) preparation first insulating barrier on substrate prepares lower electrode layer on described first insulating barrier, preparation second insulating barrier on described lower electrode layer;
(2) on described second insulating barrier, offer through hole, fill first electrode material, make it to contact with lower electrode layer under it;
(3) on described second insulating barrier, prepare phase change material unit, it is contacted with described first electrode material;
(4) preparation phase-change material protective layer on step (3) resulting structures is with described phase change material unit parcel;
(5) preparation the 3rd insulating barrier on step (4) resulting structures, and with described the 3rd insulating barrier planarization;
(6) on described the 3rd insulating barrier, offer two through holes, fill the heating electrode material and second electrode material respectively, the heating electrode material that makes filling is the back taper of base area less than top surface area, and be positioned at described phase change material unit top, and extension contacts with described phase change material unit downwards, described second electrode material extends downward described lower electrode layer, contacts with described lower electrode layer, and does not contact with described phase change material unit;
(7) two top electrodes of preparation on described the 3rd insulating barrier contact with second electrode material with described heating electrode material respectively;
(8) preparation the 4th insulating barrier on step (7) resulting structures, and the upper surface of described top electrode is exposed.
As one of preferred version of the present invention, preparing respectively between described phase change material unit and described first electrode material and the heating electrode material has thermal insulation layer.
As one of preferred version of the present invention, in step (2) or (6), offer method that through hole adopts and be in photoetching technique, focused ion beam exposure lithographic technique, electron beam lithography or the nanometer embossing any one.
Wherein, the method for described first, second, third and fourth insulating barrier of preparation, lower electrode layer, first electrode material, second electrode material, heating electrode material, top electrode, phase change material unit and phase-change material protective layer is any one in physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, thermal oxidation method, plasma assisted deposition method or the atomic layer deposition method.
Beneficial effect of the present invention is: can adopt advanced lithographic technique, the reverse taper hole lower end size that will be used to fill heating electrode material is further dwindled, reduce heating electrode material and phase-change material contact area, thereby reach the purpose that reduces the device cell operating current, reduces power consumption and increase device reliability.
Description of drawings
Fig. 1 is the schematic diagram of step 1) in the specific embodiment of the invention.
Fig. 2 is a step 2 in the specific embodiment of the invention) schematic diagram.
Fig. 3 is the schematic diagram of step 3) in the specific embodiment of the invention.
Fig. 4 is the schematic diagram of step 4) in the specific embodiment of the invention.
Fig. 5 is the schematic diagram of step 5) in the specific embodiment of the invention.
Fig. 6 is the schematic diagram of step 6) in the specific embodiment of the invention.
Fig. 7 is the schematic diagram of step 7) in the specific embodiment of the invention.
Fig. 8 is the schematic diagram of step 8) in the specific embodiment of the invention.
Fig. 9 is the schematic diagram of step 9) in the specific embodiment of the invention.
Figure 10 is the schematic diagram of step 10) in the specific embodiment of the invention.
Figure 11 is that the heating electrode material cross section of preparing in the embodiment of the invention 3 is the schematic diagram of the phase transformation memory device unit of annular.
Figure 12 is the schematic diagram that a kind of heating electrode with thermal insulation layer interlayer of preparing in the embodiment of the invention 4 is the deformation memory device unit of back taper.
Figure 13 is that the heating electrode that the another kind prepared in the embodiment of the invention 4 has a thermal insulation layer interlayer is the schematic diagram of the deformation memory device unit of back taper.
Among the figure: the 1-substrate; 2-first insulating barrier; The 3-lower electrode layer; 4-second insulating barrier; 5-first electrode material; The 6-phase change material unit; 7-phase-change material protective layer; 8-the 3rd insulating barrier; The 9-heating electrode material; 10-second electrode material; The 11-top electrode; 12-the 4th insulating barrier.
Embodiment
Below in conjunction with accompanying drawing, further specify the specific embodiment of the present invention.
The preparation process of phase transformation memory device unit provided by the present invention, referring to Fig. 1-10, specific as follows:
1) preparation first insulating barrier 2 (as shown in Figure 1) on substrate 1, the method that is adopted is any one in physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, thermal oxidation method, plasma assisted deposition method or the atomic layer deposition method.Wherein, the material of first insulating barrier 2 by in oxide, nitride, carbide or the sulfide a kind of constitute or at least two kinds form mixture and constitute.Substrate 1 be in silicon, glass, three or five family's semi-conducting materials (as GaAs), oxide, nitride, plastics or the crystalline material on silicon chip, the insulating barrier any one.
2) preparation lower electrode layer 3 (as shown in Figure 2) on first insulating barrier 2, the method that is adopted is any one in physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, plasma assisted deposition method or the atomic layer deposition method; The material of lower electrode layer 3 be among W, Ti, TiN, Al, AlCu, Cu, Pt, Au, the Ni any one or wherein at least two kinds be combined into alloy material.
3) preparation second insulating barrier 4 (as shown in Figure 3) on lower electrode layer 3, the method that is adopted is any one in physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, plasma assisted deposition method or the atomic layer deposition method.Wherein, the material of second insulating barrier 4 by in oxide, nitride, carbide or the sulfide a kind of constitute or at least two kinds form mixture and constitute.
4) first electrode material 5 is filled in perforate on second insulating barrier 4, makes it to keep excellent contact (as shown in Figure 4) with lower electrode layer 3, fills the back and removes unnecessary electrode material on second insulating barrier 4.The method that perforate is adopted in second insulating barrier 4 is any one in photoetching technique, focused ion beam exposure lithographic technique, electron beam lithography or the nanometer embossing; The method that filling first electrode material 5 is adopted in the hole of second insulating barrier 4 is any one in physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, plasma assisted deposition method or the atomic layer deposition method; First electrode material 5 among W, Ti, TiN, Al, AlCu, Cu, Pt, Au, the Ni any one or wherein at least two kinds be combined into alloy material; The shape of cross section of first electrode material 5 is any one in annular, circle, rectangle, ellipse and the polygon, and it is 3-300nm highly, and any 2 ultimate range is 3-500nm on the section girth; The method that unnecessary electrode material adopted on second insulating barrier 4 removed is any one in chemical Mechanical Polishing Technique or the etch-back techniques (etchback).
5) then on second insulating barrier 4, prepare phase change material unit 6, make it contact (as shown in Figure 5) with described first electrode material 5.At first adopt any one method sediment phase change material in method physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, plasma assisted deposition method or the atomic layer deposition method, phase-change material is a kind of or wherein at least two kinds the combination among chalcogenide compound, GeTi or the SiSb; Make phase-change material graphical then, make required phase change material unit 6, patterned method is any one in photoetching technique, focused ion beam exposure lithographic technique, electron beam lithography or the nanometer embossing.The shape of cross section of the phase change material unit 6 that obtains at last is any one in annular, circle, rectangle, ellipse and the polygon, highly is 3-300nm, and any 2 ultimate range is 3-500nm on its section girth.
6) preparation phase-change material protective layer 7 on phase change material unit 6, with described phase change material unit 6 parcels (as shown in Figure 6), its method is any one in physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, plasma assisted deposition method or the atomic layer deposition method; The material of phase-change material protective layer 7 for by in oxide, nitride, carbide or the sulfide a kind of constitute or at least two kinds form mixture and constitute.
7) preparation the 3rd insulating barrier 8 (as shown in Figure 7) on phase-change material protective layer 7, its method is any one in physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, plasma assisted deposition method or the atomic layer deposition method; The 3rd insulating barrier 8 by in oxide, nitride, carbide or the sulfide a kind of constitute or at least two kinds form mixture and constitute.With 8 planarizations of the 3rd insulating barrier, the method for employing is a chemical Mechanical Polishing Technique.
8) offer at least two through holes in the 3rd insulating barrier 8, fill the heating electrode material 9 and second electrode material 10 respectively, the through hole that is used to fill heating electrode material 9 is a back taper, and the base area of heating electrode material 9 that makes filling is less than top surface area.And make described heating electrode material 9 be positioned at described phase change material unit 9 tops, and extension contacts with described phase change material unit 6 downwards, described second electrode material 10 extends downward described lower electrode layer 3, contact with described lower electrode layer 3, and do not contact (as shown in Figure 8) with described phase change material unit 6, fill the back and remove unnecessary electrode material on the 3rd insulating barrier 8.The method that perforate is adopted in the 3rd insulating barrier 8 is any one in photoetching technique, focused ion beam exposure lithographic technique, electron beam lithography or the nanometer embossing; The method that the filling heating electrode material 9 and second electrode material 10 are adopted in the hole of the 3rd insulating barrier 8 is any one in physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, plasma assisted deposition method or the atomic layer deposition method; The heating electrode material 9 and second electrode material 10 among W, Ti, TiN, Al, AlCu, Cu, Pt, Au, the Ni any one or wherein at least two kinds be combined into alloy material; Remove unnecessary electrode material adopted on the 3rd insulating barrier 8 method and be in chemical Mechanical Polishing Technique or the etch-back techniques (etch back) any one.Wherein, heating electrode material 9 be shaped as back taper, the reverse taper hole lower end size that can will be used to fill heating electrode material 9 by advanced person's lithographic technique is further dwindled, reaching the effect that reduces heating electrode material 9 and phase change material unit 6 contacts area, thereby reduce operating current and power consumption.
9) then on the 3rd insulating barrier 8, prepare two top electrodes 11, contact (as shown in Figure 9) with described heating electrode material 9 with second electrode material 10 respectively.At first, the deposition upper electrode material, the method for employing is any one in physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, plasma assisted deposition method or the atomic layer deposition method; Upper electrode material be among W, Ti, TiN, Al, AlCu, Cu, Pt, Au, the Ni any one or wherein at least two kinds be combined into alloy material.Then, with the required top electrode 11 of the graphical formation of upper electrode material, the method for employing is any one in photoetching technique, focused ion beam exposure lithographic technique, electron beam lithography or the nanometer embossing.
10) preparation the 4th insulating barrier 12 on resulting structures, and the upper surface of described top electrode 11 is exposed (as shown in figure 10).Deposit method that the 4th insulating barrier 12 adopted and be in physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, plasma assisted deposition method or the atomic layer deposition method any one.Wherein, the material of the 4th insulating barrier 12 by in oxide, nitride, carbide or the sulfide a kind of constitute or at least two kinds form mixture and constitute.Then, the 4th insulating barrier 12 is graphical, the upper surface of described top electrode 11 is exposed, the method for employing is any one in photoetching technique, focused ion beam exposure lithographic technique, electron beam lithography or the nanometer embossing.
This shows, adopt said method just to obtain phase transformation memory device unit of the present invention, shown in Figure 10,11, it comprises: substrate 1, be positioned at first insulating barrier 2 on the substrate 1, be positioned at the lower electrode layer 3 on first insulating barrier 2, be positioned at second insulating barrier 4 on the lower electrode layer 3, be positioned at the phase change material unit 6 on second insulating barrier 4; In second insulating barrier 4, be provided with first electrode material 5, respectively with its under lower electrode layer 5 contact with phase change material unit 6 on it; On phase change material unit 6, be provided with phase-change material protective layer 7 with phase change material unit 6 parcels; On the phase change material unit 6 and second insulating barrier 4, be provided with the 3rd insulating barrier 8; Be provided with the heating electrode material 9 and second electrode material 10 in the 3rd insulating barrier 8; Heating electrode material 9 is a back taper, and its base area is positioned at described phase change material unit 6 tops less than top surface area, and extension contacts with phase change material unit 6 downwards; Second electrode material 10 extends downward described lower electrode layer 3, and contacts with lower electrode layer 3, and does not contact with phase change material unit 6; On the heating electrode material 9 and second electrode material 10, be respectively equipped with top electrode 11; Be provided with the 4th insulating barrier 12 on the 3rd insulating barrier 8 and around the top electrode 11, the upper surface that only exposes described top electrode 11 wraps other parts for the test use.Wherein, the shape of cross section of phase change material unit 6, first electrode material 5, second electrode material 10 and heating electrode material 9 is any one in annular, circle, rectangle, ellipse and the polygon.
As preferred version of the present invention, shown in Figure 12,13, between phase change material unit 6 and described first electrode material 5 and heating electrode material 9, be respectively equipped with thermal insulation layer.The material of described thermal insulation layer is GeN, TiO 2, Ta 2O 5In a kind of.
Below be several specific embodiment of the present invention:
Embodiment 1
A specific embodiment of the present invention is as follows:
Step 1: substrate adopts silicon chip, adopts thermal oxidation method to prepare one deck SiO on silicon chip 2As first insulating barrier, film thickness is 500nm.
Step 2: at SiO 2Adopt the method for magnetron sputtering to prepare the Al film as lower electrode layer, film thickness 300nm on first insulating barrier.
Step 3: on the Al film, adopt the method for chemical vapour deposition (CVD) to prepare SiO 2As second insulating barrier, film thickness is 500nm.
Step 4: at SiO 2Adopt on second insulating barrier that photoetching technique is exposed, etching technics, prepare the circular hole that diameter is 300nm, expose the Al lower electrode layer in the hole; In the hole, adopt the method for MOCVD and physical vapour deposition (PVD) to fill electrode material Ti/TiN and W respectively as first electrode material; Utilize CMP (Chemical Mechanical Polishing) process to remove SiO 2Unnecessary electrode material Ti/TiN and W on second insulating barrier.
Step 5: at SiO 2Adopt the method for magnetron sputtering to prepare phase-change material Ge on second insulating barrier 2Sb 2Te 5, film thickness 100nm; Adopt then that photoetching technique is exposed, etching technics, realize phase-change material Ge 2Sb 2Te 5graphically obtain phase change material unit.
Step 6: on phase change material unit, adopt the method for PECVD to prepare phase-change material protective layer SiN, thickness 20nm.
Step 7: on the phase-change material protective layer, adopt the method for PECVD to prepare SiO 2As the 3rd insulating barrier; And adopt CMP (Chemical Mechanical Polishing) process to realize SiO 2The planarization of the 3rd insulating barrier.
Step 8: at SiO 2Adopt in the 3rd insulating barrier that photoetching technique is exposed, etching technics, prepare two kinds of different round tube holes, a kind of for reverse tapered shapes and expose Ge 2Sb 2Te 5Phase change material unit, another kind are exposed the Al lower electrode layer, adopt the method for MOCVD and physical vapour deposition (PVD) to fill electrode material Ti/TiN and W respectively as the heating electrode material and second electrode material then in the hole; Utilize CMP (Chemical Mechanical Polishing) process to remove SiO 2Unnecessary electrode material Ti/TiN and W on the 3rd insulating barrier.
Step 9: at SiO 2Adopt the method for magnetron sputtering to prepare the Al film, film thickness 300nm on the 3rd insulating barrier; The employing photoetching technique is exposed, etching, produces top electrode, and realizes the planarization of Al film top electrode.
Step 10: on the Al top electrode, adopt the method for PECVD to prepare SiO 2The 4th insulating barrier utilizes that photoetching technique is exposed, etching, realizes SiO 2The 4th insulating barrier graphical exposed the upper surface of top electrode.
The phase transformation memory device unit of gained as shown in figure 10 thus.
Embodiment 2
Adopt roughly the same technical scheme with embodiment 1, difference is: with the Ge among the embodiment 1 2Sb 2Te 5Phase-change material changes Sb into 2Te 3, Si 2Sb 2Te 5, GeTi, SiSb or Ge 1Sb 2Te 4Deng material, remainder is identical with embodiment 1.
Embodiment 3
Change into the step 4 among the embodiment 1,2 as follows: at SiO 2Adopt on second insulating barrier that photoetching technique is exposed, etching technics, prepare the circular hole that diameter is 300nm, expose the Al lower electrode layer in the hole; In the hole, adopt the method for MOCVD and ald to fill electrode material Ti/TiN and SiN respectively; Utilize CMP (Chemical Mechanical Polishing) process to remove SiO 2Unnecessary electrode material Ti/TiN and SiN on second insulating barrier.
Change into the step 8 among the embodiment 1,2 as follows: at SiO 2Adopt in the 3rd insulating barrier that photoetching technique is exposed, etching technics, prepare two kinds of different circular holes, a kind ofly be reverse tapered shapes and expose phase change material unit, another kind exposes the Al lower electrode layer, adopts the method for MOCVD and ald to fill electrode material Ti/TiN and SiN respectively then in the hole; Utilize CMP (Chemical Mechanical Polishing) process to remove SiO 2Unnecessary electrode material Ti/TiN and SiN on the 3rd insulating barrier.
All the other steps and embodiment 1,2 are identical, and the heating electrode material cross section that can prepare thus is the phase transformation memory device unit of annular, as shown in figure 11.
Embodiment 4
At embodiment 1,2, add GeN, TiO between first electrode material in 3 and heating electrode material and the phase change material unit 2, Ta 2O 5Deng in a kind of as thermal insulation layer, can prepare the deformation memory device unit that the heating electrode with thermal insulation layer interlayer is a back taper, shown in Figure 12,13.
The present invention considers and prepares phase-change material earlier that heating electrode material and planarization are inserted in the hole by adopting the sophisticated semiconductor lithographic technique to prepare back taper then, make phase change region occur in the upper edge of phase-change material.Owing to adopt advanced lithographic technique, the size of the lower end, hole of back taper further can be dwindled, reduce the device cell operating current, reduce power consumption and increase the purpose of device reliability thereby reach.
The other technologies that relate among the present invention belong to the category that those skilled in the art are familiar with, and do not repeat them here.The foregoing description is the unrestricted technical scheme of the present invention in order to explanation only.Any technical scheme that does not break away from spirit and scope of the invention all should be encompassed in the middle of the patent claim of the present invention.

Claims (13)

1. phase transformation memory device unit, it is characterized in that, comprise: substrate, be positioned at first insulating barrier on the described substrate, be positioned at the lower electrode layer on described first insulating barrier, be positioned at second insulating barrier on the described lower electrode layer, be positioned at the phase change material unit on described second insulating barrier;
In described second insulating barrier, be provided with first electrode material, respectively with its under lower electrode layer contact with phase change material unit on it; Being provided with the phase-change material protective layer on described phase change material unit wraps up described phase change material unit;
On described phase change material unit and described second insulating barrier, be provided with the 3rd insulating barrier, be provided with the heating electrode material and second electrode material in described the 3rd insulating barrier; Described heating electrode material is a back taper, and its base area be positioned at described phase change material unit top, and extension contacts downwards less than top surface area with described phase change material unit; Described second electrode material extends downward described lower electrode layer, and contacts with described lower electrode layer, and does not contact with described phase change material unit;
On the described heating electrode material and second electrode material, be respectively equipped with top electrode; On described the 3rd insulating barrier and around the described top electrode, be provided with the 4th insulating barrier, only expose the upper surface of described top electrode.
2. according to the described a kind of phase transformation memory device unit of claim 1, it is characterized in that: the shape of cross section of described phase change material unit is any one in annular, circle, rectangle, ellipse and the polygon.
3. according to the described a kind of phase transformation memory device unit of claim 1, it is characterized in that: the shape of cross section of described first electrode material, second electrode material and heating electrode material is any one in annular, circle, rectangle, ellipse and the polygon.
4. according to the described a kind of phase transformation memory device unit of claim 1, it is characterized in that: the material of described first, second, third and fourth insulating barrier is a kind of in oxide, nitride, carbide or the sulfide or the mixture of at least two kinds of compositions wherein.
5. according to the described a kind of phase transformation memory device unit of claim 1, it is characterized in that: the material of described lower electrode layer, first electrode material, second electrode material, heating electrode material and top electrode is any one or at least two kinds of alloy materials that are combined into wherein among W, Ti, TiN, Al, AlCu, Cu, Pt, Au, the Ni.
6. according to the described a kind of phase transformation memory device unit of claim 1, it is characterized in that: the material of described phase change material unit is a kind of or wherein at least two kinds the combination among chalcogenide compound, GeTi or the SiSb.
7. according to the described a kind of phase transformation memory device unit of claim 1, it is characterized in that: the material of described phase-change material protective layer is a kind of in oxide, nitride, carbide or the sulfide or the mixture of at least two kinds of compositions wherein.
8. according to the described a kind of phase transformation memory device unit of claim 1, it is characterized in that: be respectively equipped with thermal insulation layer between described phase change material unit and described first electrode material and the heating electrode material.
9. described according to Claim 8 a kind of phase transformation memory device unit is characterized in that: the material of described thermal insulation layer is GeN, TiO 2, Ta 2O 5In a kind of.
10. the preparation method of a phase transformation memory device unit is characterized in that, comprises the steps:
(1) preparation first insulating barrier on substrate prepares lower electrode layer on described first insulating barrier, preparation second insulating barrier on described lower electrode layer;
(2) on described second insulating barrier, offer through hole, fill first electrode material, make it to contact with lower electrode layer under it;
(3) on described second insulating barrier, prepare phase change material unit, it is contacted with described first electrode material;
(4) preparation phase-change material protective layer on step (3) resulting structures is with described phase change material unit parcel;
(5) preparation the 3rd insulating barrier on step (4) resulting structures, and with described the 3rd insulating barrier planarization;
(6) on described the 3rd insulating barrier, offer two through holes, fill the heating electrode material and second electrode material respectively, the heating electrode material that makes filling is the back taper of base area less than top surface area, and be positioned at described phase change material unit top, and extension contacts with described phase change material unit downwards, described second electrode material extends downward described lower electrode layer, contacts with described lower electrode layer, and does not contact with described phase change material unit;
(7) two top electrodes of preparation on described the 3rd insulating barrier contact with second electrode material with described heating electrode material respectively;
(8) preparation the 4th insulating barrier on step (7) resulting structures, and the upper surface of described top electrode is exposed.
11. the preparation method according to the described a kind of phase transformation memory device unit of claim 10 is characterized in that: preparing respectively between described phase change material unit and described first electrode material and the heating electrode material has thermal insulation layer.
12. the preparation method according to the described a kind of phase transformation memory device unit of claim 10 is characterized in that: in step (2) or (6), offer method that through hole adopts and be in photoetching technique, focused ion beam exposure lithographic technique, electron beam lithography or the nanometer embossing any one.
13. the preparation method according to the described a kind of phase transformation memory device unit of claim 10 is characterized in that: the method for preparing described first, second, third and fourth insulating barrier, lower electrode layer, first electrode material, second electrode material, heating electrode material, top electrode, phase change material unit and phase-change material protective layer is any one in physical vapour deposition (PVD), chemical vapour deposition technique, sputtering method, evaporation, thermal oxidation method, plasma assisted deposition method or the atomic layer deposition method.
CN2010101524557A 2010-04-20 2010-04-20 Phase-change random access memory device unit and preparation method thereof Active CN102237488B (en)

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