CN102237276B - Method for manufacturing radio frequency LDMOS (Laterally Diffused Metal Oxide Semiconductor) device - Google Patents

Method for manufacturing radio frequency LDMOS (Laterally Diffused Metal Oxide Semiconductor) device Download PDF

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CN102237276B
CN102237276B CN201010154891.8A CN201010154891A CN102237276B CN 102237276 B CN102237276 B CN 102237276B CN 201010154891 A CN201010154891 A CN 201010154891A CN 102237276 B CN102237276 B CN 102237276B
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polysilicon
radio frequency
polysilicon gate
faraday
frequency ldmos
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CN102237276A (en
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张帅
王海军
王雷
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Shanghai Huahong Grace Semiconductor Manufacturing Corp
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Abstract

The invention discloses a method for manufacturing a radio frequency LDMOS (Laterally Diffused Metal Oxide Semiconductor) device. In the method, a chemical film forming process is changed to a thermal oxide growth process at silicon oxide side walls on two sides of a polycrystalline silicon grid so that the distance between the polycrystalline silicon grid and a Faraday ring is reduced; therefore, the Miller capacitance of the radio frequency LDMOS device can be reduced to a larger degree by using the Faraday ring so that the purpose of increasing the gain of the device is finally realized.

Description

The manufacture method of radio frequency LDMOS device
Technical field
The present invention relates to a kind of manufacture method of semiconductor device.
Background technology
Radio frequency LDMOS is a kind of power device that is applied to communication field, is mainly used in amplification and the transmission of communication signal.Refer to Fig. 1, this is the rough schematic of radio frequency LDMOS device.On silicon substrate 10, there is gate oxide 11, polysilicon gate 12, polysilicon compound 16, silica 17 and metal 18.Wherein polysilicon gate 12 is above gate oxide 11, and polysilicon compound 16 is above polysilicon gate 12.Among silicon substrate 10, below polysilicon gate 12 both sides, there is respectively source region 151 and drain region 152.Silica 17 outside polysilicon gate 12 near above the gate oxide 11 of drain region 152 1 sides and polysilicon compound 16 above and the both sides of polysilicon gate 12 and polysilicon compound 16.Silica 17 is called faraday and encircles barrier layer.Metal 18 covers outside the top of silica 17 and polysilicon gate 12 top near the gate oxide 11 of source region 151 1 sides.Metal 18 is called faraday's ring.
The gain index of radio frequency LDMOS device is extremely important.Faraday encircles 18 and more approaches in the horizontal direction polysilicon gate 12, is more conducive to reduce the Miller capacitance of device, the gain that improves device.
The manufacturing process of existing radio frequency LDMOS device comprises the steps:
The 1st step, one deck gate oxide of first growing on silicon substrate, then deposit one deck polysilicon, the polysilicon of etching institute deposit forms polysilicon gate;
The 2nd step, at silicon chip surface deposit one deck silica, adopts photoetching and etching technics to carry out etching to silica, thereby forms monox lateral wall in the both sides of polysilicon gate, forms silica above polysilicon gate;
The 3rd step, carries out heavy doping ion injection in the both sides of monox lateral wall to silicon substrate, forms source region and drain region in silicon substrate;
The 4th step, removes the silica of polysilicon gate top with wet corrosion technique;
The 5th step, in silicon chip surface deposit layer of metal, then carries out the high temperature anneal, thereby above polysilicon gate, forms polysilicon compound;
The 6th step, at silicon chip surface deposit one deck silica, adopts photoetching and etching technics to carry out etching to the silica of institute's deposit, forms faraday and encircles barrier layer;
In silicon chip surface deposit layer of metal, adopt photoetching and etching technics to carry out etching to the metal of institute's deposit again, form faraday's ring.
In existing radio frequency LDMOS device, the spacing that polysilicon gate 12 and faraday encircle between 18 in the horizontal direction comprises two parts, and a part is the monox lateral wall forming after the 2nd step deposit, photoetching and etching, and bandpass exists
Figure GSB0000115150230000021
above; Another part is that the faraday who forms after the 6th step deposit, photoetching and etching encircles the part of barrier layer in polysilicon gate 12 both sides, and bandpass also exists
Figure GSB0000115150230000022
above, the spacing that therefore polysilicon gate 12 and faraday encircle between 18 in the horizontal direction exists conventionally
Figure GSB0000115150230000023
above.
Summary of the invention
Technical problem to be solved by this invention is to provide a kind of manufacture method of radio frequency LDMOS device of high-gain.
For solving the problems of the technologies described above, the manufacture method of radio frequency LDMOS device of the present invention comprises the steps:
The 1st step, one deck gate oxide 11 of first growing on silicon substrate 10, then deposit one deck polysilicon and silicon nitride, silicon nitride and the polysilicon of the deposit of etching institute, the silicon nitride 13 of formation polysilicon gate 12 and top thereof;
The 2nd step, at the both sides of polysilicon gate 12 heat growth one deck monox lateral wall 14;
The 3rd step, carries out heavy doping ion injection in the both sides of monox lateral wall 14 to silicon substrate 10, forms source region 151 and drain region 152 in silicon substrate 10;
The 4th step, removes the silicon nitride 13 of polysilicon gate 12 tops with wet corrosion technique;
The 5th step, in silicon chip surface deposit layer of metal, then carries out the high temperature anneal, thereby above polysilicon gate 12, forms polysilicon compound 16; Described metal is the metal that can form with polysilicon polysilicon compound;
The 6th step, at silicon chip surface deposit one deck silica, adopts photoetching and etching technics to carry out etching to the silica of institute's deposit, forms faraday and encircles barrier layer 17; Described faraday encircle barrier layer 17 above the both sides of polysilicon gate 12 and polysilicon compound 16 and polysilicon compound 16 and outside polysilicon gate 12 near the gate oxide 11 of drain region 152 1 sides above;
In silicon chip surface deposit layer of metal, adopt photoetching and etching technics to carry out etching to the metal of institute's deposit again, form faraday and encircle 18; Described faraday encircle 18 faraday encircle barrier layer 17 above and outside polysilicon gate 12 near the gate oxide 11 of source region 151 1 sides above.
The manufacture method of radio frequency LDMOS device of the present invention, can significantly reduce polysilicon gate 12 and faraday and encircle between 18 spacing in the horizontal direction, and the Miller capacitance that this is conducive to faraday and encircles 18 reduction devices finally reaches the object of high-gain.
Accompanying drawing explanation
Fig. 1 is the structural representation of radio frequency LDMOS;
Fig. 2 a~Fig. 2 f is each step schematic diagram of the manufacture method of radio frequency LDMOS of the present invention.
Description of reference numerals in figure:
10-silicon substrate; 11-gate oxide; 12-polysilicon gate;
13-silicon nitride; 14-monox lateral wall; 151-source region;
152-drain region; 16-polysilicon compound; 17-faraday encircles barrier layer;
18-faraday ring.
Embodiment
The manufacture method of radio frequency LDMOS device of the present invention comprises the steps:
The 1st step, refers to Fig. 2 a, one deck gate oxide 11 of first growing on silicon substrate 10, then deposit one deck polysilicon and silicon nitride, silicon nitride and the polysilicon of the deposit of etching institute, the silicon nitride 13 of formation polysilicon gate 12 and top thereof.
Silica 13 thickness of institute's deposit in this step are preferably and are less than
Figure GSB0000115150230000041
The 2nd step, refers to Fig. 2 b, at the both sides of polysilicon gate 12 heat growth one deck monox lateral wall 14.Because being nitrided silicon 13, polysilicon gate 12 tops cover, can growing silicon oxide, therefore in this step, only can grow silica in the both sides of polysilicon gate 12.
By controlling oxidizing temperature and time, the thickness (being the width in horizontal direction) of the monox lateral wall 14 of this step heat growth is preferably and is less than or equal to
Figure GSB0000115150230000042
The purposes of the monox lateral wall 14 that this step is grown is source regions 151 of isolation polysilicon gate 12 and follow-up formation; The drain region 152 of isolation polysilicon gate 12 and follow-up formation.
The 3rd step, refers to Fig. 2 c, in the both sides of monox lateral wall 14, silicon substrate 10 is carried out to heavy doping ion injection, forms source region 151 and drain region 152.
The 4th step, refers to Fig. 2 d, removes the silicon nitride 13 of polysilicon gate 12 tops with wet corrosion technique.Wet method is removed silicon nitride and is conventionally adopted phosphoric acid liquid.
The 5th step, refers to Fig. 2 e, in silicon chip surface deposit layer of metal, then carries out the high temperature anneal, thereby above polysilicon gate 12, forms polysilicon compound 16.Described metal is for example titanium (Ti), and described polysilicon compound is for example titanium silicide (TiSi 2).Polysilicon compound 16 is for reducing gate resistance.
The 6th step, refers to Fig. 2 f, at silicon chip surface deposit one deck silica, adopts photoetching and etching technics to carry out etching to the silica of institute's deposit, and the silica after etching encircles barrier layer 17 as faraday.Faraday encircle barrier layer 17 above the both sides of polysilicon gate 12 and polysilicon compound 16 and polysilicon compound 16 and outside polysilicon gate 12 near the gate oxide 11 of drain region 152 1 sides above.
The faraday who forms after etching encircles barrier layer 17 and is preferably and is less than or equal at the width of polysilicon gate 12 and polysilicon compound 16 both sides
Figure GSB0000115150230000051
In silicon chip surface deposit layer of metal, adopt photoetching and etching technics to carry out etching to the metal of institute's deposit again, the metal 18 after etching encircles 18 as faraday.Faraday encircle 18 faraday encircle barrier layer 17 above and outside polysilicon gate 12 near the gate oxide 11 of source region 151 1 sides above.
Compared with the manufacture method of conventional radio frequency LDMOS device, the topmost change of the present invention is thermal oxide growth monox lateral wall 14, but not chemical membrane mode (deposit, photoetching, etching), this can reduce the width of monox lateral wall.The faraday of this part monox lateral wall and follow-up formation encircles the part of barrier layer in polysilicon gate both sides, has jointly determined the spacing between polysilicon gate and faraday's ring.Therefore the radio frequency LDMOS device that the method for the invention is manufactured, can dwindle polysilicon gate 12 and faraday and encircle 18 spacing in the horizontal direction, faraday's ring can significantly reduce the Miller capacitance of radio frequency LDMOS device like this, thus the gain that improves radio frequency LDMOS device of the present invention.

Claims (8)

1. a manufacture method for radio frequency LDMOS device, is characterized in that, comprises the steps:
The 1st step, one deck gate oxide (11) of first growing on silicon substrate (10), deposit one deck polysilicon and silicon nitride again, silicon nitride and the polysilicon of the deposit of etching institute, the silicon nitride (13) of formation polysilicon gate (12) and top thereof;
The 2nd step, at both sides heat growth one deck monox lateral walls (14) of polysilicon gate (12);
The 3rd step, carries out heavy doping ion injection in the both sides of monox lateral wall (14) to silicon substrate (10), forms source region (151) and drain region (152) in silicon substrate (10);
The 4th step, removes the silicon nitride (13) of polysilicon gate (12) top with wet corrosion technique;
The 5th step, in silicon chip surface deposit layer of metal, then carries out the high temperature anneal, thereby forms polysilicon compound (16) in polysilicon gate (12) top; Described metal is the metal that can form with polysilicon polysilicon compound;
The 6th step, at silicon chip surface deposit one deck silica, adopts photoetching and etching technics to carry out etching to the silica of institute's deposit, forms faraday and encircles barrier layer (17); Described faraday encircles the top of barrier layer (17) gate oxide (11) of close drain region (152) one sides outside the both sides of polysilicon gate (12) and polysilicon compound (16) and the top of polysilicon compound (16) and polysilicon gate (12);
In silicon chip surface deposit layer of metal, adopt photoetching and etching technics to carry out etching to the metal of institute's deposit again, form faraday's ring (18); Described faraday ring (18) encircles outside the top on barrier layer (17) and polysilicon gate (12) top near the gate oxide (11) of source region (151) one sides faraday.
2. the manufacture method of radio frequency LDMOS device according to claim 1, is characterized in that, in described method the 1st step, the silicon nitride thickness of institute's deposit is less than
Figure FSB0000115150220000021
3. the manufacture method of radio frequency LDMOS device according to claim 1, is characterized in that, in described method the 2nd step, the top of polysilicon gate (12) is owing to having the protection of silicon nitride (13) and growing silicon oxide not.
4. the manufacture method of radio frequency LDMOS device according to claim 1, it is characterized in that, monox lateral wall (14) the isolation polysilicon gate (12) and source region (151) forming in described method the 2nd step, also isolates polysilicon gate (12) and drain region (152).
5. the manufacture method of radio frequency LDMOS device according to claim 1, is characterized in that, in described method the 2nd step, the thickness of described monox lateral wall (14) is less than or equal to
Figure FSB0000115150220000022
6. the manufacture method of radio frequency LDMOS device according to claim 1, is characterized in that, in described method the 4th step, adopts phosphoric acid to remove silicon nitride (13).
7. the manufacture method of radio frequency LDMOS device according to claim 1, is characterized in that, in described method the 5th step, metal is titanium, and polysilicon compound (16) is titanium silicide.
8. the manufacture method of radio frequency LDMOS device according to claim 7, is characterized in that, described faraday encircles barrier layer (17) and is less than or equal at the width of the both sides of polysilicon gate (12) and polysilicon compound (16)
Figure FSB0000115150220000023
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CN101605041B (en) 2008-09-18 2011-04-06 华为技术有限公司 Method, device and system for configuring multicast unifrequent network sources
CN102446733B (en) * 2011-12-08 2014-03-12 上海先进半导体制造股份有限公司 Power device with high-voltage radio-frequency lateral diffusion structure and production method of power device
US8828825B2 (en) * 2012-07-16 2014-09-09 Texas Instruments Incorporated Method of substantially reducing the formation of SiGe abnormal growths on polycrystalline electrodes for strained channel PMOS transistors
CN103871883A (en) * 2012-12-17 2014-06-18 北大方正集团有限公司 \Manufacturing method of high-frequency horizontal double-diffusion structure semiconductor device
CN104425261B (en) * 2013-08-20 2018-02-06 上海华虹宏力半导体制造有限公司 The manufacture method of radio frequency LDMOS device
CN114446812A (en) * 2020-11-06 2022-05-06 长鑫存储技术有限公司 Test structure and manufacturing method thereof

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CN1672263A (en) * 2002-07-31 2005-09-21 飞思卡尔半导体公司 Field effect transistor and method of manufacturing same
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US7307314B2 (en) * 2004-06-16 2007-12-11 Cree Microwave Llc LDMOS transistor with improved gate shield

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CN1672263A (en) * 2002-07-31 2005-09-21 飞思卡尔半导体公司 Field effect transistor and method of manufacturing same
CN1691295A (en) * 2004-04-23 2005-11-02 中国科学院微电子研究所 Self-aligning silicide method for RF lateral diffusion field-effect transistor
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