CN102236570B - Method for soft shutdown of loongson blade - Google Patents
Method for soft shutdown of loongson blade Download PDFInfo
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- CN102236570B CN102236570B CN201110205307.1A CN201110205307A CN102236570B CN 102236570 B CN102236570 B CN 102236570B CN 201110205307 A CN201110205307 A CN 201110205307A CN 102236570 B CN102236570 B CN 102236570B
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- reset
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Abstract
The invention provides a method for soft shutdown of a loongson blade. The method comprises the following steps of: transmitting a soft shutdown instruction by upper application software; responding to the instruction and setting a south bridge register through a bottom driver by an operating system; and controlling an FPGA (Field Programmable Gate Array) chip to finish the shutdown work through a south bridge output state control signal SLP_S5#. In the invention, the soft shutdown function of a main board is realized through a loongson 3A CPU GPIO (Central Processing Unit General Purpose Input/Output) pin in coordination with an FPGA.
Description
Technical field
The present invention relates to computer motherboard soft-off technology, relate in particular to a kind of Godson 3ASMP blade soft-off method for designing.
Background technology
Soft-off is functional requirement the most basic in motherboard design.So-called soft-off just refers to that system exits current application program, exits operating system, hardware quits work.The realization of soft-off process needs software and hardware to coordinate to realize.Chipset or Supper IO cooperation that can be good and corresponding as Intel, AMD X86 CPU realize soft-off function.First, shutdown command passes to operating system again to bsp driver from upper application software, driver upgrades south bridge corresponding registers, now south bridge SLP_S5# pin signal also can overturn, Supper IO receives after this signal, turn off the primary power to main board power supply according to a definite sequence, complete the shutdown action of whole mainboard.Adopt Godson 3A CPU and AMD RS780E+SB710 to design the blade of SMP, because chipset and CPU can not coordinate completely, therefore need additive method to realize mainboard soft-off function.
Summary of the invention
In order to realize the soft-off of Godson mainboard, the invention provides a kind of method of soft shutdown of loongson blade.
A method for soft shutdown of loongson blade, upper application software is sent soft-off instruction, and operating system response instruction also passes through bsp driver set south bridge register; And
South bridge output state control signal SLP_S5# controls fpga chip and completes shutdown work.
Preferably, the shutdown process of described fpga chip is: first, CPU0_GPIO0 signal is drawn high, and SB_PG and NB_PG signal are dragged down, and notice CPU, south bridge and north bridge system are by power-off shutdown; Secondly, after 20ms, CPU0_RESET# and CPU1_RESET# are dragged down respectively, in reset mode always; After 10ms, FPGA starts to carry out electric current journey under mainboard, turns off power supply on mainboard at a certain time interval with order.
Preferably, the described time interval can be 10ms-20ms.
Preferably, described power supply comprises CPU1.1V, north bridge 1.1V, 1.2V, 1.8V and 3.3V power supply.
Preferably, described south bridge output state control signal SLP_S5# is high level in the time of work, obtains after shutdown command, overturns as low level signal.
The present invention coordinates Programmable Logic Controller (FPGA) to realize mainboard soft-off function by Godson 3A CPU GPIO pin.
Brief description of the drawings
Fig. 1 is circuit diagram of the present invention
Fig. 2 is electric sequential chart under the present invention
Embodiment
Godson 3A SMP blade mainboard powers on, lower electricity and reset timing are all controlled by Programmable Logic Controller (FPGA).Therefore, soft-off process is also taking FPGA as control core.Interconnect architecture between FPGA and Loongson 3A CPU and AMD RS780E+SB710 chipset as shown in Figure 1.Detailed signal definition is as follows:
GPIO0-Loongson 3A CPU GPIO pin, can be used as input and output, able to programme;
SB_PG-south bridge Power Good signal, input;
NB_PG-north bridge Power Good signal, input;
SLP_S5#-S5 state control signal;
CPU0_RESET#-CPU0 reset signal;
CPU1_RESET#-CPU1 reset signal;
CPU0_1V1_EN-CPU0 1.1V voltage control signal, high level is effective;
CPU1_1V1_EN-CPU1 1.1V voltage control signal, high level is effective;
NB_1V1_EN-north bridge 1.1V voltage control signal, high level is effective;
1V2_EN-1.2V voltage control signal, high level is effective;
1V8_EN-1.8V voltage control signal, high level is effective.
Concrete soft-off flow process is as follows:
● upper application software is sent software shutdown command, and operating system responds after this order, by bsp driver set south bridge related register;
● after the set of south bridge register, the upset of SLP_S5# signal, is pulled to low level;
Electric sequential under the present invention as shown in Figure 2, SLP_S5# signal triggers FPGA internal logic.First, CPU0_GPIO0 signal is drawn high, and SB_PG and NB_PG signal are dragged down, and notice CPU, south bridge and north bridge system are by power-off shutdown; Secondly, after 20ms, CPU0_RESET# and CPU1_RESET# are dragged down respectively, in reset mode always; After 10ms, FPGA starts to carry out electric current journey under mainboard, turns off various power supplies on mainboard at a certain time interval with order.
Claims (1)
1. a method for soft shutdown of loongson blade, is characterized in that: upper application software is sent soft-off instruction, and operating system response instruction also passes through bsp driver set south bridge register; And
South bridge output state control signal SLP_S5# controls fpga chip and completes shutdown work;
The shutdown process of described fpga chip is: first, CPU0_GPIO0 signal is drawn high, and SB_PG and NB_PG signal are dragged down, and notice CPU, south bridge and north bridge system are by power-off shutdown; Secondly, after 20ms, CPU0_RESET# and CPU1_RESET# are dragged down respectively, in reset mode always; After 10ms, FPGA starts to carry out electric current journey under mainboard, turns off power supply on mainboard at a certain time interval with order;
The described time interval is 10ms-20ms;
Described power supply comprises CPU1.1V, north bridge 1.1V, 1.2V, 1.8V and 3.3V power supply;
Described south bridge output state control signal SLP_S5# is high level in the time of work, obtains after shutdown command, overturns as low level signal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110205307.1A CN102236570B (en) | 2011-07-21 | 2011-07-21 | Method for soft shutdown of loongson blade |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201110205307.1A CN102236570B (en) | 2011-07-21 | 2011-07-21 | Method for soft shutdown of loongson blade |
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| Publication Number | Publication Date |
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| CN102236570A CN102236570A (en) | 2011-11-09 |
| CN102236570B true CN102236570B (en) | 2014-07-02 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN201110205307.1A Active CN102236570B (en) | 2011-07-21 | 2011-07-21 | Method for soft shutdown of loongson blade |
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Families Citing this family (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105183509A (en) * | 2015-08-27 | 2015-12-23 | 浪潮集团有限公司 | Apparatus and method for realizing shutdown of system power after soft-off |
| CN105389525B (en) * | 2015-12-11 | 2018-09-21 | 曙光信息产业股份有限公司 | The management method and system of blade server |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101206518A (en) * | 2006-12-21 | 2008-06-25 | 技嘉科技股份有限公司 | Motherboard and power converter of computer for transportation means |
| CN102063081A (en) * | 2010-11-04 | 2011-05-18 | 天津曙光计算机产业有限公司 | Design method for realizing power on and off and time sequence resetting of Loongson mainboard by utilizing state machine |
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2011
- 2011-07-21 CN CN201110205307.1A patent/CN102236570B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101206518A (en) * | 2006-12-21 | 2008-06-25 | 技嘉科技股份有限公司 | Motherboard and power converter of computer for transportation means |
| CN102063081A (en) * | 2010-11-04 | 2011-05-18 | 天津曙光计算机产业有限公司 | Design method for realizing power on and off and time sequence resetting of Loongson mainboard by utilizing state machine |
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| CN102236570A (en) | 2011-11-09 |
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Effective date of registration: 20141225 Address after: 100084 Beijing Haidian District City Mill Street No. 64 Patentee after: Dawning Information Industry (Beijing) Co.,Ltd. Patentee after: WUXI CITY CLOUD COMPUTING CENTER CO.,LTD. Address before: 100084 Beijing Haidian District City Mill Street No. 64 Patentee before: Dawning Information Industry (Beijing) Co.,Ltd. |
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