Summary of the invention
Technical problem to be solved by this invention is: N type solar cell of a kind of suitable large-scale industrial production and preparation method thereof is provided.
The technical solution adopted for the present invention to solve the technical problems is: the N type solar cell of the mask method preparation that an a kind of film is used more, with n type pulling of silicon single crystal is matrix, silicon chip back is the P type emitter junction that is coated with the boron diffusion preparation of passivating film, the front of silicon chip is the front-surface field of phosphorous diffusion preparation, is coated with the film of passivation and antireflective effect on the front-surface field.
The passivating film at the silicon chip back side is SiO2 and SiNx dual layer passivation film, and the SiNx passivating film is at the skin of SiO2 film.
The mask method that an a kind of film is used more prepares the method for N type solar cell, with n type pulling of silicon single crystal is matrix, at first prepare P type emitter junction by boron diffusion, etch away positive P type emitter junction then, on the P at silicon chip back side type emitter junction, make the SiO2 film, this SiO2 film promptly is the mask that follow-up phosphorous diffusion prepares front-surface field, is again the passivating film of P type emitter junction, prepares front-surface field by phosphorous diffusion at last.The invention has the beneficial effects as follows: technical process is simple, control easily, and cost is low, the photoelectric conversion efficiency height.
Embodiment
The N type solar cell of the mask method preparation that an a kind of film is as shown in Figure 1 used more, with n type pulling of silicon single crystal is matrix 1, silicon chip back is the P type emitter junction 2 that is coated with the boron diffusion preparation of SiO2 and SiNx dual layer passivation film, and SiNx passivating film 5 is at the skin of SiO2 film 4 in the dual layer passivation film.The front of silicon chip is the front-surface field 3 of phosphorous diffusion preparation, is coated with the film of passivation and antireflective effect on the front-surface field 3.
Specifically be achieved in that
A) n type pulling of crystals silicon chip surface forms positive pyramid suede structure to reduce reflection;
B) boron diffusion source prepares P type emitter junction 2, and square resistance is 20-150ohm/Sq;
C) sour mixed liquor or laser or corrosivity slurry etch away positive P type emitter junction;
D) BSG is removed in HF acid;
E) thermal oxidation method growth SiO2 film 4, or CVD mode single sided deposition SiO2 film 4, and the thickness of SiO2 film 4 is 100-400nm.During thermal oxidation method growth SiO2 film 4, must with mixed acid corrosive liquid or laser or corrosivity slurry or plasma or other can etching SiO2 the SiO2 film of the non-emission pole-face of method etching, and the etching reactant, the SiO2 film that CVD mode single sided deposition mode prepares does not need this step of the non-emission pole-face of method etching SiO2 film that mixed acid solution or laser or corrosivity slurry or plasma or other can etching SiO2;
F) be the mask layer of phosphorous diffusion with SiO2 film 4, phosphorous diffusion source prepares front-surface field 3, and square resistance is 10-150ohm/Sq;
G) plasma etching is removed the PN junction that forms at silicon chip edge;
H) HF acid is cleaned and is removed PSG and part Si O2 film 4, keeps 10-150nm SiO2 film 4 passivating films as P type emitter junction 2;
I) the emission pole-face deposits 10-100nm with the PECVD method, and refractive index is the SiNx passivating film 5 between the 1.9-2.5;
J) front-surface field is with PECVD method deposition 70-100nm, refractive index be 1.9-2.5 play passivation and antireflective effect SiNx film 6;
K) back up silver aluminium paste;
L) oven dry;
M) positive printed silver slurry;
N) sintering.
Embodiment 1: select n type pulling of crystals silicon chip, crystal face (100), doping content 6 Ω cm.
1, silicon chip is handled through conventional surface clean and positive pyramid surface-texturing;
2, the liquid boron diffusion source of BBr3 prepares P type emitter junction 2,930 ℃ of diffusion temperatures, and the time is 50min, square resistance is 60ohm/Sq;
3, the back cleaning machine with RENA company etches away back side P type emitter junction and removes BSG simultaneously;
4, grow SiO2 film 4 as mask layer with thermal oxidation method, thickness is 300nm;
5, use the SiO2 film of the non-emission pole-face of corrosivity slurry etching;
6, POCl3 liquid phosphorus diffuse source prepares front-surface field 3,850 ℃ of diffusion temperatures, and the time is 40min, square resistance is 40ohm/Sq;
7, plasma etching is removed the edge PN junction;
8, PSG and part Si O2 film 4 are removed in 5%HF acid, and the time is 30s, and final SiO2 film 4 thickness are 20nm;
9, back side PECVD deposition 60nm, refractive index is 2.05 SiNx passivating film 5;
10, the refractive index of positive deposition 70-100nm is greater than 2.25 SiNx film 6;
11, back up silver aluminium paste;
12, oven dry;
13, positive printed silver slurry;
14, sintering.
The battery sheet that this step is made after tested, efficient is 18.1%.