CN102136423A

CN102136423A - Method for improving surface roughness of SiGe deposit

Info

Publication number: CN102136423A
Application number: CN201010027341XA
Authority: CN
Inventors: 陈帆; 徐炯�; 范永洁; 季伟; 张海芳
Original assignee: Shanghai Hua Hong NEC Electronics Co Ltd
Current assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date: 2010-01-21
Filing date: 2010-01-21
Publication date: 2011-07-27

Abstract

The invention discloses a method for improving the surface roughness of SiGe deposit. The method comprises the following steps of: 1, forming a collecting region and an isolation region for a SiGe NPN process; 2, depositing dielectric film silicon oxide and performing annealing treatment by using nitrogen, wherein the refractive index of the dielectric film silicon oxide is more than 0.5; 3, forming a base region window by using dry etching and wet etching based on base region window silicon oxide; 4, growing a SiGe layer and etching a base region pattern; and 5, forming an emitter. By adopting the method, a pure silicon oxide medium is replaced by an oxidation film which is subjected to nitrogen annealing treatment and is rich in silicon, SiGe or SiGeC polycrystalline silicon grows on the dielectric film, the surface is smooth, the formation of silicide is promoted, a relatively small number of defects exist, and the contact resistance is lowered.

Description

Improve the method for silicon Germanium deposition surface roughness

Technical field

The present invention relates to semiconductor integrated circuit and make the field, be specifically related to a kind of manufacture method of Ge-Si heterojunction bipolar transistor npn npn.

Background technology

In radio frequency applications, need more and more higher device feature frequency, though radio frequency complementary metal oxide semiconductors (CMOS) RFCMOS can realize upper frequency in advanced person's technology, but be difficult to satisfy fully radio frequency requirement, as the very difficult characteristic frequency that realizes more than the 40GHz, and the R﹠D costs of advanced technologies also are very high; Compound semiconductor can be realized very high characteristic frequency device, but because material cost height, shortcoming that size is little add that the most compounds semiconductor is poisonous, has limited its application.

Ge-Si heterojunction bipolar transistor npn npn SiGe HBT then is the fine selection of hyperfrequency device, and what at first it utilized SiGe SiGe and silicon Si can be with difference, improves the charge carrier injection efficiency of emitter region, increases the current amplification factor of device; Next utilizes the highly doped of SiGe SiGe base, reduces base resistance, improves characteristic frequency; SiGe SiGe technology is compatible mutually with silicon technology substantially in addition, so silicon germanium heterojunction bipolar transistor SiGe HBT has become the main force of hyperfrequency device.Simultaneously, the Ge-Si heterojunction bipolar transistor npn npn SiGe HBT technology formation bipolar complementary metal oxide semiconductor BiCMOS technology that easily combines with CMOS technology, thereby with the advantage of complementary metal oxide semiconductors (CMOS) CMOS low energy consumption and high integration.

In the preparation technology of silicon germanium heterojunction SiGe BiCMOS, the formation of base SiGe SiGe is that the mode by extension realizes.Fig. 1 is a SiGe SiGe heterojunction transistor schematic diagram, and relevant key step is 1. deielectric-coating (101) deposits, and this deielectric-coating mostly is oxide-film; 2. SiGe SiGe base window is opened; 3. SiGe SiGe extension (102,103,104), at monocrystalline silicon region growth SiGe SiGe monocrystalline, growing polycrystalline silicon germanium SiGe on the on-monocrystalline, single-crystal region 102 is an intrinsic base region, single-crystal region 103 is an outer base area, and polycrystalline 104 then will form silicide connection contact hole and draw as the base.

Deielectric-coating the floor that stops that acting as 1. districts of CMOS during as base poly etching here; 2. raise outer base area,, reduce the parasitic capacitance of BC knot to draw back outer base area and the collector area high concentration is mixed distance; 3. the method that adopts dry method to combine with wet etching is opened SiGe SiGe extension window, for SiGe SiGe deposit provides a super clean single-crystal surface, improves SiGe SiGe epitaxial quality.

Show according to our present result of study, the surface smoothing of the growth of SiGe SiGe on monocrystalline, yet the growth rate on silica is fast, the forming core phenomenon is serious, it is very coarse that the surface becomes, uneven, hackly like this surface is unfavorable for that the subsequent silicidation thing forms, it is discontinuous that silicide is formed, and causes the base contact resistance to raise, and since on silica growth rate faster than monocrystalline silicon, monocrystalline and polycrystalline interface can be toward the intrinsic base region translations, reduced base width, this phenomenon is even more serious in the size reduction process, and device performance is affected greatly.

Summary of the invention

Technical problem to be solved by this invention provides a kind of method of improving the silicon Germanium deposition surface roughness.It can make on the deielectric-coating growth SiGe SiGe or SiGe SiGeC polysilicon surface smooth, helps silicide and forms and reduce contact resistance.

In order to solve above technical problem, the invention provides a kind of method of improving the silicon Germanium deposition surface roughness, may further comprise the steps: the first step forms SiGe NPN technology collector region and isolated area; In second step, the deposition dielectric film silica also adopts n 2 annealing to handle; In the 3rd step, the dry etching of base window silica and wet etching form the base window; The 4th step, grown silicon germanium layer and base pattern etching; In the 5th step, form emitter.

Beneficial effect of the present invention is: core content of the present invention is to announce that adopting a kind of new tool to obtain deielectric-coating replaces the pure silica medium, growth SiGe SiGe or SiGe SiGeC polysilicon on this deielectric-coating, smooth surface, help silicide formation and have few relatively defective, reduce contact resistance.

Description of drawings

Below in conjunction with the drawings and specific embodiments the present invention is described in further detail.

Fig. 1 is a SiGe SiGe heterojunction transistor schematic diagram;

Fig. 2 is the flow chart of the method for the invention;

Fig. 3 is the SEM photo of growth Germanium carbon on the conventional oxidation silicon dielectric film;

Fig. 4 is the SEM photo through growth Germanium carbon on the silicon-rich oxide film of nitrogen handling return.

Embodiment

The method of improving the silicon Germanium deposition surface roughness of the present invention may further comprise the steps:

The first step, preparation SiGe SiGe NPN technology collector region and isolated area.This step process adopts conventional NPN device to form scheme, comprises that the low-resistance collector region forms, the formation of intrinsic collector region and conventional device isolation technology.

In second step, the silica of deposition dielectric film Silicon-rich and process n 2 annealing are handled.This step process adopts the plasma-reinforced chemical vapor deposition pecvd process to prepare silica and adopt rta technique to carry out annealing in process.

The 3rd step, the dry etching and the wet etching of base window silica.This step process is by dry etching definition base window, and partial etching also is parked on the oxide-film, utilizes the wet etching of band photoresist to remove residue oxide-film in the base window then.

In the 4th step, growth SiGe SiGe and base figure generate.This step adopts epitaxy technique to form silicon germanium extension layer, and dry method and wet etching associated methods form the base figure.

In the 5th step, form emitter.

The deielectric-coating that core of the present invention is to adopt the silica of Silicon-rich to open as the base, thus the medium that the silica of traditional handicraft is opened as the base window substituted; The silica of Silicon-rich at high temperature carries out n 2 annealing, owing to have a lot of dangling bonds in the silica of Silicon-rich, at high temperature can make surfaces nitrided formation silicon oxynitride; Compare with conventional oxidation silicon, SiGe SiGe or Germanium carbon SiGeC grow smooth on the medium of silicon oxynitride, help the subsequent silicidation thing and form technology, make silicide form continuously, and have relative less defects, thereby reduce base polysilicon contact resistance.SiGe SiGe or Germanium carbon SiGeC are lower than on the silica in growth rate on the silicon oxynitride, thereby few to the base translation at monocrystalline and polycrystalline interface place, and be few to the base width influence.

The present invention is not limited to execution mode discussed above.More than the description of embodiment is intended in order to describe and illustrate the technical scheme that the present invention relates to.Based on the conspicuous conversion of the present invention enlightenment or substitute and also should be considered to fall into protection scope of the present invention.Above embodiment is used for disclosing best implementation method of the present invention, so that those of ordinary skill in the art can use numerous embodiments of the present invention and multiple alternative reaches purpose of the present invention.

Claims

1. a method of improving the silicon Germanium deposition surface roughness is characterized in that, may further comprise the steps:

The first step forms SiGe NPN technology collector region and isolated area;

In second step, the deielectric-coating silica of deposit Silicon-rich also adopts n 2 annealing to handle, and described deielectric-coating silica refractive index is greater than 0.5;

In the 3rd step, the dry etching of base window silica and wet etching form the base window;

The 4th step, grown silicon germanium layer and base pattern etching;

In the 5th step, form emitter.

2. the method for improving the silicon Germanium deposition surface roughness as claimed in claim 1 is characterized in that, adopts the plasma-reinforced chemical vapor deposition pecvd process to prepare the deielectric-coating silica.

3. the method for improving the silicon Germanium deposition surface roughness as claimed in claim 1 is characterized in that, described deielectric-coating silica need be handled through n 2 annealing, and temperature is 800～1000 degrees centigrade.