CN102135781A - Startup acceleration circuit of reference voltage circuit - Google Patents
Startup acceleration circuit of reference voltage circuit Download PDFInfo
- Publication number
- CN102135781A CN102135781A CN2010100273424A CN201010027342A CN102135781A CN 102135781 A CN102135781 A CN 102135781A CN 2010100273424 A CN2010100273424 A CN 2010100273424A CN 201010027342 A CN201010027342 A CN 201010027342A CN 102135781 A CN102135781 A CN 102135781A
- Authority
- CN
- China
- Prior art keywords
- circuit
- reference voltage
- output
- pmos pipe
- pmos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Abstract
The invention discloses a startup acceleration circuit of a reference voltage circuit, and the startup acceleration circuit is connected on an output circuit of the reference voltage circuit and comprises a first PMOS (positive-channel metal oxide semiconductor) pipe, a third PMOS pipe, a startup current circuit and a bias current circuit, wherein a gate of the first PMOS pipe and the gate of an output PMOS pipe in the output circuit in the reference voltage circuit are connected with bias voltage generated by the reference voltage circuit together, a source is connected with a power supply, a drain is connected with the gate of the third PMOS pipe and one end of the bias current circuit, the other end of the bias current circuit is grounded, one end of the startup current circuit is connected with the power supply, the other end of the startup current circuit is connected with the source of the third PMOS pipe, and the drain of the third PMOS pipe is connected with the reference voltage output end of the reference voltage circuit. The startup acceleration circuit of the reference voltage circuit can reduce startup time of the voltage reference circuit and improve startup speed of the voltage reference circuit.
Description
Technical field
The present invention relates to the SIC (semiconductor integrated circuit) design, particularly a kind of startup accelerating circuit of reference voltage circuit.
Background technology
Along with the continuous development of IC industry, and market is constantly perfect, and the client is more and more higher to the performance requirement of electronic product, and requires product electrifying startup speed more and more faster; Like this, in order to save the start-up time of entire product, require each IP of product (intellectual property core) to control and improve start-up time, thereby improve performance.
Common reference voltage circuit, its output circuit comprise output pmos M2, output resistance R2 as shown in Figure 1, described output pmos M2 grid meets the bias voltage Vbias that reference voltage circuit produces, source electrode meets power supply Vdd, and drain electrode meets output resistance R2, output resistance R2 other end ground connection.After reference voltage circuit energized Vdd powered up, the gate bias voltage Vbias of described output pmos M2 reached conducting after the threshold value, and by its drain electrode output reference electric current I REF, described reference current IREF produces reference voltage V ref through output resistance R2.
As shown in Figure 1, reference voltage circuit output reference voltage Vref gives load C load, and load C load is with output resistance R2 and connect, when load C load is excessive, can cause reference voltage circuit output reference voltage Vref to reach setting value and need the long period, the reference voltage circuit toggle speed is slower.
In order to improve the reference voltage circuit toggle speed, usually adopt design to increase the method for reference voltage circuit power consumption or starting current, perhaps change traditional main circuit structure, but like this can reference voltage circuit aspect other resource expend corresponding increasing, can not reach optimum efficiency.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of startup accelerating circuit of reference voltage circuit, can reduce the start-up time of voltage reference circuit, improves the toggle speed of voltage reference circuit.
For solving the problems of the technologies described above, the startup accelerating circuit of reference voltage circuit of the present invention, the output circuit of described reference voltage circuit, comprise P transistor npn npn output pmos, output resistance, described output pmos grid connects the bias voltage that reference voltage circuit produces, source electrode connects power supply, drain electrode connects output resistance, output resistance other end ground connection, after the reference voltage circuit energized powers up, the conducting after the bias voltage that its grid connect reaches threshold value of described output pmos, by its drain electrode output reference electric current, described reference current produces reference voltage output through output resistance; It is characterized in that, described startup accelerating circuit is connected on the output circuit of described reference voltage circuit, described startup accelerating circuit comprises P transistor npn npn the one PMOS pipe, P transistor npn npn the 3rd PMOS pipe, the starting current circuit, bias current circuit, described first gate pmos extremely is connected to the bias voltage that reference voltage circuit produces together with the grid of the output pmos in the output circuit of described reference voltage circuit, source electrode connects power supply, drain electrode connects the grid and bias current circuit one end of the 3rd PMOS pipe, the other end ground connection of bias current circuit, one termination power of starting current circuit, the source electrode of another termination the 3rd PMOS pipe, the drain electrode of the 3rd PMOS pipe connects the reference voltage output end of described reference voltage circuit; The drain current that the logical back of leakage conductance, described PMOS pipe source produces is greater than the electric current of bias current circuit.
The startup accelerating circuit of reference voltage circuit of the present invention, be connected on the output circuit of conventional reference voltage circuit, starting accelerating circuit by this just charged to output load before reference voltage circuit starts, after the normal startup of reference voltage circuit, this startup accelerating circuit cuts out, and the output voltage of this moment is by conventional reference voltage circuit voltage supply; Because the charging in advance of load reduces start-up time to the load charging once more thereby need not conventional reference voltage circuit output.The startup accelerating circuit of reference voltage circuit of the present invention can significantly reduce the start-up time that need of reference voltage circuit owing to load effect, for the time has been saved in the rapid startup of entire circuit system.
Description of drawings
The present invention is described in further detail below in conjunction with the drawings and specific embodiments.
Fig. 1 is the startup accelerating circuit one embodiment synoptic diagram of reference voltage circuit of the present invention;
Fig. 2 is the circuit diagram that bias current circuit Ibias adopts resistance to realize;
Fig. 3 is the circuit diagram that bias current circuit Ibias adopts active pull-up to realize;
Fig. 4 is the circuit diagram that bias current circuit Ibias adopts external bias circuit to realize;
Fig. 5 is the circuit diagram that starting current circuit I boost adopts resistance to realize;
Fig. 6 is the circuit diagram that starting current circuit I boost adopts active pull-up to realize;
Fig. 7 is the circuit diagram that starting current circuit I boost adopts external bias circuit to realize.
Embodiment
Startup accelerating circuit one embodiment of reference voltage circuit of the present invention based on the design of CMOS technological datum potential circuit, on the output circuit of conventional reference voltage circuit, has increased a startup accelerating circuit as shown in Figure 1; The output circuit of the reference voltage circuit of described routine, comprise P transistor npn npn output pmos M2, output resistance R2, described output pmos M2 grid meets the bias voltage Vbias that reference voltage circuit produces, source electrode meets power supply Vdd, drain electrode meets output resistance R2, output resistance R2 other end ground connection, after reference voltage circuit energized Vdd powers up, described output pmos M2 conducting after the bias voltage Vbias that its grid connect reaches threshold value, by its drain electrode output reference electric current I REF, described reference current IREF produces reference voltage V ref output through output resistance R2.
Described startup accelerating circuit is connected on the output circuit of described reference voltage circuit, the startup accelerating circuit of described reference voltage circuit, comprise P transistor npn npn the one PMOS pipe M1, P transistor npn npn the 3rd PMOS manages M3, starting current circuit I boost, bias current circuit Ibias, described PMOS pipe M1 grid is connected to the bias voltage Vbias that reference voltage circuit produces together with the grid of the output pmos M2 in the output circuit of described conventional reference voltage circuit, source electrode meets power supply Vdd, drain electrode connects grid and bias current circuit Ibias one end of the 3rd PMOS pipe M3, the other end ground connection of bias current circuit Ibias, the termination power Vdd of starting current circuit I boost, the source electrode of another termination the 3rd PMOS pipe M3, the drain electrode of the 3rd PMOS pipe M3 connects reference voltage V ref output terminal.
The drain current that the logical back of leakage conductance, described PMOS pipe source produces is greater than the electric current of bias current circuit.
The startup accelerating circuit of reference voltage circuit of the present invention, PMOS pipe M1 drain electrode produces the electric current of an electric current and bias current circuit Ibias and makes comparisons, thereby determines the level of the 3rd PMOS pipe M3 grid to make the 3rd PMOS pipe M3 as switch; When circuit rigidly connects in energize Vdd starts, bias voltage Vbias is a high level, also be not lower than threshold value, make win PMOS pipe M1, the not conducting of output pmos M2 source-drain electrode, the drop-down effect of the electric current on the flow direction ground of bias current circuit Ibias makes the 3rd PMOS pipe M3 grid level be lower than the unblocked level of the 3rd PMOS pipe M3, the 3rd PMOS pipe M3 opens, thereby the promotion electric current that starting current circuit I boost is produced outputs to reference voltage V ref output terminal through the drain electrode of the 3rd PMOS pipe M3, fast output load capacitance Cload is charged; After circuit rigidly connects energize Vdd startup, bias voltage Vbias progressively drops to the level of the operate as normal that is lower than threshold value, make the PMOS pipe M1 that wins, the conducting of output pmos M2 source-drain electrode, output pmos M2 drain electrode output reference electric current I REF, make the PMOS pipe M1 that wins produce electric current of drain electrode simultaneously greater than bias current circuit Ibias electric current, on the effect of drawing make the 3rd PMOS pipe M3 electrical level rising be higher than the unblocked level of the 3rd PMOS pipe M3, the 3rd PMOS pipe M3 is turn-offed, thereby turn-off the influence of starting current circuit I boost reference voltage V ref output terminal; At this moment, because the promotion current charges that output load capacitance Cload has passed through the generation of starting current circuit I boost, output load capacitance Cload has had the electric charge of maintenance, thereby reference voltage circuit output can keep the level that electric charge before is stabilized in very soon to be needed, and realizes starting fast.
The implementation method of bias current circuit Ibias in the startup accelerating circuit of reference voltage circuit and starting current circuit I boost has multiple, the method that can adopt resistance, active pull-up and external bias circuit to produce.As shown in Figure 2, bias current circuit Ibias adopts resistance to realize that bias current circuit Ibias is made of a biasing resistor R3, described biasing resistor R3 one termination the one PMOS pipe M1 drain electrode and the 3rd PMOS pipe M3 grid, other end ground connection; As shown in Figure 3, bias current circuit Ibias adopts active pull-up to realize, bias current circuit Ibias is made of a N transistor npn npn the 4th NMOS pipe M4, the 4th NMOS pipe M4 source ground, and grid leak is with connecing M1 drain electrode of PMOS pipe and the 3rd PMOS pipe M3 grid; As shown in Figure 4, bias current circuit Ibias adopts external bias circuit to realize, bias current circuit Ibias is made of a N transistor npn npn the 5th NMOS pipe M5, the 5th NMOS pipe M5 source ground, drain electrode connects M1 drain electrode of PMOS pipe and the 3rd PMOS pipe M3 grid, and grid meets external bias voltage Vr1; As shown in Figure 5, starting current circuit I boost adopts resistance to realize that starting current circuit I boost is made of a starting resistance R4, the source electrode of starting resistance R4 one termination the 3rd PMOS pipe M3, another termination power Vdd; As shown in Figure 6, starting current circuit I boost adopts active pull-up to realize, starting current circuit I boost is made of a P transistor npn npn the 6th PMOS pipe M6, and the 6th PMOS pipe M6 grid leak is with the source electrode that is connected to the 3rd PMOS pipe M3, and source electrode meets power supply Vdd; As shown in Figure 7, starting current circuit I boost adopts external bias circuit to realize, starting current circuit I boost is made of a P transistor npn npn the 7th PMOS pipe M7, P transistor npn npn the 7th PMOS pipe M7 drain electrode connects the source electrode of the 3rd PMOS pipe M3, source electrode meets power supply Vdd, and grid meets external bias voltage Vr2.
The startup accelerating circuit of reference voltage circuit of the present invention, be connected on the output circuit of conventional reference voltage circuit, starting accelerating circuit by this just charged to output load before reference voltage circuit starts, after the normal startup of reference voltage circuit, this startup accelerating circuit cuts out, and the output voltage of this moment is by conventional reference voltage circuit voltage supply; Because the charging in advance of load reduces start-up time to the load charging once more thereby need not conventional reference voltage circuit output.The startup accelerating circuit of reference voltage circuit of the present invention can significantly reduce the start-up time that need of reference voltage circuit owing to load effect, for the time has been saved in the rapid startup of entire circuit system.Because the startup accelerating circuit of reference voltage circuit of the present invention is simple in structure, the convenient realization, and in reference voltage circuit main circuit operate as normal, do not influence output characteristics, thereby economize on resources effectively, improve the overall performance of product, for the competitiveness of product in market has increased counterweight.
Claims (7)
1. the startup accelerating circuit of a reference voltage circuit, the output circuit of described reference voltage circuit, comprise P transistor npn npn output pmos, output resistance, described output pmos grid connects the bias voltage that reference voltage circuit produces, source electrode connects power supply, drain electrode connects output resistance, output resistance other end ground connection, after the reference voltage circuit energized powers up, the conducting after the bias voltage that its grid connect reaches threshold value of described output pmos, by its drain electrode output reference electric current, described reference current produces reference voltage output through output resistance; It is characterized in that, described startup accelerating circuit is connected on the output circuit of described reference voltage circuit, described startup accelerating circuit comprises P transistor npn npn the one PMOS pipe, P transistor npn npn the 3rd PMOS pipe, the starting current circuit, bias current circuit, described first gate pmos extremely is connected to the bias voltage that reference voltage circuit produces together with the grid of the output pmos in the output circuit of described reference voltage circuit, source electrode connects power supply, drain electrode connects the grid and bias current circuit one end of the 3rd PMOS pipe, the other end ground connection of bias current circuit, one termination power of starting current circuit, the source electrode of another termination the 3rd PMOS pipe, the drain electrode of the 3rd PMOS pipe connects the reference voltage output end of described reference voltage circuit.
2. the startup accelerating circuit of reference voltage circuit according to claim 1 is characterized in that, described bias current circuit is made of a biasing resistor, the drain electrode of described biasing resistor one termination the one PMOS pipe and the 3rd gate pmos utmost point, other end ground connection.
3. the startup accelerating circuit of reference voltage circuit according to claim 1, it is characterized in that, described bias current circuit is made of a N transistor npn npn the 4th NMOS pipe, and the 4th NMOS manages source ground, and grid leak is with the grid that connects drain electrode of PMOS pipe and the 3rd PMOS pipe.
4. the startup accelerating circuit of reference voltage circuit according to claim 1, it is characterized in that, described bias current circuit is made of a N transistor npn npn the 5th NMOS pipe, the 5th NMOS manages source ground, drain electrode connects M1 drain electrode of PMOS pipe and the 3rd PMOS pipe M3 grid, and grid connects external bias voltage.
5. the startup accelerating circuit of reference voltage circuit according to claim 1 is characterized in that, described starting current circuit is made of a starting resistance, the source electrode of starting resistance one termination the 3rd PMOS pipe, another termination power.
6. the startup accelerating circuit of reference voltage circuit according to claim 1 is characterized in that, described starting current circuit is made of a P transistor npn npn the 6th PMOS pipe, and the 6th gate pmos leaks with the source electrode that is connected to the 3rd PMOS pipe, and source electrode connects power supply.
7. the startup accelerating circuit of reference voltage circuit according to claim 1, it is characterized in that described starting current circuit is made of a P transistor npn npn the 7th PMOS pipe, the drain electrode of the 7th PMOS pipe connects the source electrode of the 3rd PMOS pipe, source electrode connects power supply, and grid connects external bias voltage.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010027342 CN102135781B (en) | 2010-01-21 | 2010-01-21 | Startup acceleration circuit of reference voltage circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201010027342 CN102135781B (en) | 2010-01-21 | 2010-01-21 | Startup acceleration circuit of reference voltage circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102135781A true CN102135781A (en) | 2011-07-27 |
| CN102135781B CN102135781B (en) | 2013-07-24 |
Family
ID=44295585
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201010027342 Active CN102135781B (en) | 2010-01-21 | 2010-01-21 | Startup acceleration circuit of reference voltage circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN102135781B (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104066234A (en) * | 2013-03-21 | 2014-09-24 | 立锜科技股份有限公司 | Light emitting device driver circuit and control circuit and control method thereof |
| CN105388951A (en) * | 2015-12-25 | 2016-03-09 | 上海华虹宏力半导体制造有限公司 | Band-gap reference source circuit |
| CN107402592A (en) * | 2016-12-01 | 2017-11-28 | 上海韦玏微电子有限公司 | Start-up circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7265529B2 (en) * | 2004-08-19 | 2007-09-04 | Micron Technologgy, Inc. | Zero power start-up circuit |
| CN101470456A (en) * | 2007-12-24 | 2009-07-01 | 东部高科股份有限公司 | Start-up circuit for reference voltage generation circuit |
| CN101592971A (en) * | 2008-05-28 | 2009-12-02 | 北京中电华大电子设计有限责任公司 | A kind of self-adapting starting circuit that is used for reference source |
-
2010
- 2010-01-21 CN CN 201010027342 patent/CN102135781B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7265529B2 (en) * | 2004-08-19 | 2007-09-04 | Micron Technologgy, Inc. | Zero power start-up circuit |
| CN101470456A (en) * | 2007-12-24 | 2009-07-01 | 东部高科股份有限公司 | Start-up circuit for reference voltage generation circuit |
| CN101592971A (en) * | 2008-05-28 | 2009-12-02 | 北京中电华大电子设计有限责任公司 | A kind of self-adapting starting circuit that is used for reference source |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104066234A (en) * | 2013-03-21 | 2014-09-24 | 立锜科技股份有限公司 | Light emitting device driver circuit and control circuit and control method thereof |
| CN105388951A (en) * | 2015-12-25 | 2016-03-09 | 上海华虹宏力半导体制造有限公司 | Band-gap reference source circuit |
| CN107402592A (en) * | 2016-12-01 | 2017-11-28 | 上海韦玏微电子有限公司 | Start-up circuit |
| CN107402592B (en) * | 2016-12-01 | 2018-11-20 | 上海韦玏微电子有限公司 | Start-up circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102135781B (en) | 2013-07-24 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN102386898B (en) | Reset circuit | |
| CN102130666B (en) | Duty ratio regulation circuit and method | |
| CN101795132B (en) | Potential pull-up circuit and pull-down circuit of I/O port of integrated circuit | |
| CN204190734U (en) | A kind of electrify restoration circuit | |
| CN101882926B (en) | A kind of power on reset circuit for constant-current driving chip | |
| US11349456B2 (en) | Ultra-low energy per cycle oscillator topology | |
| CN105932873B (en) | A kind of charge pump of low-power consumption high output voltage | |
| CN203838588U (en) | Self-biasing band-gap reference source | |
| CN102983846B (en) | Small-size low-quiescent-current power-on reset circuit | |
| CN103389762B (en) | Startup circuit and bandgap reference source circuit with startup circuit | |
| CN107835006A (en) | Low-power consumption electrification reset power-off reset circuit | |
| CN103997323A (en) | Reset circuit low in power consumption and high in stability | |
| CN201569970U (en) | Power soft-start device suitable for USB interface equipment | |
| CN103901935A (en) | Automatic biasing band-gap reference source | |
| CN203522681U (en) | Double-time-delay power-on sequential control circuit | |
| CN102135781B (en) | Startup acceleration circuit of reference voltage circuit | |
| WO2022161356A1 (en) | Power-on control circuit and related device thereof | |
| CN109491447A (en) | A kind of start-up circuit applied to band-gap reference circuit | |
| CN107885267B (en) | Operating method for bandgap voltage reference circuit | |
| CN102447248A (en) | Pull-down current input output circuit | |
| CN104579251B (en) | Clock gating trigger | |
| US9571068B1 (en) | Power gating circuit and control method for power gating switch thereof | |
| CN105227166B (en) | A kind of metal-oxide-semiconductor back gate voltage control circuit | |
| CN203027363U (en) | Starting-up reset circuit and television | |
| CN203055909U (en) | High-voltage device in composite structure |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| ASS | Succession or assignment of patent right |
Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140109 |
|
| C41 | Transfer of patent application or patent right or utility model | ||
| COR | Change of bibliographic data |
Free format text: CORRECT: ADDRESS; FROM: 201206 PUDONG NEW AREA, SHANGHAI TO: 201203 PUDONG NEW AREA, SHANGHAI |
|
| TR01 | Transfer of patent right |
Effective date of registration: 20140109 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Patentee after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong New Area, Sichuan Road, No. 1188 Bridge Patentee before: Shanghai Huahong NEC Electronics Co., Ltd. |