CN102123122B - Modulation-demodulation device and modulation-demodulation method - Google Patents
Modulation-demodulation device and modulation-demodulation method Download PDFInfo
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Abstract
The invention provides a modulation-demodulation device and a modulation-demodulation method. The modulation-demodulation device comprises a modulation device and a demodulation device, wherein the modulation device modulates each bit in a binary sequence into a modulation signal starting from a central frequency signal, passing through a non-central frequency signal and ended at the central frequency signal, so that the custom modulation of the binary sequence can be finished, and then the transmission of wireless information can be realized; the demodulation device converts the received modulation signal into an analogue signal of which a direct current component is filtered out, determines the positive and negative pulses of the analogue signal from which the direct current component is removed, and demodulates the binary sequence according to the determined positive and negative pulses, so that the custom demodulation of the modulation signal can be finished. The transmission of the wireless information is realized by the mode of modulation and demodulation.
Description
[technical field]
The present invention relates to the communications field, particularly relate to a kind of modulation-demodulation device and method.
[background technology]
Along with improving constantly of information technology, the increasing communication technology be applied to daily and life in, especially wireless network, 3G, WLAN, UWB, bluetooth, broadband satellite system all are the application of the most popular wireless communication technology of 21 century, and the transmission that information exchange is crossed wireless signal has greatly improved efficiency of transmission and enlarged the mutual of a lot of fields.
In the transmission course of wireless signal, at first baseband signal will be become the signal mode that is suitable for the wireless channel transmission, and this process can be called as modulation.According to the form of input signal, modulation can be divided into analog-modulated and Digital Modulation.Described analog-modulated refers to that the analog signal of utilizing input directly modulates amplitude, frequency or the phase place of (or change) carrier wave (sine wave), thereby obtains amplitude-modulated signal (AM), FM signal (FM) or phase-modulated signal (PM).Described Digital Modulation refers to amplitude, frequency or the phase place of utilizing digital signal to control carrier wave, and Digital Modulation commonly used has frequency shift keying (FSK) and phase shift keying (PSK) etc.Wherein, described frequency shift keying is that FSK (Frequency-shift keying) mode is the most frequently used and ripe a kind of modulation system of at present remote communication, and modal is the double frequency FSK system of carrying respectively binary one and 0 with two frequencies.In detail, double frequency FSK system utilizes the oscillation source of two different frequency F1 and F2 to come representation signal 1 and 0, goes to control two independently alternately outputs of oscillation source with 1 and 0 of digital signal.
Receiving terminal at wireless signal needs modulated signal is reduced into the primary signal that will transmit, and this process can be called as demodulation.The process of demodulation is corresponding with modulation, and demodulation is for modulated process, and when modulated process is realized by frequency modulation, then demodulation is also by carrying out same frequency synchronously, and when modulator approach realizes by phase modulation, then demodulation is also undertaken by same-phase synchronously.Demodulation mode commonly used is synchronous demodulation, and the basic function of synchronous demodulation is exactly that the linearity of finishing frequency spectrum is moved, but in order to prevent distortion, must input the demodulation carrier wave synchronous with carrier modulation in the synchro detection circuit, refers to synchronously the same frequency same-phase.
Yet existing various modulation-demo-demodulation methods all are technology that generally use, standard.Therefore, be necessary to propose a kind of brand-new, improved modulation and demodulation device and method, be used for the modulation of wireless messages transmitting terminal and the demodulation of receiving terminal.
[summary of the invention]
One of purpose of the present invention is to provide a kind of modulation-demodulation device, and it can be modulated and send the information that will transmit at transmitting terminal, can carry out demodulation to modulation intelligence at receiving terminal and restore original information.
Two of purpose of the present invention is to provide a kind of modulation-demo-demodulation method, and it can be modulated and send the information that will transmit at transmitting terminal, can carry out demodulation to modulation intelligence at receiving terminal and restore original information.
According to an aspect of the present invention, this law is bright to provide a kind of modulation-demodulation device, and it comprises: modulating device, and it comprises coding module, modulation module and transmitter module, wherein the coding module information coding that is used for transmitting becomes binary sequence; Modulation module is used for binary sequence is modulated into modulation signal, wherein the modulation signal of 1 correspondence of the bit in the binary sequence originates in center frequency signal, through one in low-frequency signals and the high-frequency signal, end at described center frequency signal, the modulation signal of bit 0 correspondence in the binary sequence originates in described center frequency signal, in the described low-frequency signals of process and the described high-frequency signal another, end at described center frequency signal, the frequency of described low-frequency signals is lower than the frequency of described center frequency signal, and the frequency of described high-frequency signal is higher than the frequency of described center frequency signal; Transmitter module is used for sending described modulation signal; Demodulating equipment, it comprises receiver module, demodulation module and decoder module, wherein receiver module receives the modulation signal that corresponding transmitter module sends from channel; Demodulation module converts described modulation signal to analog signal, filters out afterwards the DC component in the described analog signal, and the positive negative pulse stuffing of the analog signal after the DC component is removed in subsequently judgement; Decoder module is used for the binary sequence that demodulates is decoded to restore original information.
Further, include check bit and data bit in the described binary sequence.
Further, described modulation signal comprises synchronizing signal, described synchronizing signal is arranged in before modulation signal corresponding to each bit of described binary sequence, described synchronizing signal originate in described centre frequency, successively through second frequency signal, the 3rd frequency signal and the 4th frequency signal, end at described center frequency signal, the frequency of wherein said second frequency signal is higher than the frequency of described centre frequency, the frequency of the 3rd frequency signal is higher than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is higher than the frequency of described the 3rd frequency signal; Or the frequency of described second frequency signal is lower than the frequency of described centre frequency, and the frequency of the 3rd frequency signal is lower than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is lower than the frequency of described the 3rd frequency signal.
Further, described demodulation module comprises signal conversion unit, every straight unit, the first judging unit, the second judging unit, and wherein signal conversion unit converts the modulation signal that obtains to analog signal; DC component in the analog signal after straight unit filters out the signal conversion unit conversion; The first judging unit detects the amplitude of the analog signal after filtering, and described amplitude and default positive threshold value, preset negative threshold value compared, think during greater than described default positive threshold value in described amplitude to produce a positive pulse, think during less than described preset negative threshold value in described amplitude to produce a negative pulse; The second judgement demodulates binary sequence according to the positive negative pulse stuffing after judging, wherein regard as binary bit 1 with one in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse, in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse another regarded as binary bit 0.
Further, described the second judging unit also is used for the identification synchronizing signal, wherein continuous at least three positive pulses and a negative pulse is identified as synchronizing signal, perhaps continuous at least three negative pulses and a positive pulse is identified as synchronizing signal.
Further, described decoder module comprises verification unit, and described verification unit is carried out verification to the binary sequence that demodulation module obtains.
According to a further aspect in the invention, the invention provides a kind of modulation-demo-demodulation method, it comprises: the information coding that will transmit becomes binary sequence; Binary sequence is modulated into modulation signal, wherein being modulated into of 1 correspondence of the bit in the binary sequence originates in center frequency signal, through one in low-frequency signals and the high-frequency signal, end at the modulation signal of described center frequency signal, being modulated into of bit 0 correspondence in the binary sequence originates in described center frequency signal, in the described low-frequency signals of process and the described high-frequency signal another, end at the modulation signal of described center frequency signal, the frequency of described low-frequency signals is lower than the frequency of described center frequency signal, and the frequency of described high-frequency signal is higher than the frequency of described center frequency signal; Send described modulation signal; From channel, receive the modulation signal that sends; Convert described modulation signal to analog signal; Filter out the DC component in the described analog signal; The positive negative pulse stuffing of the analog signal after the DC component is removed in judgement; Demodulate binary sequence according to the positive negative pulse stuffing after judging; The binary sequence decoding is restored original information.
Further, the described method that binary sequence is modulated into modulation signal also comprises the modulation of synchronizing information, described synchronizing signal be modulated into originate in described centre frequency, successively through second frequency signal and the 3rd frequency signal, end at the modulation signal of described center frequency signal, the frequency of wherein said second frequency signal is higher than the frequency of described centre frequency, the frequency of the 3rd frequency signal is higher than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is higher than the frequency of described the 3rd frequency signal; Or the frequency of described second frequency signal is lower than the frequency of described centre frequency, and the frequency of the 3rd frequency signal is lower than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is lower than the frequency of described the 3rd frequency signal.
Further, judge first synchronizing information before demodulating binary sequence according to the positive negative pulse stuffing after judging, wherein at least three continuous positive pulses and a negative pulse or continuous at least three negative pulses and positive pulse are judged to be synchronizing information.
Further, when demodulating binary sequence according to the positive negative pulse stuffing after judging, regard as binary bit 1 with one in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse, in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse another regarded as binary bit 0.
Further, the positive negative pulse stuffing that the analog signal after the DC component is removed in judgement comprises: the amplitude that at first detects the analog signal after filtering, and described amplitude and default positive threshold value, preset negative threshold value compared, think during greater than described default positive threshold value in described amplitude to produce a positive pulse, think during less than described preset negative threshold value in described amplitude to produce a negative pulse.
Compared with prior art, modulating device in the modulation-demodulation device of the present invention with each bit modulation in the binary sequence be originate in center frequency signal, through a non-central frequency signal, end at the modulation signal of described center frequency signal, thereby can finish the self-defined modulation to binary sequence, and then can realize the transmission of wireless messages; Demodulating equipment among the present invention in the modulation-demodulation device is with the analog signal that filters out DC component that is converted to of the modulation signal that receives, the positive negative pulse stuffing of the analog signal after the DC component is removed in judgement, and demodulate binary sequence according to the positive negative pulse stuffing after judging, thereby can finish the self-defined demodulation to modulation signal.Like this by modulating device and demodulating equipment to the modulation and demodulation of wireless messages, realized the transmission of wireless messages.
[description of drawings]
In order to be illustrated more clearly in the technical scheme of the embodiment of the invention, the accompanying drawing of required use was done to introduce simply during the below will describe embodiment, apparently, accompanying drawing in the following describes only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 shows the block diagram of an embodiment of modulation-demodulation device among the present invention;
Fig. 2 shows the block diagram of an embodiment of modulating device among the present invention;
Fig. 3 shows the schematic flow sheet of an embodiment of modulator approach among the present invention;
Fig. 4 shows block diagram among the embodiment of demodulating equipment among the present invention;
Fig. 5 shows schematic flow sheet among the embodiment of demodulation method among the present invention;
Fig. 6 shows among the present invention the waveform schematic diagram among the embodiment who removes the analog signal after the DC component; With
Fig. 7 shows among the present invention the waveform schematic diagram among another embodiment that removes the analog signal after the DC component.
[embodiment]
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described.Obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, all other embodiment that those of ordinary skills obtain in the situation that does not break away from the present invention's essence and spirit belong to the scope that the present invention is open and protect.
Different local " in one embodiment " that occur may not be to refer to same embodiment in this specification, neither with mutually repel separate of other embodiment or embodiment optionally.In addition, in the order of flow chart or diagram module, perhaps be used for describing the sequence number of one or more embodiment of the present invention and revocablely refer to any specific order, also be not construed as limiting the invention.
Fig. 1 shows the block diagram of an embodiment of modulation-demodulation device 10 among the present invention.Please refer to shown in Figure 1ly, described modulation-demodulation device 10 comprises modulation module 100 and demodulating equipment 300.
Fig. 2 shows the block diagram of an embodiment of modulating device 100 among the present invention.Please refer to shown in Figure 2ly, described modulating device 100 comprises coding module 120, modulation module 140 and transmitter module 160.
In one embodiment, described binary sequence can include check bit and data bit, and described check bit is used for the data bit is carried out verification, and described data bit is used for representing the described information that will transmit.
When specific implementation, the described information that will transmit can be character, described coding module 120 can draw according to the character mapping that will transmit the data bit of 8 corresponding bits, namely 8 " 0 " and " 1 " binary sequence add a bit check bit subsequently after the data bit of 8 bits.Described verification both can be even parity check (i.e. the data bit of 8 bits and check bit and for even number), also can be odd (i.e. the data bit of 8 bits and check bit and be odd number), can also be other more complicated verifications.In a concrete example, the character that transmit is " a ", and check digit adopts even parity check, and the data bit that " a " is corresponding so is " 10000110 ", and check bit is " 1 ", and the binary sequence that last encoder 120 forms is " 100001101 ".
Certainly in other embodiments, also can in binary sequence, not add check bit, and the described data bit in the binary sequence also can represent other information, such as image, sound, numeral etc.In any case as long as described coding module 120 is the output binary sequence.
In one embodiment, difference between the frequency of described low-frequency signals and the frequency of described center frequency signal is greater than 10kHz, be 20kHz, 30kHz, 50kHz, 500kHz etc. such as difference, difference between the frequency of described high-frequency signal and the frequency of described center frequency signal is greater than 10kHz, be 20kHz, 30kHz, 50kHz etc. such as difference, difference is larger, the antijamming capability of modulation signal is stronger, difference is less, the antijamming capability of modulation signal is more weak, and the size of difference can independently be set as required.The duration of center frequency signal, low-frequency signals or high-frequency signal in modulation signal corresponding to each bit in binary sequence can be greater than 0.1ms, such as 1ms, 2ms or 3ms etc., the described duration equally also can independently be set as required.Described centre frequency is changeless in the process that primary information is propagated.
In a concrete example, in the binary sequence 1 can be modulated into the modulation signal that originates in center frequency signal, process low-frequency signals, ends at described center frequency signal, and at this moment 0 in the corresponding binary sequence can be modulated into the modulation signal that originates in center frequency signal, process high-frequency signal, ends at described center frequency signal.For instance, can the Selection Center frequency signal be that 100MHz, low-frequency signals are that 99.5MHz and high-frequency signal are 100.5MHz, then 1 in the binary sequence can be modulated into the modulation signal that 100MHz signal, 99.5MHz signal and 100MHz signal form, and 0 in the binary sequence can be modulated into the modulation signal that 100MHz signal, 100.5MHz signal and 100MHz signal form.
In another concrete example, in the binary sequence 1 can be modulated into the modulation signal that originates in center frequency signal, process high-frequency signal, ends at described center frequency signal, and at this moment 0 in the corresponding binary sequence can be modulated into the modulation signal that originates in center frequency signal, process low-frequency signals, ends at described center frequency signal.For instance, can the Selection Center frequency signal be that 100MHz, low-frequency signals are that 99MHz and high-frequency signal are 101MHz, then 1 in the binary sequence can be modulated into 100MHz, the modulation signal that 101MHz and 99MHz form, 0 in the binary sequence can be modulated into the modulation signal of 100MHz, 99MHz and 100MHz composition.
In one embodiment, except modulation signal corresponding to binary sequence, described modulation signal also comprises synchronizing signal, and described synchronizing signal is arranged in before modulation signal corresponding to each bit of described binary sequence, is used for the beginning of expression one data transfer.Described synchronizing signal originate in described centre frequency, successively through second frequency signal, the 3rd frequency signal and the 4th frequency signal, end at described center frequency signal, the frequency of wherein said second frequency signal is higher than the frequency of described centre frequency, the frequency of the 3rd frequency signal is higher than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is higher than the frequency of described the 3rd frequency signal; Or the frequency of described second frequency signal is lower than the frequency of described centre frequency, and the frequency of the 3rd frequency signal is lower than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is lower than the frequency of described the 3rd frequency signal.In a concrete example, described synchronizing signal can be for originating in the 100MHz signal, ending at the modulation signal of 100MHz signal through 101MHz signal, 102MHz signal and 103MHz signal successively, this moment 100MHz centered by frequency, 101MHz is that second frequency, 102MHz are that the 3rd frequency and 103MHz are the 4th frequency.In another specific embodiment, synchronizing signal can for originate in the 100MHz signal, successively through 99MHz signal, 98MHz signal and 97MHz signal, end at the modulation signal of 100MHz signal, this moment 100MHz centered by frequency, 99MHz is that second frequency, 98MHz are that the 3rd frequency and 97MHz are the 4th frequency.
Fig. 3 shows the schematic flow sheet of an embodiment of the modulator approach 200 among the present invention.Below just in conjunction with Fig. 3 the modulator approach 200 among the present invention is specifically described.
Step 201, the information coding that will transmit becomes binary sequence.
Step 202, binary sequence is modulated into modulation signal, wherein being modulated into of 1 correspondence of the bit in the binary sequence originates in center frequency signal, through one in low-frequency signals and the high-frequency signal, end at the modulation signal of described center frequency signal, being modulated into of bit 0 correspondence in the binary sequence originates in described center frequency signal, in the described low-frequency signals of process and the described high-frequency signal another, end at the modulation signal of described center frequency signal, the frequency of described low-frequency signals is lower than the frequency of described center frequency signal, and the frequency of described high-frequency signal is higher than the frequency of described center frequency signal.
In one embodiment, described modulation signal also comprises synchronizing signal, described synchronizing signal is arranged in before modulation signal corresponding to each bit of described binary sequence, described synchronizing signal is modulated into and originates in described centre frequency, pass through successively the second frequency signal, the 3rd frequency signal and the 4th frequency signal, end at the modulation signal of described center frequency signal, the frequency of wherein said second frequency signal is higher than the frequency of described centre frequency, the frequency of the 3rd frequency signal is higher than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is higher than the frequency of described the 3rd frequency signal; Or the frequency of described second frequency signal is lower than the frequency of described centre frequency, and the frequency of the 3rd frequency signal is lower than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is lower than the frequency of described the 3rd frequency signal.
Step 203 sends described modulation signal.
In addition, in certain embodiments some of described modulator approach 200 realize details, can be with reference to the corresponding description of above-mentioned modulating device 100, and repeated description no longer here.
Fig. 4 shows the block diagram of an embodiment of the demodulating equipment 300 among the present invention.Please refer to shown in Figure 4ly, described demodulating equipment 300 comprises receiver module 320, demodulation module 340 and decoder module 360.
Described receiver module 320 receives the modulation signal that corresponding transmitting terminal sends from channel.
Described demodulation module 340, can be used for and to convert analog signal to from the modulation signal of receiver module 320, filter out afterwards the DC component in the described analog signal, the positive negative pulse stuffing of the analog signal after the DC component is removed in subsequently judgement, and demodulates binary sequence according to the positive negative pulse stuffing after judging.
In one embodiment, described demodulation module 340 comprise signal conversion unit 341, every straight unit 342, the first judging unit 343 and the second judging unit 344.
Described signal conversion unit 341 converts the modulation signal that obtains to analog signal, such as analog voltage signal.DC component in the described analog signal after straight unit 342 can filter out signal conversion unit 341 conversions.Described the first judging unit 343 detects the amplitude of the analog signal after filtering, and described amplitude and default positive threshold value, preset negative threshold value compared, think during greater than described default positive threshold value in described amplitude to produce a positive pulse, think during less than described preset negative threshold value in described amplitude to produce a negative pulse.The absolute value of positive negative threshold value herein in theory should be less than the minimum amplitude of all effective impulses, can guarantee that like this each effective impulse can both be identified judgement, in addition, the absolute value of positive negative threshold value in theory should be greater than near the amplitude of minor swing the pulse invalid center, to guarantee not to be identified judgement at the idler Pulse of center minor swing, therefore, the user can carry out the setting of positive negative threshold value as required.Described the second judging unit 344 demodulates binary sequence according to the positive negative pulse stuffing after judging, wherein regard as binary bit 1 with one in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse, in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse another regarded as binary bit 0.
In one embodiment, continuous a positive pulse and a negative pulse can be regarded as binary bit 1, continuous a negative pulse and a positive pulse are regarded as binary bit 0.
For instance, if the judged result of positive negative pulse stuffing is: positive and negative, positive and negative, negative, positive, negative, positive, the binary sequence that demodulates so just should for: 1,1,0,0.In another embodiment, also a continuous positive pulse and negative pulse can be identified as binary bit 0, so continuous a negative pulse and a positive pulse are identified as binary bit 1.For instance, if the result of positive negative pulse stuffing is: positive and negative, positive and negative, negative, positive, negative, positive, the binary sequence that demodulates so is: 0,0,1,1.
In a concrete example, described positive pulse can be represented with+1, described negative pulse can be represented with-1, described like this first judging unit 343 just can obtain a series of by+1 and-1 ordered series of numbers that forms, and this moment, described the second judging unit 344 just can be according to obtaining binary sequence by+1 and-1 ordered series of numbers that forms.
In a preferred embodiment, described the second judging unit 344 at first needs to identify synchronizing signal according to the positive negative pulse stuffing after judging, after synchronizing signal is determined, just demodulate binary sequence according to the positive negative pulse stuffing after judging, wherein continuous at least three positive pulses and a negative pulse are identified as synchronizing signal, perhaps continuous at least three negative pulses and a positive pulse are identified as synchronizing signal.For instance, if the judged result of positive negative pulse stuffing includes: just, just, positive and negative, think so then to have recognized synchronizing signal that this just means that also ensuing positive negative pulse stuffing will be demodulated into binary sequence.
Described decoder module 360 is used for the binary sequence that demodulates is decoded to restore original information.In a preferred embodiment, described decoder module 360 includes verification unit (not shown), and the described verification unit binary sequence that 340 demodulation obtain to demodulation module carries out verification.For instance, if the binary sequence that is obtained by demodulation module 340 is " 100001101 ", wherein front 8 bits are transmission informations, last bit is check information, and what adopt during modulation is even parity check, so, because the number of " 1 " is odd number in front 8 bits, and check digit is " 1 ", therefore can think that the binary sequence that demodulation obtains is correct.Again for instance, if the binary sequence that is obtained by demodulation module 340 is " 101001101 ", its front 8 bits are transmission informations, last bit is check information, and what adopt during modulation is even parity check, so, because the number of " 1 " is even number in front 8 bits, and check digit is " 1 ", therefore can think that the binary sequence that demodulation obtains is wrong.In one embodiment, described binary sequence can be decoded as character, image, sound or other data.In a concrete example, suppose that the binary sequence that demodulates is " 10000110 ", and learn that the information of transmission is character information, so just " 10000110 " can be decoded as character and be " a ".So just finished the wireless transmission of character " a ".
In the present invention, utilized the frequency hopping of modulated terminal can cause the characteristics of the sign mutation of demodulating end, with each bit modulation in the binary sequence for originating in center frequency signal, through low-frequency signals or high-frequency signal, end at the modulation signal of described center frequency signal, and the upwards saltus step of frequency (such as the paramount frequency signal of center frequency signal or low-frequency signals to center frequency signal) can cause removing positive pulse of analogue signal generating or the negative pulse of DC component, and the downward saltus step of frequency (high-frequency signal is to center frequency signal or center frequency signal tremendously low frequency rate signal) then can cause again removing negative pulse of analogue signal generating or the positive pulse of DC component.Just can demodulate like this each bit of binary sequence by the positive negative pulse stuffing of analyzing the analog signal of removing DC component.
Characteristic, advantage or a benefit of the modulation and demodulation method among the present invention are: demodulating process is not affected by time factor, only needs to consider that positive negative pulse stuffing just can demodulate binary sequence, has improved to a certain extent the anti-interference of communication.
Fig. 5 shows the schematic flow sheet of an embodiment of demodulation method 400 among the present invention.Below just in conjunction with Fig. 5 demodulation method among the present invention 400 is specifically described.
Step 401 receives the modulation signal that corresponding transmitting terminal sends from channel.
Step 402 converts described modulation signal to analog signal.
Step 403 filters out the DC component in the described analog signal.
Step 405 demodulates binary sequence according to the positive negative pulse stuffing after judging.
In one embodiment, positive negative pulse stuffing is demodulated binary sequence, its specific rules is: regard as binary bit 1 with one in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse, in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse another regarded as binary bit 0.
In a preferred embodiment, judge first synchronizing information above-mentioned before according to the positive negative pulse stuffing demodulation binary sequence after judging, wherein continuous at least three positive pulses and a negative pulse are judged to be synchronizing signal, perhaps continuous at least three negative pulses and a positive pulse are judged to be synchronizing signal.
Step 406 restores original information with the binary sequence decoding.
In addition, in certain embodiments some of described demodulation method 400 realize details, can be with reference to the description of above-mentioned demodulating equipment 300, and repeated description no longer here.
The below introduces whole modem procedue take the information of needs transmission as character " a " as example.
In modulation module 100, described coding module 120 is encoded to " 10000110 " with described character " a ", and in the end increases even parity bit " 1 ", finally exports binary sequence " 100001101 ".Described modulation module 140 generates the synchronizing signal that starts from centre frequency, process second frequency, the 3rd frequency and the 4th frequency, ends at centre frequency, subsequently each bit in the binary sequence " 100001101 " is modulated into successively the modulation signal that starts from centre frequency, process high-frequency signal or low-frequency signals, ends at centre frequency.The modulation signal of described sending module 160 in the future automodulation modules 140 sends.
In demodulating equipment 300, the modulation signal that described receiver module 320 receives from sending module 160, and described modulation signal sent to signal conversion unit 341.Described signal conversion unit 341 converts modulation signal to analog signal.Describedly filter out DC component in the described analog signal every straight unit 342.The described analog signal after straight of 343 pairs of described the first judging units judges, judges positive negative pulse stuffing in the analog signal after straight according to default positive threshold value and negative threshold value.The second judge module 344 at first identifies synchronizing signal according to the positive negative pulse stuffing of judging, identifies subsequently binary sequence " 100001101 ".Shown in Fig. 6 is the waveform schematic diagram of an embodiment that filters out the analog signal of described DC component, wherein a continuous positive pulse and negative pulse represents " 1 ", continuous a negative pulse and a positive pulse represent " 0 ", and continuous three positive pulses and a negative pulse represent synchronizing signal.Shown in Fig. 7 is the waveform schematic diagram of another embodiment that filters out the analog signal of described DC component, wherein a continuous positive pulse and negative pulse represents " 0 ", continuous a negative pulse and a positive pulse represent " 1 ", and continuous three negative pulses and a positive pulse represent synchronizing signal.Correction verification module 345 thinks that by the verification of last check bit " 1 " demodulation of binary sequence " 10000110 " is correct.Decoder module 360 is decoded as character " a " with " 10000110 ", so just can finish the wireless transmission of character " a ".
Modulation-demodulation device 10 of the present invention has been realized in modulating device 100 transmission information being modulated into modulation signal by self-defining mode, and in demodulating equipment 300 the modulation signal demodulation that receives is restored prime information.
Be understandable that, for those of ordinary skills, can be equal to replacement or change according to technical scheme of the present invention and inventive concept thereof, and all these changes or replacement all should belong to the protection range of the appended claim of the present invention.
Claims (9)
1. modulation-demodulation device is characterized in that it comprises:
Modulating device, it comprises coding module, modulation module and transmitter module, wherein coding module becomes binary sequence for the information coding that will transmit; Modulation module is used for binary sequence is modulated into modulation signal, wherein the modulation signal of 1 correspondence of the bit in the binary sequence originates in center frequency signal, through one in low-frequency signals and the high-frequency signal, end at described center frequency signal, the modulation signal of bit 0 correspondence in the binary sequence originates in described center frequency signal, in the described low-frequency signals of process and the described high-frequency signal another, end at described center frequency signal, the frequency of described low-frequency signals is lower than the frequency of described center frequency signal, and the frequency of described high-frequency signal is higher than the frequency of described center frequency signal; Transmitter module is used for sending described modulation signal; With
Demodulating equipment, it comprises receiver module, demodulation module and decoder module, wherein receiver module receives the modulation signal that corresponding transmitter module sends from channel; Demodulation module converts described modulation signal to analog signal, filters out afterwards the DC component in the described analog signal, and the positive negative pulse stuffing of the analog signal after the DC component is removed in subsequently judgement; Decoder module is used for the binary sequence that demodulates is decoded to restore original information,
Described modulation signal comprises synchronizing signal, described synchronizing signal is arranged in before modulation signal corresponding to each bit of described binary sequence, described synchronizing signal originate in described centre frequency, successively through second frequency signal, the 3rd frequency signal and the 4th frequency signal, end at described center frequency signal, wherein
The frequency of described second frequency signal is higher than the frequency of described centre frequency, and the frequency of the 3rd frequency signal is higher than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is higher than the frequency of described the 3rd frequency signal; Or
The frequency of described second frequency signal is lower than the frequency of described centre frequency, and the frequency of the 3rd frequency signal is lower than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is lower than the frequency of described the 3rd frequency signal.
2. modulation-demodulation device according to claim 1 is characterized in that, includes check bit and data bit in the described binary sequence.
3. modulation-demodulation device according to claim 1, it is characterized in that, described demodulation module comprises signal conversion unit, every straight unit, the first judging unit, the second judging unit, wherein signal conversion unit converts the modulation signal that obtains to analog signal; DC component in the analog signal after straight unit filters out the signal conversion unit conversion; The first judging unit detects the amplitude of the analog signal after filtering, and described amplitude and default positive threshold value, preset negative threshold value compared, think during greater than described default positive threshold value in described amplitude to produce a positive pulse, think during less than described preset negative threshold value in described amplitude to produce a negative pulse; The second judging unit demodulates binary sequence according to the positive negative pulse stuffing after judging, wherein regard as binary bit 1 with one in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse, in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse another regarded as binary bit 0.
4. modulation-demodulation device according to claim 3, it is characterized in that, described the second judging unit also is used for the identification synchronizing signal, wherein a negative pulse and at least three continuous positive pulses are identified as synchronizing signal, perhaps a positive pulse and at least three continuous negative pulses are identified as synchronizing signal.
5. modulation-demodulation device according to claim 3 is characterized in that, described decoder module comprises verification unit, and described verification unit is carried out verification to the binary sequence that demodulation module obtains.
6. a modulation-demo-demodulation method is characterized in that it comprises
The information coding that will transmit becomes binary sequence;
Binary sequence is modulated into modulation signal, wherein being modulated into of 1 correspondence of the bit in the binary sequence originates in center frequency signal, through one in low-frequency signals and the high-frequency signal, end at the modulation signal of described center frequency signal, being modulated into of bit 0 correspondence in the binary sequence originates in described center frequency signal, in the described low-frequency signals of process and the described high-frequency signal another, end at the modulation signal of described center frequency signal, the frequency of described low-frequency signals is lower than the frequency of described center frequency signal, and the frequency of described high-frequency signal is higher than the frequency of described center frequency signal;
Send described modulation signal;
From channel, receive the modulation signal that sends;
Convert described modulation signal to analog signal;
Filter out the DC component in the described analog signal;
The positive negative pulse stuffing of the analog signal after the DC component is removed in judgement;
Demodulate binary sequence according to the positive negative pulse stuffing after judging; With
The binary sequence decoding is restored original information,
Described modulation signal comprises synchronizing signal, described synchronizing signal is arranged in before modulation signal corresponding to each bit of described binary sequence, described synchronizing signal originate in described centre frequency, successively through second frequency signal, the 3rd frequency signal and the 4th frequency signal, end at described center frequency signal, wherein
The frequency of described second frequency signal is higher than the frequency of described centre frequency, and the frequency of the 3rd frequency signal is higher than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is higher than the frequency of described the 3rd frequency signal; Or
The frequency of described second frequency signal is lower than the frequency of described centre frequency, and the frequency of the 3rd frequency signal is lower than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is lower than the frequency of described the 3rd frequency signal.
7. modulation-demo-demodulation method according to claim 6, it is characterized in that, judge first synchronizing information before demodulating binary sequence according to the positive negative pulse stuffing after judging, wherein a negative pulse and continuous at least three positive pulses or a positive pulse and at least three continuous negative pulses are judged to be synchronizing information.
8. according to claim 6 or 7 described modulation-demo-demodulation methods, it is characterized in that, when demodulating binary sequence according to the positive negative pulse stuffing after judging, regard as binary bit 1 with one in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse, in a continuous positive pulse and negative pulse and a continuous negative pulse and the positive pulse another regarded as binary bit 0.
9. according to claim 6 or 7 described modulation-demo-demodulation methods, it is characterized in that, the positive negative pulse stuffing that the analog signal after the DC component is removed in judgement comprises: the amplitude that at first detects the analog signal after filtering, and described amplitude and default positive threshold value, preset negative threshold value compared, think during greater than described default positive threshold value in described amplitude to produce a positive pulse, think during less than described preset negative threshold value in described amplitude to produce a negative pulse.
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| CN 201010017165 CN102123122B (en) | 2010-01-07 | 2010-01-07 | Modulation-demodulation device and modulation-demodulation method |
| PCT/CN2010/074357 WO2011003328A1 (en) | 2009-07-08 | 2010-06-24 | Method and device for receiving gps and method for calibrating clock |
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| CN102520651A (en) * | 2011-12-21 | 2012-06-27 | 奇瑞汽车股份有限公司 | Load controller |
| CN106464624B (en) * | 2016-07-12 | 2019-04-09 | 深圳市汇顶科技股份有限公司 | A kind of signal demodulating equipment and method applied to closing communication system |
| CN107769860B (en) * | 2016-08-22 | 2020-05-19 | 美的集团股份有限公司 | Encoding method, decoding method, encoding device, decoding device and household appliance |
| CN111130700B (en) * | 2019-12-30 | 2022-10-18 | 浙江大华技术股份有限公司 | Data transmission method and device, storage medium, and electronic device |
| CN111970585B (en) * | 2020-07-08 | 2022-07-15 | 武汉光迅科技股份有限公司 | Signal demodulation method, signal demodulation device, computer storage medium and equipment |
| CN114374586B (en) * | 2020-10-14 | 2024-02-27 | 鹤壁天海电子信息系统有限公司 | Data transmission method, transmitter and receiver |
| CN117997477A (en) * | 2024-04-07 | 2024-05-07 | 北京智芯微电子科技有限公司 | Modulation method and device, demodulation method and device, storage medium, and chip |
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