CN102123120B - Demodulating device and demodulating method - Google Patents
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- CN102123120B CN102123120B CN201010017162.8A CN201010017162A CN102123120B CN 102123120 B CN102123120 B CN 102123120B CN 201010017162 A CN201010017162 A CN 201010017162A CN 102123120 B CN102123120 B CN 102123120B
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Abstract
The invention discloses a demodulating device and a demodulating method which are used for demodulating the primary information of the received modulating information in a self-defining manner. The demodulating device comprises a receiving module, a demodulating module and a decoding module, wherein the receiving module is used for sending a modulating signal to the demodulating module after receiving the modulating signal; the demodulating module is used for converting the modulating signal into an analogue signal, filtering the direct current component of the analogue signal, determining the positive and negative pulses of the analogue signal subjected to direct current component, removal and then demodulating to obtain a binary sequence according to the determined positive and negative pulses; and the decoding module is used for restoring the binary sequence into the primary information. By means of the self-defining demodulating manner, the acceptation and demodulation of wireless information are realized.
Description
[technical field]
The present invention relates to the communications field, particularly relate to a kind of demodulating equipment and method.
[background technology]
Along with improving constantly of information technology, the increasing communication technology is applied in daily and life, especially wireless network, 3G, WLAN, UWB, bluetooth and broadband satellite system are all the application of the most popular wireless communication technology of 21 century, and the transmission that information exchange is crossed wireless signal has greatly improved efficiency of transmission and expanded the mutual of a lot of fields.
In the transmitting procedure of wireless signal, first baseband signal will be become to the signal mode that is suitable for wireless channel transmission, and this process can be called as modulation.According to the form of input signal, modulation can be divided into analog-modulated and Digital Modulation.Described analog-modulated refers to utilize the analog signal of inputting directly to modulate amplitude, frequency or the phase place of (or change) carrier wave (sine wave), thereby obtains amplitude-modulated signal (AM), FM signal (FM) or phase-modulated signal (PM).Described Digital Modulation refers to utilize digital signal to control year wave amplitude, frequency or a phase place, and conventional Digital Modulation has frequency shift keying (FSK) and phase shift keying (PSK) etc.Wherein, described frequency shift keying is that FSK (Frequency-shift keying) mode is the at present remote the most frequently used and more ripe a kind of modulation system of communication, and modal is the double frequency FSK system of binary one and 0 of carrying respectively by two frequencies.In detail, double frequency FSK system is to utilize the oscillation source of two different frequency F1 and F2 to come representation signal 1 and 0, by 1 and 0 of digital signal, goes to control two independently alternately outputs of oscillation source.
Receiving terminal at wireless signal need be reduced into modulated signal the primary signal that will transmit, and this process can be called as demodulation.The process of demodulation is corresponding with modulation, and demodulation is for modulated process, and when modulated process is realized by frequency modulation, demodulation is also by same frequency being carried out synchronously, and when modulator approach realizes by phase modulation, demodulation is also undertaken synchronously by same-phase.Conventional demodulation mode is synchronous demodulation, and the basic function of synchronous demodulation has been exactly that the linearity of frequency spectrum is moved, but in order to prevent distortion, in synchro detection circuit, must input the demodulation carrier wave of synchronizeing with carrier modulation, synchronously refers to same frequency same-phase.
Yet existing various demodulation methods are all technology that generally use, standard.Therefore, be necessary to propose a kind of brand-new, improved demodulating equipment and method, for the demodulation of the receiving terminal of wireless messages.
[summary of the invention]
One of object of the present invention is to provide a kind of demodulating equipment, and it can be carried out demodulation and restore original information the modulation intelligence obtaining by self-defining mode.
Two of object of the present invention is to provide a kind of demodulation method, and it can be carried out demodulation and restore original information the modulation intelligence obtaining by the mode of making by oneself.
According to an aspect of the present invention, this law is bright provides a kind of demodulating equipment, and it comprises: receiver module receives the modulation signal that corresponding transmitting terminal sends from channel; Demodulation module, converts described modulation signal to analog signal, filters out afterwards the DC component in described analog signal, and the positive negative pulse stuffing of the analog signal after DC component is removed in judgement subsequently, demodulates binary sequence subsequently according to the positive negative pulse stuffing after judgement; Decoder module, for decoding to restore prime information to the binary sequence demodulating.
Further, described demodulation module comprises signal conversion unit, every straight unit, the first judging unit, the second judging unit, and wherein signal conversion unit converts the modulation signal obtaining to analog signal; DC component in analog signal after straight unit filters out signal conversion unit conversion; The first judging unit detects the amplitude of the analog signal after filtering, and described amplitude and default positive threshold value, preset negative threshold value are compared, when described amplitude is greater than described default positive threshold value, thinks and produce a positive pulse, when described amplitude is less than described preset negative threshold value, think and produce a negative pulse; The second judging unit demodulates binary sequence according to the positive negative pulse stuffing after judgement, wherein by one in a continuous positive pulse and negative pulse and a continuous negative pulse and a positive pulse, regard as binary bit 1, a continuous positive pulse and negative pulse and a continuous negative pulse and another in a positive pulse are regarded as to binary bit 0.
Further, described the second judging unit is used for identifying synchronizing signal, wherein continuous at least three positive pulses and a negative pulse is identified as to synchronizing signal, or continuous at least three negative pulses and a positive pulse are identified as to synchronizing signal.
Further, described decoder module comprises verification unit, and the binary sequence that described verification unit obtains demodulation module carries out verification.
Further, described decoder module is decoded as character by the binary sequence demodulating.
According to a further aspect in the invention, the invention provides a kind of demodulation method, it comprises: from channel, receive the modulation signal that corresponding transmitting terminal sends; Convert described modulation signal to analog signal; Filter out the DC component in described analog signal; The positive negative pulse stuffing of the analog signal after DC component is removed in judgement, first detect the amplitude of the analog signal after filtering, and described amplitude and default positive threshold value, preset negative threshold value are compared, when described amplitude is greater than described default positive threshold value, thinks and produce a positive pulse, when described amplitude is less than described preset negative threshold value, think and produce a negative pulse; According to the positive negative pulse stuffing after judgement, demodulate binary sequence; Binary sequence decoding is restored to original information.
Further, according to the positive negative pulse stuffing after judgement, demodulate and first judge synchronizing information before binary sequence, wherein at least three continuous positive pulses and a negative pulse or continuous at least three negative pulses and a positive pulse are judged to be to synchronizing information.
Further, the binary sequence demodulating according to the positive negative pulse stuffing after judgement is carried out to verification.
Further, described original information is character.
Further, when demodulating binary sequence according to the positive negative pulse stuffing after judgement, regard as binary bit 1 by one in a continuous positive pulse and negative pulse and a continuous negative pulse and a positive pulse, a continuous positive pulse and negative pulse and a continuous negative pulse and another in a positive pulse are regarded as to binary bit 0.
Compared with prior art, in the present invention being converted to of the modulation signal receiving filtered out to the analog signal of DC component, the positive negative pulse stuffing of the analog signal after DC component is removed in judgement, and demodulate binary sequence according to the positive negative pulse stuffing after judgement, thereby can complete the self-defined demodulation to modulation signal.
[accompanying drawing explanation]
In order to be illustrated more clearly in the technical scheme of the embodiment of the present invention, below the accompanying drawing of required use during embodiment is described is briefly described, apparently, accompanying drawing in the following describes is only some embodiments of the present invention, for those of ordinary skills, do not paying under the prerequisite of creative work, can also obtain according to these accompanying drawings other accompanying drawing.
Fig. 1 shows the block diagram of an embodiment of modulating device in the present invention;
Fig. 2 shows the schematic flow sheet of an embodiment of modulator approach in the present invention;
Fig. 3 shows block diagram in an embodiment of demodulating equipment in the present invention;
Fig. 4 shows schematic flow sheet in an embodiment of demodulation method in the present invention;
Fig. 5 shows the waveform schematic diagram in an embodiment who removes the analog signal after DC component in the present invention; With
Fig. 6 shows the waveform schematic diagram in another embodiment that removes the analog signal after DC component in the present invention.
[embodiment]
Below in conjunction with the accompanying drawing in the embodiment of the present invention, the technical scheme in the embodiment of the present invention is clearly and completely described.Obviously, described embodiment is only the present invention's part embodiment, rather than whole embodiment.Embodiment based in the present invention, all other embodiment that those of ordinary skills obtain in the situation that not departing from the present invention's essence and spirit, belong to the scope that the present invention is open and protect.
In this specification, different local " in one embodiment " that occur may not refer to same embodiment, neither with mutually repel separate of other embodiment or embodiment optionally.In addition, in the order of flow chart or diagram module, or be used for describing the sequence number of one or more embodiment of the present invention and revocablely refer to any specific order, not also being construed as limiting the invention.
Fig. 1 shows the block diagram of an embodiment of modulating device 100 in the present invention.Please refer to shown in Fig. 1, described modulating device 100 comprises coding module 120, modulation module 140 and transmitter module 160.
Coding module 120 is for becoming binary sequence the information coding that will transmit.
In one embodiment, described binary sequence can include check bit and data bit, and described check bit is for data bit is carried out to verification, and described data bit is for representing the described information that will transmit.
When specific implementation, the described information that will transmit can be character, described coding module 120 can draw according to the character mapping that will transmit the data bit of 8 corresponding bits, " 0 " of 8 and " 1 " binary sequence add a bit check bit subsequently after the data bit of 8 bits.Described verification can be both even parity check (i.e. the data bit of 8 bits and check bit and for even number), can be also odd (i.e. the data bit of 8 bits and check bit and be odd number), can also be other more complicated verifications.In a concrete example, the character that transmit is " a ", and check digit adopts even parity check, and the data bit that " a " is corresponding is so " 10000110 ", and check bit is " 1 ", and the binary sequence that last encoder 120 forms is " 100001101 ".
Certainly in other embodiments, also can in binary sequence, not add check bit, and the described data bit in binary sequence also can represent other information, such as image, sound, numeral etc.In any case as long as described coding module 120 is output binary sequence.
Modulation module 140 is for being modulated into modulation signal by binary sequence, wherein the modulation signal of 1 correspondence of the bit in binary sequence originates in center frequency signal, through one in low-frequency signals and high-frequency signal, end at described center frequency signal, the modulation signal of bit 0 correspondence in binary sequence originates in described center frequency signal, another in the described low-frequency signals of process and described high-frequency signal, end at described center frequency signal, the frequency of described low-frequency signals is lower than the frequency of described center frequency signal, the frequency of described high-frequency signal is higher than the frequency of described center frequency signal.
In one embodiment, difference between the frequency of described low-frequency signals and the frequency of described center frequency signal is greater than 10kHz, such as difference is 20kHz, 30kHz, 50kHz, 500kHz etc., difference between the frequency of described high-frequency signal and the frequency of described center frequency signal is greater than 10kHz, such as difference is 20kHz, 30kHz, 50kHz etc., difference is larger, the antijamming capability of modulation signal is stronger, difference is less, the antijamming capability of modulation signal is more weak, and the size of difference can independently be set as required.The duration of center frequency signal, low-frequency signals or high-frequency signal in modulation signal corresponding to each bit in binary sequence can be greater than 0.1ms, such as 1ms, 2ms or 3ms etc., the described duration equally also can independently be set as required.In the process that described centre frequency is propagated at primary information, be changeless.
In a concrete example, in binary sequence 1 can be modulated into the modulation signal that originates in center frequency signal, process low-frequency signals, ends at described center frequency signal, and at this moment 0 in corresponding binary sequence can be modulated into the modulation signal that originates in center frequency signal, process high-frequency signal, ends at described center frequency signal.For instance, can Selection Center frequency signal be that 100MHz, low-frequency signals are that 99.5MHz and high-frequency signal are 100.5MHz, 1 in binary sequence can be modulated into the modulation signal that 100MHz signal, 99.5MHz signal and 100MHz signal form, and 0 in binary sequence can be modulated into the modulation signal that 100MHz signal, 100.5MHz signal and 100MHz signal form.
In another concrete example, in binary sequence 1 can be modulated into the modulation signal that originates in center frequency signal, process high-frequency signal, ends at described center frequency signal, and at this moment 0 in corresponding binary sequence can be modulated into the modulation signal that originates in center frequency signal, process low-frequency signals, ends at described center frequency signal.For instance, can Selection Center frequency signal be that 100MHz, low-frequency signals are that 99MHz and high-frequency signal are 101MHz, 1 in binary sequence can be modulated into 100MHz, the modulation signal that 101MHz and 99MHz form, 0 in binary sequence can be modulated into the modulation signal of 100MHz, 99MHz and 100MHz composition.
In one embodiment, except modulation signal corresponding to binary sequence, described modulation signal also comprises synchronizing signal, before described synchronizing signal is arranged in the modulation signal that each bit of described binary sequence is corresponding, for representing the beginning of a data transfer.Described synchronizing signal originates in described centre frequency, passes through second frequency signal, the 3rd frequency signal and the 4th frequency signal successively, ends at described center frequency signal, the frequency of wherein said second frequency signal is higher than the frequency of described centre frequency, the frequency of the 3rd frequency signal is higher than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is higher than the frequency of described the 3rd frequency signal; Or the frequency of described second frequency signal is lower than the frequency of described centre frequency, the frequency of the 3rd frequency signal is lower than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is lower than the frequency of described the 3rd frequency signal.In a concrete example, described synchronizing signal can be for originating in 100MHz signal, through 101MHz signal, 102MHz signal and 103MHz signal, end at successively the modulation signal of 100MHz signal, frequency centered by 100MHz now, 101MHz is that second frequency, 102MHz are that the 3rd frequency and 103MHz are the 4th frequency.In another specific embodiment, synchronizing signal can for originate in 100MHz signal, successively through 99MHz signal, 98MHz signal and 97MHz signal, end at the modulation signal of 100MHz signal, frequency centered by 100MHz now, 99MHz is that second frequency, 98MHz are that the 3rd frequency and 97MHz are the 4th frequency.
Transmitter module 160 sends the modulation signal of modulation module 140 modulation.In one embodiment, described transmitter module 160 can be transmitted into the modulation signal of described modulation module 140 modulation in channel, and the channel here can be wireless channel.
Fig. 2 shows the schematic flow sheet of an embodiment of the modulator approach 200 in the present invention.Below just in conjunction with Fig. 2, the modulator approach 200 in the present invention is specifically described.
Step 201, the information coding that will transmit becomes binary sequence.
Step 202, binary sequence is modulated into modulation signal, wherein being modulated into of 1 correspondence of the bit in binary sequence originates in center frequency signal, through one in low-frequency signals and high-frequency signal, end at the modulation signal of described center frequency signal, being modulated into of bit 0 correspondence in binary sequence originates in described center frequency signal, another in the described low-frequency signals of process and described high-frequency signal, end at the modulation signal of described center frequency signal, the frequency of described low-frequency signals is lower than the frequency of described center frequency signal, the frequency of described high-frequency signal is higher than the frequency of described center frequency signal.
In one embodiment, described modulation signal also comprises synchronizing signal, before described synchronizing signal is arranged in the modulation signal that each bit of described binary sequence is corresponding, described synchronizing signal is modulated into and originates in described centre frequency, pass through successively second frequency signal, the 3rd frequency signal and the 4th frequency signal, end at the modulation signal of described center frequency signal, the frequency of wherein said second frequency signal is higher than the frequency of described centre frequency, the frequency of the 3rd frequency signal is higher than the frequency of described second frequency signal, the frequency of the 4th frequency signal is higher than the frequency of described the 3rd frequency signal, or the frequency of described second frequency signal is lower than the frequency of described centre frequency, the frequency of the 3rd frequency signal is lower than the frequency of described second frequency signal, and the frequency of the 4th frequency signal is lower than the frequency of described the 3rd frequency signal.
Step 203, sends described modulation signal.
In addition, in certain embodiments some of described modulator approach 200 realize details, can be with reference to the corresponding description of above-mentioned modulating device 100, and repeated description no longer here.
Fig. 3 shows the block diagram of an embodiment of the demodulating equipment 300 in the present invention.Please refer to shown in Fig. 3, described demodulating equipment 300 comprises receiver module 320, demodulation module 340 and decoder module 360.
Described receiver module 320 receives the modulation signal that corresponding transmitting terminal sends from channel.
Described demodulation module 340, can be for converting the modulation signal from receiver module 320 to analog signal, filter out afterwards the DC component in described analog signal, the positive negative pulse stuffing of the analog signal after DC component is removed in judgement subsequently, and demodulates binary sequence according to the positive negative pulse stuffing after judgement.
In one embodiment, described demodulation module 340 comprise signal conversion unit 341, every straight unit 342, the first judging unit 343 and the second judging unit 344.
Described signal conversion unit 341 converts the modulation signal obtaining to analog signal, such as analog voltage signal.DC component in described analog signal after straight unit 342 can filter out signal conversion unit 341 conversions.Described the first judging unit 343 detects the amplitude of the analog signal after filtering, and described amplitude and default positive threshold value, preset negative threshold value are compared, when described amplitude is greater than described default positive threshold value, thinks and produce a positive pulse, when described amplitude is less than described preset negative threshold value, think and produce a negative pulse.The absolute value of positive negative threshold value herein should be less than the minimum amplitude of all effective impulses in theory, can guarantee that like this each effective impulse can be identified judgement, in addition, the absolute value of positive negative threshold value should be greater than near the amplitude of the invalid minor swing pulse in center in theory, to guarantee not to be identified judgement at the idler Pulse of center minor swing, therefore, user can carry out the setting of positive negative threshold value as required.Described the second judging unit 344 demodulates binary sequence according to the positive negative pulse stuffing after judgement, wherein by one in a continuous positive pulse and negative pulse and a continuous negative pulse and a positive pulse, regard as binary bit 1, a continuous positive pulse and negative pulse and a continuous negative pulse and another in a positive pulse are regarded as to binary bit 0.
In one embodiment, continuous a positive pulse and a negative pulse can be regarded as to binary bit 1, continuous a negative pulse and a positive pulse are regarded as to binary bit 0.
For instance, if judgment result is that of positive negative pulse stuffing: positive and negative, positive and negative, negative, positive, negative, positive, the binary sequence demodulating so should be just: 1,1,0,0.In another embodiment, also continuous a positive pulse and a negative pulse can be identified as to binary bit 0, so continuous a negative pulse and a positive pulse are identified as binary bit 1.For instance, if the result of positive negative pulse stuffing is: positive and negative, positive and negative, negative, positive, negative, positive, the binary sequence demodulating is so: 0,0,1,1.
In a concrete example, described positive pulse can be represented with+1, described negative pulse can be represented with-1, described like this first judging unit 343 just can obtain a series of by+1 and-1 ordered series of numbers forming, and now described the second judging unit 344 just can be according to obtaining binary sequence by+1 and-1 ordered series of numbers forming.
In a preferred embodiment, first described the second judging unit 344 needs to identify synchronizing signal according to the positive negative pulse stuffing after judgement, after synchronizing signal is determined, just according to the positive negative pulse stuffing after judgement, demodulate binary sequence, wherein continuous at least three positive pulses and a negative pulse are identified as to synchronizing signal, or continuous at least three negative pulses and a positive pulse are identified as to synchronizing signal.For instance, if the judged result of positive negative pulse stuffing includes: just, just, positive and negative, so think and recognized synchronizing signal, this also just means that ensuing positive negative pulse stuffing will be demodulated into binary sequence.
Described decoder module 360, for decoding to restore original information to the binary sequence demodulating.In a preferred embodiment, described decoder module 360 includes verification unit (not shown), and the described verification unit binary sequence that 340 demodulation obtain to demodulation module carries out verification.For instance, if the binary sequence being obtained by demodulation module 340 is " 100001101 ", wherein front 8 bits are transmission informations, last bit is check information, and what when modulation adopted is even parity check, so, because the number of " 1 " in front 8 bits is odd number, and check digit is " 1 ", therefore can think that the binary sequence that demodulation obtains is correct.Again for instance, if the binary sequence being obtained by demodulation module 340 is " 101001101 ", its front 8 bits are transmission informations, last bit is check information, and what when modulation adopted is even parity check, so, because the number of " 1 " in front 8 bits is even number, and check digit is " 1 ", therefore can think that the binary sequence that demodulation obtains is wrong.In one embodiment, described binary sequence can be decoded as to character, image, sound or other data.In a concrete example, suppose that the binary sequence demodulating is " 10000110 ", and learn that the information of transmission is character information, so just " 10000110 " can be decoded as to character for " a ".So just completed the wireless transmission of character " a ".
In the present invention, utilized the frequency hopping of modulated terminal can cause the feature of the sign mutation of demodulating end, by each bit modulation in binary sequence for originating in center frequency signal, through low-frequency signals or high-frequency signal, end at the modulation signal of described center frequency signal, and the upwards saltus step of frequency (such as the paramount frequency signal of center frequency signal or low-frequency signals are to center frequency signal) can cause removing positive pulse of analogue signal generating or the negative pulse of DC component, the downward saltus step of frequency (high-frequency signal is to center frequency signal or center frequency signal tremendously low frequency rate signal) can cause again removing negative pulse of analogue signal generating or the positive pulse of DC component.The positive negative pulse stuffing of removing the analog signal of DC component by analysis like this just can demodulate each bit of binary sequence.
Feature, advantage or a benefit of the modulation and demodulation method in the present invention are: demodulating process is not affected by time factor, only need to consider that positive negative pulse stuffing just can demodulate binary sequence, have improved to a certain extent the anti-interference of communication.
Fig. 4 shows the schematic flow sheet of an embodiment of demodulation method 400 in the present invention.Below just in conjunction with Fig. 4, demodulation method in the present invention 400 is specifically described.
Step 401 receives the modulation signal that corresponding transmitting terminal sends from channel.
Step 402, converts described modulation signal to analog signal.
Step 403, filters out the DC component in described analog signal.
Step 404, the positive negative pulse stuffing of the analog signal after DC component is removed in judgement.Specifically, first detect the amplitude of the analog signal after filtering, and described amplitude and default positive threshold value, preset negative threshold value are compared, when described amplitude is greater than described default positive threshold value, thinks and produce a positive pulse, when described amplitude is less than described preset negative threshold value, think and produce a negative pulse.
Step 405, demodulates binary sequence according to the positive negative pulse stuffing after judgement.
In one embodiment, positive negative pulse stuffing is demodulated to binary sequence, its specific rules is: regard as binary bit 1 by one in a continuous positive pulse and negative pulse and a continuous negative pulse and a positive pulse, a continuous positive pulse and negative pulse and a continuous negative pulse and another in a positive pulse are regarded as to binary bit 0.
In a preferred embodiment, above-mentioned according to judgement after positive negative pulse stuffing demodulation binary sequence before first judge synchronizing information, wherein continuous at least three positive pulses and a negative pulse are judged to be to synchronizing signal, or continuous at least three negative pulses and a positive pulse are judged to be to synchronizing signal.
Step 406, restores original information by binary sequence decoding.
In addition, in certain embodiments some of described demodulation method 400 realize details, can be with reference to the description of above-mentioned demodulating equipment 300, and repeated description no longer here.
The information of the needs of take below transmission as character " a " be example, introduce whole modem procedue.
In modulation module 100, described coding module 120 is encoded to " 10000110 " by described character " a ", and in the end increases even parity bit " 1 ", finally exports binary sequence " 100001101 ".Described modulation module 140 generates the synchronizing signal that starts from centre frequency, process second frequency, the 3rd frequency and the 4th frequency, ends at centre frequency, subsequently each bit in binary sequence " 100001101 " is modulated into successively to the modulation signal that starts from centre frequency, process high-frequency signal or low-frequency signals, ends at centre frequency.The modulation signal of described sending module 160 modules of automodulation in the future 140 sends.
In demodulating equipment 300, the modulation signal that described receiver module 320 receives from sending module 160, and described modulation signal is sent to signal conversion unit 341.Described signal conversion unit 341 converts modulation signal to analog signal.Describedly every straight unit 342, filter out the DC component in described analog signal.Analog signal described in 343 pairs of described the first judging units after straight judges, the positive negative pulse stuffing according to default positive threshold value and negative threshold value judgement in the analog signal after straight.First the second judge module 344 identifies synchronizing signal according to the positive negative pulse stuffing of judgement, identifies subsequently binary sequence " 100001101 ".Shown in Fig. 5 is the waveform schematic diagram of an embodiment that filters out the analog signal of described DC component, wherein a continuous positive pulse and a negative pulse represents " 1 ", continuous a negative pulse and a positive pulse represent " 0 ", and continuous three positive pulses and a negative pulse represent synchronizing signal.Shown in Fig. 6 is the waveform schematic diagram of another embodiment that filters out the analog signal of described DC component, wherein a continuous positive pulse and a negative pulse represents " 0 ", continuous a negative pulse and a positive pulse represent " 1 ", and continuous three negative pulses and a positive pulse represent synchronizing signal.Correction verification module 345 thinks that by the verification of last check bit " 1 " demodulation of binary sequence " 10000110 " is correct.Decoder module 360 is decoded as character " a " by " 10000110 ", so just can complete the wireless transmission of character " a ".
Demodulating equipment 300 of the present invention has been realized the modulation signal demodulation receiving has been restored to prime information by self-defining mode.
Be understandable that, for those of ordinary skills, can be equal to replacement or change according to technical scheme of the present invention and inventive concept thereof, and all these changes or replacement all should belong to the protection range of the appended claim of the present invention.
Claims (6)
1. a demodulating equipment, is characterized in that, it comprises:
Receiver module receives the modulation signal that corresponding transmitting terminal sends from channel;
Demodulation module, converts described modulation signal to analog signal, filters out afterwards the DC component in described analog signal, and then the positive negative pulse stuffing of the analog signal after DC component is removed in judgement, demodulates binary sequence subsequently according to the positive negative pulse stuffing after judgement; With
Decoder module, for the binary sequence demodulating is decoded to restore prime information,
Described demodulation module comprises signal conversion unit, every straight unit, the first judging unit and the second judging unit, wherein signal conversion unit converts the modulation signal obtaining to analog signal; DC component in analog signal after straight unit filters out signal conversion unit conversion; The first judging unit detects the amplitude of the analog signal after filtering, and described amplitude and default positive threshold value, preset negative threshold value are compared, when described amplitude is greater than described default positive threshold value, thinks and produce a positive pulse, when described amplitude is less than described preset negative threshold value, think and produce a negative pulse; The second judging unit demodulates binary sequence according to the positive negative pulse stuffing after judgement,
Wherein by one in a continuous positive pulse and negative pulse and a continuous negative pulse and a positive pulse, regard as binary bit 1, a continuous positive pulse and negative pulse and a continuous negative pulse and another in a positive pulse are regarded as to binary bit 0
Described the second judging unit, also for identifying synchronizing signal, is wherein identified as synchronizing signal by continuous a negative pulse and at least three positive pulses, or continuous a positive pulse and at least three negative pulses are identified as to synchronizing signal.
2. demodulating equipment according to claim 1, is characterized in that, described decoder module comprises verification unit, and the binary sequence that described verification unit obtains demodulation module carries out verification.
3. demodulating equipment according to claim 1, is characterized in that, described decoder module is decoded as character by the binary sequence demodulating.
4. a demodulation method, is characterized in that, it comprises:
From channel, receive the modulation signal that corresponding transmitting terminal sends;
Convert described modulation signal to analog signal;
Filter out the DC component in described analog signal;
The positive negative pulse stuffing of the analog signal after DC component is removed in judgement, first detect the amplitude of the analog signal after filtering, and described amplitude and default positive threshold value, preset negative threshold value are compared, when described amplitude is greater than described default positive threshold value, thinks and produce a positive pulse, when described amplitude is less than described preset negative threshold value, think and produce a negative pulse;
According to the positive negative pulse stuffing after judgement, demodulate binary sequence; With
Binary sequence decoding is restored to prime information,
According to the positive negative pulse stuffing after judgement, demodulate before binary sequence and first judge synchronizing information, wherein by continuous a negative pulse and at least three positive pulses, or continuous a positive pulse and at least three negative pulses are judged to be synchronizing information,
When demodulating binary sequence according to the positive negative pulse stuffing after judgement, regard as binary bit 1 by one in a continuous positive pulse and negative pulse and a continuous negative pulse and a positive pulse, a continuous positive pulse and negative pulse and a continuous negative pulse and another in a positive pulse are regarded as to binary bit 0.
5. demodulation method according to claim 4, is characterized in that, it also comprises:
The binary sequence demodulating according to the positive negative pulse stuffing after judgement is carried out to verification.
6. demodulation method according to claim 4, is characterized in that, described prime information is character.
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