CN102122618B

CN102122618B - Method for acquiring P-type and N-type alternating semiconductor

Info

Publication number: CN102122618B
Application number: CN 201010027237
Authority: CN
Inventors: 肖胜安
Original assignee: Shanghai Hua Hong NEC Electronics Co Ltd
Current assignee: Shanghai Huahong Grace Semiconductor Manufacturing Corp
Priority date: 2010-01-08
Filing date: 2010-01-08
Publication date: 2013-03-13
Anticipated expiration: 2030-01-08
Also published as: CN102122618A

Abstract

The invention discloses a method for acquiring aP-type and N-type alternating semiconductor, which comprises the following steps of: firstly, growing a dielectric film on an N-type epitaxial silicon chip, forming a groove by photoetching/etching, and removing the defect of the groove surface through sacrificial oxidation; secondly, growing a P-type epitaxial layer in the groove by utilizing an epitaxial process and simultaneously doping carbon, after the thickness of a carbon-doped layer reaches a requirement, continuously growing the P-type epitaxial layer to completely fill in the groove or filling undoped silicon after certain thickness of the carbon-doped layer is filled to obtain a seamless groove; thirdly, removing polysilicon generated on the surface of the silicon chip by utilizing back etching or chemical mechanical polishing; and fourthly, removing the dielectric film on the surface to obtain a P-type and N-type alternating structure. The method for acquiring the P-type and N-type alternating semiconductor can inhibit the diffusion of boron in the P-type epitaxial layer in the subsequent thermal process, reduce the on resistance of a device and improve the device performance.

Description

Obtain P type alternately and the method for N type semiconductor

Technical field

The present invention relates to a kind of manufacture method of semiconductor device, be specifically related to a kind of manufacture method of P type N-type epitaxial loayer of super-junction device.

Background technology

At present, super junction MOSFET adopts new structure of voltage-sustaining layer to utilize the P type of a series of alternative arrangement and N type semiconductor epitaxial loayer just P type N-type district to be exhausted under low voltage under cut-off state, realize that electric charge compensates mutually, thereby make P type N-type district under high-dopant concentration, can realize high puncture voltage, thereby obtain simultaneously low on-resistance and high-breakdown-voltage, the power MOSFET theoretical limit breaks traditions.

The structure of this device and manufacture method can be divided into two large classes, and the first kind is to utilize repeatedly photoetching-epitaxial growth and inject to obtain P type and N-type doped region alternately; Equations of The Second Kind is open channels on the N-type silicon epitaxy layer, inserts P type polycrystalline in groove, or tilts to inject p type impurity, or inserts P type extension.Above-mentioned first kind technique is complex process not only, realize that difficulty is large, and cost is very high.In the Equations of The Second Kind technique, although it is larger usually to utilize P type extension to fill up the mode number technology difficulty of groove, because that it has cost is low, very promising.

In the above method, no matter that class, after the N-type that replaces/P type epitaxial loayer forms, all also have at least some long-time high-temperature technologies, such as grid oxygen generating process, push away trap technique, high-temperature annealing process and boron-phosphorosilicate glass (BPSG) reflux technique after injecting leaked in the source, these techniques can make the boron of the outer Yanzhong of P type be diffused in the N-type epitaxial loayer, thereby part N-type charge carrier in the N-type epitaxial loayer is neutralized, and the conduction resistance of device is improved.Someone is in order to reduce this effect, to push away trap technique mentions P type epitaxial loayer and carries out before forming, but this way can only realize in some technique on the one hand, on the other hand, even do not consider this technique, high-temperature annealing process and boron PSG reflux technique that other thermal process such as grid oxygen generating process, source leak after injecting are also not little to the effect of boron diffusion; Particularly, super junction technique be used to middle pressure such as VDS 200V and under the time because the thickness of each epitaxial loayer is reducing, the impact of this effect just more must be considered.

Summary of the invention

Technical problem to be solved by this invention provides P type that a kind of acquisition replaces and the method for N type semiconductor, and it can suppress the diffusion of boron in the subsequent thermal process in the P type epitaxial loayer, lowers the conducting resistance of device, improves performance of devices.

In order to solve above technical problem, the invention provides P type that a kind of acquisition replaces and the method for N type semiconductor, may further comprise the steps: step 1. at the N-type epitaxial silicon chip deielectric-coating of growing up, utilize photoetching/etching to form groove, and by sacrificing the defective of oxidation removal flute surfaces; Step 2. utilize epitaxy technique growing P-type epitaxial loayer in groove also to mix simultaneously carbon; After the carbon dope layer thickness reaches requirement, continue to insert plain silicon after the growing P-type extension is filled up groove or is filled into certain thickness, obtain seamless trench fill; Step 3. utilize back quarter or cmp that the polysilicon that silicon chip surface generates is removed; Step 4. the deielectric-coating on surface is removed, thereby obtain a kind of P type that replaces and N-type structure.

The present invention also provides P type that a kind of acquisition replaces and the method for N type semiconductor, may further comprise the steps: step 1. and at the N-type epitaxial silicon chip deielectric-coating of growing up, utilize photoetching/etching to form groove, and by sacrificing the defective of oxidation removal flute surfaces; Step 2. utilize the mode of Implantation, carbon is doped in the N-type epitaxial loayer, recycling epitaxy technique growing P-type epitaxial loayer in groove also mixes carbon simultaneously; After the carbon dope layer thickness reaches requirement, continue to insert plain silicon after the growing P-type extension is filled up groove or is filled into certain thickness, obtain seamless trench fill; Step 3. utilize back quarter or cmp that the polysilicon that silicon chip surface generates is removed; Step 4. the deielectric-coating on surface is removed, thereby obtain a kind of P type that replaces and N-type structure.

The present invention also provides P type that a kind of acquisition replaces and the method for N type semiconductor, may further comprise the steps: step 1. and at the N-type epitaxial silicon chip deielectric-coating of growing up, utilize photoetching/etching to form groove, and by sacrificing the defective of oxidation removal flute surfaces; Step 2. utilize the mode of Implantation, carbon is doped in the N-type epitaxial loayer, insert plain silicon after recycling epitaxy technique growing P-type epitaxial loayer in groove fills up groove or is filled into certain thickness, obtain seamless trench fill; Step 3. utilize back quarter or cmp that the polysilicon that silicon chip surface generates is removed; Step 4. the deielectric-coating on surface is removed, thereby obtain a kind of P type that replaces and N-type structure.

Beneficial effect of the present invention is: it can suppress the diffusion of boron in the subsequent thermal process in the P type epitaxial loayer, lowers the conducting resistance of device, improves performance of devices.

Description of drawings

Below in conjunction with the drawings and specific embodiments the present invention is described in further detail.

Fig. 1 is the schematic diagram that groove forms in the described step 1 of the embodiment of the invention;

Fig. 2 grows up the P type extension of carbon dope not again until the full schematic diagram of trench fill after the P type extension of carbon dope in the described step 2 of the embodiment of the invention forms;

Fig. 2 '-the 1st forms the schematic diagram of the epitaxial loayer of carbon dope in the N-type epi-layer surface by Implantation in the described step 2 of the embodiment of the invention;

Fig. 2 '-the 2nd, the described step 2 intermediate ion of embodiment of the invention Implantation after the N-type epi-layer surface, the P type extension of carrying out again carbon dope form rear last growth not the P type extension of carbon dope until the full schematic diagram of trench fill;

Fig. 2 '-the 3rd, the described step 2 intermediate ion of embodiment of the invention Implantation are behind N-type thin layer surface, and the P type extension of the carbon dope not of growing up is until the schematic diagram of trench fill after full;

Fig. 3 is that step shown in Figure 2 is returned the schematic diagram of again the surface dielectric film being removed behind quarter or the CMP;

Fig. 3 ' is that step shown in Fig. 2 '-2 is returned the schematic diagram of again the surface dielectric film being removed behind quarter or the CMP;

Fig. 3 " be that step shown in Fig. 2 '-3 is returned the schematic diagram of again the surface dielectric film being removed behind quarter or the CMP.

Fig. 4 is the carbon of Yanzhong carbon dope/boron concentration profile outside the P that the N/P interface is closed on only;

Fig. 5 is the carbon/boron concentration profile of the comprehensive carbon dope in Yanzhong outside the P type;

Fig. 6 is the super-junction device schematic diagram of realizing according to the described method of the embodiment of the invention;

Fig. 7 is the flow chart of the described method of the embodiment of the invention.

Embodiment

To shown in Figure 7, the method for the invention specifically may further comprise the steps such as Fig. 1:

Step 1, as shown in Figure 1, form N-epitaxial loayer 2 at N+ silicon substrate 1, (this silicon oxide film can be used as the mask of etching groove at described N-epitaxial loayer 2 growth one deck silicon oxide films 3, barrier layer when can be used as cmp), (groove can pass N and be extended to the N+ substrate here to obtain the figure of groove by the trench lithography etching, also can rest on the outer Yanzhong of N, decide by the requirement of designs);

Described silicon oxide film 3 can obtain by thermal oxidation, also can realize by chemical meteorological deposit (carbon VD); Etching groove can be to utilize oxide-film 3 as mask, also can utilize photoresist to carry out etching as mask. the oxide thickness suggestion after the etching is more than 1000 dusts.

Step 2, such as Fig. 2,2 ' and 2 " shown in; The mode of utilize mixing among Fig. 2 is mixed carbon in the process that P type extension forms, and the concentration of the carbon that mixes is generally high one more than the order of magnitude (such as boron concentration at 1E15-E16atoms/cm than the concentration of boron ², the concentration suggestion of carbon is at 1E17atoms/cm ²More than); Fig. 2 '-1 is the mode utilized inject is injected into the groove top layer of N extension with carbon, utilizes afterwards the mode of mixing in the process that P type extension forms carbon to be mixed and sees Fig. 2 '-2; Or the plain P type of growing up is granted an interview with Fig. 2 '-3 outward.P type epitaxial growth technique wherein can realize that with selective epitaxial process technological temperature is at the 800-1100 degree; Carbon ion injects and can adopt the multistep varied angle to inject, and the concentration of carbon dope can be at 1E13-1E16atoms/cm ²Between.

Through after this technique, the distribution of the doping content of carbon can have multiple choices: a kind of is the comprehensive carbon dope in the outer Yanzhong of P type as shown in Figure 5; A kind of is Yanzhong carbon dope outside the P that the N/P interface is closed on only as shown in Figure 4; A kind of be behind N epitaxial surface carbon dope again with the P type outside Yanzhong carbon dope not, part carbon dope or whole carbon dopes; Also have just comprehensive carbon dope of the outer Yanzhong of a kind of N of being, again with the outer Yanzhong of P type carbon dope not, part carbon dope or whole carbon dopes (not shown).

Step 3, such as Fig. 3,3 ' and 3 " shown in; utilize cmp or return to carve the silicon on surface is removed; the deielectric-coating with the surface removes afterwards. when carrying out cmp; in guaranteeing to grind not to the silicon injury under the deielectric-coating, the residual deielectric-coating thickness that suggestion is ground after finishing is greater than 500 dusts.

Step 4, in conjunction with shown in Figure 6, utilize ripe VDMOS (verticaldouble-diffusion metal-oxide-semiconductor vertical double-diffused MOS) processing technology to obtain corresponding super junction nmos device cellular construction, comprise: the grid oxygen 5 and the polysilicon electrode 6 that are positioned at N-epitaxial loayer 2 upper ends form, P trap 7, N+ source 8; Coat the inter-level dielectric film 9 of described polysilicon electrode 6, contact hole 10, P+ contacts implanted layer 11, source metal electrode 12 and polycrystalline electrodes; Drain electrode 14.

The present invention is not limited to execution mode discussed above.More than the description of embodiment is intended in order to describe and illustrate the technical scheme that the present invention relates to.Based on the apparent conversion of the present invention enlightenment or substitute and also should be considered to fall into protection scope of the present invention.Above embodiment is used for disclosing best implementation method of the present invention, so that those of ordinary skill in the art can use numerous embodiments of the present invention and multiple alternative reaches purpose of the present invention.

Claims

1. one kind obtains P type alternately and the method for N type semiconductor, it is characterized in that, may further comprise the steps:

Step 1, at the N-type epitaxial silicon chip deielectric-coating of growing up, utilize photoetching/etching to form groove, and by sacrificing the defective of oxidation removal flute surfaces;

Step 2, utilize epitaxy technique growing P-type epitaxial loayer and mix simultaneously carbon in groove; After the carbon dope layer thickness reaches requirement, continue to insert plain silicon after the growing P-type extension is filled up groove or is filled into certain thickness, obtain seamless trench fill;

Step 3, the polysilicon removal that utilizes back quarter or cmp that silicon chip surface is generated;

Step 4, the deielectric-coating on surface is removed, thereby obtain a kind of P type that replaces and N-type structure.

2. obtain as claimed in claim 1 P type alternately and the method for N type semiconductor, it is characterized in that, the boron that is mixed with in the P type epitaxial loayer in follow-up thermal process in the carbon inhibition P type epitaxial loayer is diffused in the N-type epitaxial loayer.

3. one kind obtains P type alternately and the method for N type semiconductor, it is characterized in that, may further comprise the steps:

Step 2, utilize the mode of Implantation, carbon is doped in the N-type epitaxial loayer, recycling epitaxy technique growing P-type epitaxial loayer and mix simultaneously carbon in groove; After the carbon dope layer thickness reaches requirement, continue to insert plain silicon after the growing P-type extension is filled up groove or is filled into certain thickness, obtain seamless trench fill;

4. the P type that replaces of acquisition as claimed in claim 3 and the method for N type semiconductor is characterized in that, be mixed with the boron that carbon suppresses in the P type epitaxial loayer in P type epitaxial loayer and the neighbour N-type epitaxial loayer top layer and be diffused in the N-type epitaxial loayer in follow-up thermal process.

5. one kind obtains P type alternately and the method for N type semiconductor, it is characterized in that, may further comprise the steps:

Step 2, utilize the mode of Implantation, carbon is doped in the N-type epitaxial loayer, insert plain silicon after recycling epitaxy technique growing P-type epitaxial loayer in groove fills up groove or is filled into certain thickness, obtain seamless trench fill;

6. the P type that replaces of acquisition as claimed in claim 5 and the method for N type semiconductor is characterized in that, be mixed with the boron that carbon suppresses in the P type epitaxial loayer in the N-type epitaxial loayer top layer and be diffused in the N-type epitaxial loayer in follow-up thermal process.

7. the P type that replaces such as claim 1 or 3 or 5 described acquisitions and the method for N type semiconductor is characterized in that the P type epitaxial growth technique in the step 2 realizes that with low-temperature epitaxy technique LTE the concentration of the concentration ratio boron of the outer Yanzhong of P type carbon dope is high more than 10 times.

8. the P type that replaces such as claim 1 or 3 or 5 described acquisitions and the method for N type semiconductor is characterized in that the P type epitaxial growth technique in the step 2 realizes that with selective epitaxial process technological temperature is at the 800-1100 degree.

9. the P type that replaces such as claim 3 or 5 described acquisitions and the method for N type semiconductor is characterized in that the carbon ion in the step 2 injects to adopt the multistep varied angle to inject, and the concentration of carbon dope is at 1E13-1E16atoms/cm ²Between.

10. the P type that replaces such as claim 1 or 5 described acquisitions and the method for N type semiconductor, it is characterized in that, carbon dope in the step 2 is to begin near P type extension and N extension, to part P type extension or all P type extension carbon dopes, or to part N extension type or all N extension carbon dopes.