CN102105389A - MEMS devices - Google Patents

MEMS devices Download PDF

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Publication number
CN102105389A
CN102105389A CN200980129383XA CN200980129383A CN102105389A CN 102105389 A CN102105389 A CN 102105389A CN 200980129383X A CN200980129383X A CN 200980129383XA CN 200980129383 A CN200980129383 A CN 200980129383A CN 102105389 A CN102105389 A CN 102105389A
Authority
CN
China
Prior art keywords
layer
mems device
cover layer
encapsulation cover
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN200980129383XA
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Chinese (zh)
Inventor
格雷亚·J·A·M·费尔海登
菲利普·默尼耶-贝拉德
约翰内斯·J·T·M·唐克斯
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Koninklijke Philips NV
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Koninklijke Philips Electronics NV
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Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of CN102105389A publication Critical patent/CN102105389A/en
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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00015Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
    • B81C1/00261Processes for packaging MEMS devices
    • B81C1/00277Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS
    • B81C1/00293Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS maintaining a controlled atmosphere with processes not provided for in B81C1/00285
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C2203/00Forming microstructural systems
    • B81C2203/01Packaging MEMS
    • B81C2203/0145Hermetically sealing an opening in the lid

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Micromachines (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

A method of manufacturing a MEMS device comprises forming a MEMS device element (14). A sacrificial layer (20) is provided over the device element and a package cover layer (22) is provided over the sacrificial layer. The sacrificial layer is removed using at least one opening (22) in the cover layer and the at least one opening (24) is sealed by an anneal process.

Description

The MEMS device
Technical field
The present invention relates to a kind of MEMS device, relate to the formation of packaging particularly.
Background technology
The MEMS technology is used in the integrated circuit just gradually.Yet,, also do not realize the multiple product notion in the practice as being difficult to provide suitable and result encapsulation with low cost.
There are many factors that work for MEMS device and system in package expensive.Three Fundamentals are:
-for the MEMS system with complex geometric shapes, size is less than correct encapsulation and the effective specific instrument and anchor clamps of matching requirements of several millimeters part and assembly.
-high density MEMS device and system make requirement for the relieved package different and marked change with product.For example, the Vacuum Package that is used to seal is necessary in many cases.
The small size of the part and assembly in-MEMS device and the system has all produced unique problem in encapsulation and assembling.
There is the multiple technology that is used for package of MEMS device:
Non-customized encapsulation of-use and handled technology;
-will be normally the isolating cap of glass or silicon be attached on the top of finished product MEMS device portions;
The encapsulation of-integrated wafer level.
The selection of non-customized parts is expensive and technology consuming time.
The instructions for use of isolating cap adds the cap wafer, typically comprises the prefabricated cavity that is made of glass or silicon.Use the melten glass anode linkage then, because its rear end compatible technology temperature (400 ℃) has precedence over the fusion bonding under the much higher temperature (1000 ℃).If in vacuum chamber, carry out described bonding, can realize vacuum in the cavity.This method requires wafer bonding and flip-chip alignment apparatus.
Integrated wafer level scheme comprises uses the standard surface micro mechanical technology to make cap.This method is area occupied hardly, and remains such as the independent cap of making of fruit use described wafer height lower.Another advantage of integrated approach is: protected described MEMS device in the wafer cutting with during staiing processing.If described encapsulation is enough strong, can as normal IC with low cost, encapsulate described MEMS chip further.In addition, this has allowed and the integrated possibility of CMOS technology.
Summary of the invention
The present invention relates to a kind of integrated approach of the MEMS of being used to form device encapsulation.
According to the present invention, a kind of method of the MEMS of manufacturing device has been proposed, comprising:
Form MEMS device element;
On described device element, form sacrifice layer;
On described sacrifice layer, form the encapsulation cover layer;
In described encapsulation cover layer, limit at least one opening;
Remove described sacrifice layer by described at least one opening, thereby on described device element, form encapsulated space; And
By described at least one opening of hydrogen annealing process seal.
Described method has proposed a kind of mode of using standard manufacture technology to form closed cavity on MEMS device element.Require the step of lesser amt, utilize annealing process (that is heating) to cause described at least one closure of openings particularly.
Described sacrifice layer can comprise oxide skin(coating), for example silica.Can or utilize HF gas phase etching to remove described oxide by standard HF wet-etching technology.
Preferably, described encapsulation cover layer comprises silicon, for example polysilicon or polysilicon-germanium (SiGe).Because the migration of described silicon atom, hydrogen annealing technology has been sealed described at least one opening, but can not stay impurity in described cavity.
Described encapsulation cover layer can have the thickness between 500nm to the 10 μ m.The number that can depend on switch is selected the diameter of described at least one opening, and described diameter can be and the identical magnitude of encapsulation overburden cover.
Another layer (can be silicon nitride) can be arranged on below the described encapsulation cover layer, also form described at least one opening by described another layer.Preferably, this one deck can not be subjected to the influence of annealing process, makes the top surface of described cavity keep level and smooth, and can physically not change the surface of described cavity by annealing process.
Described method can also comprise provides the part of Annealing Protection layer as the technology that forms described MEMS device element.This method is utilized protective layer to protect described MEMS device (for example, resonator piece, perhaps flexible contact bundle, perhaps removable electrode for capacitors) can not be annealed technology and is damaged.Described protective layer can comprise silicon nitride.
The invention allows for a kind of MEMS device of encapsulation, comprising:
MEMS device element;
The encapsulation cover layer is arranged on the cavity above the described MEMS device element; And
The sacrifice etching opening that seals in the described encapsulation cover layer,
Wherein said device also comprises the silicon nitride layer that is positioned at below the described encapsulation cover layer, and described silicon nitride layer has at least one opening that aligns with the sacrifice etching opening of described sealing.
Description of drawings
Referring now to accompanying drawing example of the present invention is described, wherein;
Fig. 1 shows the example according to manufacturing process of the present invention;
Fig. 2 is used to explain first experiment that is used to prove durability of the present invention;
Fig. 3 is used to explain second experiment of the durability of second example that is used to prove the inventive method; And
Fig. 4 is used to receive the 3rd experiment of the durability of the 3rd example that is used to prove the inventive method.
The specific embodiment
The present invention proposes a kind of method of the MEMS of manufacturing device, wherein on described MEMS device element, form closed cavity.Use sacrifice layer, remove described sacrifice layer by the hole in the cover layer.Seal described hole by annealing process then.
Fig. 1 schematically shows method of the present invention.
Fig. 1 a shows complete surface micro device, and the form with resonator is an example in this example.Described device comprises silicon substrate 10; Silicon oxide layer 12, described silicon oxide layer form the cavity below the described resonator piece; And the described resonator piece 14 that in silicon layer 16, forms.
The present invention does not need to change the manufacturing of described MEMS device, and can use any conventional technology.For example, described MEMS device can be resonator, capacitor or switch.Typically, described device has the moveable part that needs by the careful protection of encapsulation, and in this example, described device has the resonator piece 14 that suspends.
Shown in Fig. 1 b, deposition of sacrificial layer 20 and to its composition, on described MEMS device, to form island.
The encapsulation caps layer 22 of deposit spathic silicon is used to form encapsulating shell, and shown in Fig. 1 c to release aperture 24 compositions.
Provide the removal of described sacrifice layer 20 by described release aperture 24, so that mechanical micro-structural as described in shown in Fig. 1 d, discharging.Pass through H then 2The described etching release aperture of annealing sealing is to obtain the structure shown in Fig. 1 e.
Hydrogen annealing technology purpose is to produce clean silicon (perhaps polysilicon or silicon-germanium) surface.Hydrogen can not shown with silicon, and verified effectively to residual SiO arbitrarily 2Remove absorption.The silicon atom that exists on clean silicon face can move, and mobility increases under high temperature and low pressure.The representative condition of hydrogen annealing is:
(depending on the fusing point of material) temperature between 800 to 1150 degrees centigrade; And
Low-pressure, typically scope is from the millitorr to the atmospheric pressure.
Can in He or Ar gas, dilute hydrogen, and preferably described hydrogen has good purity.
Before annealing process, can clean the surface of described cap rock with HF solution, ideally, the time between cleaning and the annealing process should be short as far as possible.
Advantage of the present invention can not stay impurity when being the described release aperture of sealing 24 in cavity.The position that this allows to design in such a manner release aperture 24 makes that described release is optimum (faster), in addition, can be on described resonator with described release aperture design, this has realized littler encapsulation.In addition, also find to utilize to have only 22 pairs of release aperture of the thick cap rock of 1 μ m to seal by experiment with 1 μ m size diameter.This means for sacrificial etchant to have short and wide relatively passage, also caused short release time.
Except H 2The use of the silicon-containing layer means outside the annealing will be sealed described release aperture owing to the migration of silicon atom, but can not stay impurity in cavity.
Verified by experiment operation of the present invention.
In first experiment, sealed the release aperture in the 1 μ m polysilicon cap rock.
Fig. 2 is the schematic diagram of described experiment.
On silicon substrate 30, (Fig. 2 a) for deposited silicon nitride layer 32 and silicon oxide layer 34.To oxide (sacrifice) layer 34 composition (Fig. 2 b), and the thick silicon cap rock 36 (Fig. 2 c) of substrate 1 μ m.
The composition (Fig. 2 d) of release aperture 38 in the described cap layer is provided, utilizes HF-solution or HF-gas phase etching to remove described sacrificial oxide layer (Fig. 2 e) then.Utilize hydrogen annealing under the pressure of 1100 ℃ and 20 holders with described release aperture sealing 2 minutes, so that the structure shown in Fig. 2 f to be provided.
Use section S EM image that result's analysis is shown the cavity that has fully sealed the original release aperture with 500nm and 1000nm diameter.If use the release aperture of 1500nm diameter, although find that it is incomplete that the size of described release aperture has reduced sealing.Use wet-etching technology, the release aperture of 1000nm diameter is suitable for use as the release aperture of MEMS device more.
Second experiment has proposed seal temperature is reduced to 1050 ℃, so that the temperature dependency of described sealing to be shown.In this case, still sealed the release aperture of 500nm, but but the release aperture size of 1000nm reduce not have sealed on.
Because annealed seals technology, described cap layer may roughening.This can be increased in the needed height of mobile MEMS device in the cavity.
Fig. 3 is used for explaining the method wherein nitride layer (for example 50nm is thick) is deposited on below the described polysilicon cap rock 36.
Fig. 3 a is corresponding with Fig. 2 a and 2b with 3b.
In Fig. 3 c, the thick nitride layer 40 of deposition 50nm, then the example as Fig. 2 is that the thick silicon of 1 μ m is as cap layer 36.
Composition forms described release aperture in described cap rock 36 and described silicon nitride protective layer 40.Utilize the described sacrificial oxide layer of HF-solution removal (Fig. 3 e) once more.
Seal described release aperture with hydrogen annealing then, for example following 2 minutes of the pressure of 1100 ℃ and 20 holders at this moment.
Once more described release aperture is sealed in the described cap layer, but is not sealed in the silicon nitride layer.Therefore silicon nitride layer is unaffected, and it is much more level and smooth than the cavity that does not use silicon nitride layer to have shown the maximum of cavity by experiment.
Because most of resonators are made by silicon, described hydrogen annealing also can change the shape of described resonator, and therefore can influence the performance of described resonator.
A kind of mode that is used to address this is that is partly to provide protective layer for resonator.
Explained the other experiment that proves this conception of species with reference to figure 4.
Fig. 4 the has shown etching wherein silicon layer 42 of the wide isolated groove 44 of 200nm has carried out emulation to the little gap of resonator.Once more with the hydrogen annealings of 1100 ℃ and 20 holders with described processing of wafers 2 minutes.
The SEM image table of described groove is shown SEM image 44, and resulting profile is expressed as image 46 after will annealing.
On another wafer, before carrying out identical hydrogen annealing, at first use the thick nitride of 5nm (protection) layer 48 to cover described groove.This can realize by LPCVD (low-pressure chemical vapor deposition) technology.Resulting profile is expressed as image 50 after the annealing.
It is different with the original that image 46 shows the groove shape that does not have the protecting nitride layer.Groove with the thin nitride layer protection before the annealing keeps its original-shape.
Above-mentioned experiment is expressed and can at most release aperture be sealed 1 μ m.If use higher temperature, longer annealing time or thicker cap layer, then can seal bigger release aperture.Because higher technological temperature has limited the integrated of MEMS device and CMOS technology.Must before CMOS technology, encapsulate described MEMS device.
Equally, higher temperature has limited the selection that can be used for the device material of MEMS device.Yet most of resonators can be made by the silicon that can bear the high temperature that is used for hydrogen annealing, particularly for example protect described silicon by above-mentioned thin nitride layer.
By using SiGe or Ge to replace polysilicon can reduce annealing temperature as cap rock.Like this, but reflux temperature can be reduced to SiGe or the Ge monocrystalline silicon resonator that refluxes still keeps inactive level.
A kind of main application of the present invention is the MEMS resonator.These resonators can be used to replace being used for the crystal oscillator of timing reference purpose.
Those of ordinary skills understand various other application of picture gyroscope and accelerometer and so on.

Claims (13)

1. method of making the MEMS device comprises:
Form MEMS device element (14);
Go up formation sacrifice layer (20 at described device element (14); 34);
On described sacrifice layer, form encapsulation cover layer (22; 36);
At described encapsulation cover layer (22; 36) limit at least one opening (24 in; 38);
By described at least one opening (24; 38) remove described sacrifice layer (20; 34), thus on described device element, form encapsulated space; And
By described at least one opening (24 of hydrogen annealing process seal; 38).
2. method according to claim 1, wherein said sacrifice layer (20; 34) comprise oxide skin(coating).
3. method according to claim 2, wherein said sacrifice layer (20; 34) comprise silica.
4. according to the described method of arbitrary aforementioned claim, wherein said encapsulation cover layer (22; 36) comprise silicon.
5. method according to claim 4, wherein said encapsulation cover layer comprises polysilicon-germanium.
6. method according to claim 4, wherein said encapsulation cover layer (22; 36) comprise polysilicon.
7. according to the described method of arbitrary aforementioned claim, wherein remove described sacrifice layer (20; 34) comprise HF wet-etching technology or HF-gas phase etching technics.
8. according to the described method of arbitrary aforementioned claim, also comprise silicon nitride layer (40) is arranged on below the described encapsulation cover layer (36), also formed at least one opening by described silicon nitride layer.
9. according to the described method of arbitrary aforementioned claim, also comprise providing the Annealing Protection layer as a part that forms described MEMS device element technology.
10. method according to claim 9, wherein said protective layer comprises silicon nitride.
11. according to the described method of arbitrary aforementioned claim, wherein said MEMS device element comprises switch, capacitor or resonator.
12. the MEMS device of an encapsulation comprises:
MEMS device element (14);
Encapsulation cover layer (22; 36), be arranged on the cavity above the described MEMS device element; And
Described encapsulation cover layer (22; 36) sacrifice-etching opening (24 of sealing in; 38),
Wherein said device also comprises the silicon nitride layer (40) that is positioned at below the described encapsulation cover layer (36), and described silicon nitride layer has at least one opening that aligns with the sacrifice-etching opening of described sealing.
13. device according to claim 13, wherein said encapsulation cover layer (22; 36) comprise polysilicon, polysilicon-germanium or germanium.
CN200980129383XA 2008-05-28 2009-05-19 MEMS devices Pending CN102105389A (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
EP08104144 2008-05-28
EP08104144.4 2008-05-28
PCT/IB2009/052086 WO2009144619A2 (en) 2008-05-28 2009-05-19 Mems devices

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WO (1) WO2009144619A2 (en)

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CN103350983A (en) * 2013-07-01 2013-10-16 广东合微集成电路技术有限公司 Integrated wafer-level vacuum packaged MEMS device and manufacturing method thereof
CN112292345A (en) * 2018-06-13 2021-01-29 国立大学法人东北大学 MEMS device manufacturing method and MEMS device

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CN103350983A (en) * 2013-07-01 2013-10-16 广东合微集成电路技术有限公司 Integrated wafer-level vacuum packaged MEMS device and manufacturing method thereof
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Publication number Publication date
WO2009144619A2 (en) 2009-12-03
US20110198746A1 (en) 2011-08-18
EP2297025B1 (en) 2016-04-06
WO2009144619A3 (en) 2010-09-16
EP2297025A2 (en) 2011-03-23
US8481365B2 (en) 2013-07-09

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Application publication date: 20110622