WO2009130681A2

WO2009130681A2 - Semiconductor device and method of manufacturing a semiconductor device

Info

Publication number: WO2009130681A2
Application number: PCT/IB2009/051672
Authority: WO
Inventors: Gerhard Koops; Philippe Meunier-Beillard
Original assignee: Nxp B.V.
Priority date: 2008-04-23
Filing date: 2009-04-23
Publication date: 2009-10-29
Also published as: WO2009130681A3

Abstract

A semiconductor device with a micro electro-mechanical system device is provided. The micro electro -mechanical system device comprises at least one cavity (19) over which a first layer (15, 17) is provided. The first layer (15) comprises a silicon layer (15) and at least one second layer (17) on top of the silicon layer (15) and at least one hole (16). The at least one second layer (17) constitutes a layer which prevents that silicon is epitaxially grown on it. The at least one hole (16) is closed by selective epitaxial silicon deposition on those parts of the silicon layer (15) which are not covered by the at least one outer layer (17).

Description

Semiconductor device and method of manufacturing a semiconductor device

FIELD OF THE INVENTION

The present invention relates to a semiconductor device and a method for manufacturing a semiconductor device.

BACKGROUND OF THE INVENTION

Micro electro-mechanical system devices (MEMS) are known in the art and are used in a plurality of applications like resonators and pressure sensors. Typically the cost of the packaging of the MEMS devices is a major part of the cost of devices.

A so-called 0-level packaging process is typically used in order to reduce the cost and the size of the package of a MEMS device. This can be achieved as the structure of the MEMS is packaged on the wafer with conventional silicon process technologies. The packaging of the MEMS device should be low cost, should hermetically seal the MEMS device, should enable a long term reliability, should be resistant to a dicing process, should be resistant to an injection molding process and the package should not influence the behavior of the MEMS device.

MEMS are typically complete units containing electrical as well as mechanical micro structures. These MEMS are typically fabricated by techniques used to fabricate integrated circuits as photolithographic techniques. Typically the majority of the MEMS are fabricated on a common silicon wafer. After the fabrication of the MEMS a protective cap needs to be provided on top of the MEMS elements. The protective cap is provided in order to protect the MEMS cavity from moisture entering the cavity.

EP 1 452 844 Al discloses an epitaxial sealed pressure sensor. Furthermore, a method for making such a pressure sensor is described. Here, a wafer with a base silicon layer, a buried sacrificial layer and a top silicon layer is disclosed. The top silicon layer is arranged over the buried sacrificial layer and the buried sacrificial layer is arranged over the base silicon layer. Holes are etched through the top silicon layer to the buried sacrificial layer and a portion of the buried sacrificial layer is removed. Thereafter, silicon is deposited to seal the holes.

SUMMARY OF THE INVENTION

It is therefore an object of the invention to provide a semiconductor device with a MEMS unit, which is packaged without influencing the parameters of the MEMS unit. This object is solved by a semiconductor device according to claim 1 and by a method according to claim 5. Therefore, a semiconductor device with a micro electro-mechanical system device is provided. The micro electro-mechanical system device comprises at least one cavity over which a first layer is provided. The first layer comprises a silicon layer and at least one second layer on top of the silicon layer and at least one hole. The at least one second layer constitutes a layer which prevents that silicon is epitaxially grown on it. The at least one hole is closed by selective epitaxial silicon deposition on those parts of the silicon layer which are not covered by the at least one outer layer.

According to an aspect of the invention, the first layer comprises two nitride layers as second layers sandwiching a silicon layer or two aluminia layers as second layers sandwiching a silicon layer. According to an aspect of the invention an epitaxial capping layer for sealing at least the micro electro-mechanical system device is provided.

According to an aspect of the invention the capping layer is a conformal layer. The invention also relates to a method of manufacturing a semiconductor device having a micro electro-mechanical system device. A wafer is provided. Stiiictures of a micro electro-mechanical system device are patterned. A sacrificial layer is deposited. The sacrificial layer is etched. A first layer with a silicon layer and a second layer is deposited on top of the silicon layer. The second layer constitutes a layer which prevents that silicon is epitaxially grown on it. At least one hole is etched in the first layer. The sacrificial layer is etched to remove the sacrificial layer to form a cavity. Silicon is epitaxial grown of on sidewalls of the holes to close the holes. An epitaxial capping layer is deposited to seal at least the micro electro-mechanical system device.

The invention relates to the idea to provide a MEMS unit wherein a (poly)- silicon layer is sandwiched between two other layers is deposited on top of MEMS stiiictures. This sandwiched structure is used as a capping layer and holes are etched in to the layers. To close the holes in the capping layer, silicon will only be deposited on the side-walls of the holes of the cap in order to close the holes. Accordingly, the sandwich is used to protect the rest of the device from the deposition of the selective epitaxially silicon. A semiconductor device with a MEMS unit which can be implemented as a resonator or a pressure sensor or any other MEMS device like accelerometers, gyroscopes or switches and a cap is provided. The cap comprises a silicon layer which can for example be poly silicon. The silicon layer is sandwiched between two other layers. Optionally, the cap may comprise e.g. aluminia A12O3. The cap should be thick enough to withstand a pressure of at least 1 bar.

Further aspects of the invention are defined in the depending claims.

BRIEF DESCRIPTION OF THE DRAWINGS

Advantages and embodiments of the present application will be described in more detail with reference to the Figures. Figs. IA and IB show a basic representation of the manufacturing of a semiconductor device according to a first embodiment.

Figs. IA and IB show a basic representation of the manufacturing of a semiconductor device according to a first embodiment. The semiconductor device may comprise at least one micro electro-mechanical system MEMS. In step SlO, the manufacturing process is started with a substrate layer 10, a sacrificial layer 1 1 and a structural layer 12. These can for example be implemented as a silicon insulator SOI wafer 10 with a sacrificial layer 1 1 and a structural layer 12. In step S20, the structural layer 12 (silicon) can be patterned or etched in order to provide the structures for e.g. a MEMS device like a resonator, a pressure sensor or the like. In step S30, the part of the sacrificial layer 1 1 beneath the MEMS is etched for example by HF vapor etching or by wet HF etching if a drying step is included. In step S40 a thin (nitride) deposition layer 13 is provided on the exposed silicon layer 12. Alternatively to the nitride layer, a layer of aluminia AI2O3 can be provided. However, it should be noted that any layer that is selective to the sacrificial etch can be used. Even stacks of layers can be used (e.g. oxide/silicon). The layers may include A12O3, HfO2 and TiO2. In addition or alternatively, any sandwiched layer with poly-silicon as a middle layer will be sufficient if the layer is selective towards HF etching.

In step S50 a sacrificial layer 14 is deposited. The sacrificial layer 14 can e.g. be implemented as an oxide. In step S60, the sacrificial layer 14 is etched. In step S70, a (capping) layer 15 is deposited on top of the silicon layer 12 and the etched sacrificial layer 14. The capping layer 15 can be implemented as a sandwich layer with (poly) silicon as middle layer 15 and furthermore two outer layers 17. The outer layers 17 should have the property that silicon is only selectively grown on those parts of the middle (silicon) layer, which is are not covered by the outer layers, i.e. silicon can not be (epitaxially) grown on the outer layers 17. The outer layers 17 may contain e.g. nitride or poly-nitride or aluminia Al₂O₃.

In step S80 holes 16 are etched into the capping layer on top of the MEMS device.

In step S90 the sacrificial layer 14 is removed for example by a HF vapor etch such that a cavity 19 is provided. In step SlOO the hole 16 is closed by means of a selective epitaxial deposition of silicon. As the middle silicon layer 15 is enclosed by the outer layers 17, only the sidewalls of the holes 16 will be exposed and therefore only there a selective epitaxial deposition of silicon can be performed. By means of the selective epitaxial deposition of silicon the holes can be closed while no silicon grow is present of the outer layers 17. In step SI lO a thick epitaxial capping layer 18 is grown on top of the sandwich layer 15, 17. The thickness is approximately 0,5 μm to 20μm. By means of this thick capping layer the complete device is sealed. In addition, on top of the capping layer CMOS devices can be fabricated. The conditions for growing selectively epi are a pressure between lE-3Pa and IBar. Gasses used are TSC (tri-chlorine-silane SiCBH and/or DSC (di-chlorine-silane SiC12H2) with HCl). The process temperatures range between 850⁰C and 1050⁰C. However, it should be noted that any growing condition may sufficient as long as the epi is grown epitaxially. It should further be noted that also polycrystalline silicon can be grown. Although it is not possible to produce structures on top of the polycrystalline silicon, the MEMS device will however be sealed. The layer 15 comprises preferably a (poly) silicon layer which is sandwiched between two other layers 17. By means of the two outer layers of the capping layer silicon can be selectively grown on top of the layer.

When in step S90 the sacrificial layer 14 is removed the hole 16 can be closed by means of a selective epitaxial deposition. It should be noted that this epitaxial deposition will not influence the stiiicture of the MEMS device. After closing the hole, a thick layer of non-selective epitaxial material can be grown. This epitaxial layer is preferably polycrystalline when grown on top of the MEMS. However, it should be noted that those area of the device, which have a bare silicon surface will be covered by a fully epitaxial layer in connection with the underlying Si substrate. By means of the above-described fabrication process, a MEMS device can be fabricated and the packaging of the device is performed preferably before any further CMOS processing is undertaken. This is advantageous, as the fabrication and packaging of the MEMS device will not be limited to any temperature and processing requirements for a CMOS processing. By means of the selective epitaxial deposition to close the hole 16 in step SlOO the packaging of the MEMS device will not influence the intrinsic properties of the MEMS device.

It should be noted that the above-mentioned embodiments illustrate rather than limit the invention, and that those skilled in the art will be able to design many alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be constiiied as limiting the claim. The word "comprising" does not exclude the presence of elements or steps other than those listed in a claim. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. In the device claim enumerating several means, several of these means can be embodied by one and the same item of hardware. The mere fact that certain measures are recited in mutually different dependent claims does not indicate that a combination of these measures cannot be used to advantage.

Furthermore, any reference signs in the claims shall not be constrained as limiting the scope of the claims.

Claims

Semiconductor device and method of manufacturing a semiconductor device CLAIMS:

1. Semiconductor device, comprising a micro electro-mechanical system device, wherein the micro electro-mechanical system device comprises at least one cavity ( 19) over which a first layer ( 15, 17) is provided, wherein the first layer ( 15) comprises a silicon layer ( 15 ) and at least one second layer ( 17) on top of the silicon layer ( 15 ) and at least one hole ( 16), wherein the at least one second layer ( 17) constitutes a layer which prevents that silicon is epitaxially grown on it, wherein the at least one hole ( 16) is closed by selective epitaxial silicon deposition on those parts of the silicon layer ( 15 ) which are not covered by the at least one outer layer ( 17).

2. Semiconductor device according to claim 1, wherein the first layer ( 15) comprises two nitride layers ( 17) as second layers sandwiching a silicon layer ( 15 ) or two aluminia layers ( 17) as second layers sandwiching a silicon layer ( 15 ).

3. Semiconductor device according to claim 1 or 2, further comprising an epitaxial capping layer ( 18) for sealing at least the micro electro-mechanical system device.

4. Semiconductor device according to any one of the claims 1 to 3, wherein the capping layer is a conformal layer.

5. Method of manufacturing a semiconductor device having a micro electromechanical system device, comprising the steps of: providing a wafer, - patterning structures of a micro electro-mechanical system device, depositing a sacrificial layer ( 14), etching the sacrificial layer ( 14), depositing a first layer ( 15 ) with a silicon layer ( 15) and a second layer ( 17 ) on top of the silicon layer ( 17), wherein the second layer ( 17) constitutes a layer which prevents that silicon is epitaxially grown on it, etching at least one hole ( 16) in the first layer ( 15), etching the sacrificial layer ( 14) to remove the sacrificial layer ( 14) and forming a cavity ( 19), epitaxial growing of silicon on sidewalls of the holes ( 16) to close the holes ( 16), and depositing an epitaxial capping layer to seal at least the micro electromechanical system device.