CN102104012A - Manufacturing method of light-emitting diode - Google Patents
Manufacturing method of light-emitting diode Download PDFInfo
- Publication number
- CN102104012A CN102104012A CN2009103118752A CN200910311875A CN102104012A CN 102104012 A CN102104012 A CN 102104012A CN 2009103118752 A CN2009103118752 A CN 2009103118752A CN 200910311875 A CN200910311875 A CN 200910311875A CN 102104012 A CN102104012 A CN 102104012A
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- light
- emitting diode
- backlight unit
- diode chip
- led
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
The invention relates to a manufacturing method of a light-emitting diode, comprising the following steps of: supplying a light-emitting diode wafer, wherein the light-emitting diode wafer comprises a base plate and an epitaxial layer grown from the base plate; cutting the epitaxial layer of the light-emitting diode wafer into a plurality of mutually separated light-emitting diode chips, wherein a gap is formed between adjacent light-emitting diode chips; arranging an insulating layer in the gap positioned between the adjacent light-emitting diode chips; supplying a bottom plate, wherein a conductive adhesive is coated on the bottom plate; inversing the base plate and the light-emitting diode chips so that each light-emitting diode chip is connected with the conductive adhesive of the bottom plate, wherein the insulating layer obstructs the conductive adhesive positioned between the adjacent light-emitting diode chips; and cladding the light-emitting diode wafer by utilizing a light-transmitting material so as to obtain the light-emitting diode.
Description
Technical field
The present invention relates to a kind of manufacturing method for LED.
Background technology
LED source has advantages such as long working life, energy-saving and environmental protection, and is generally had an optimistic view of by market as a kind of emerging third generation light source because of it.And the illuminating module of being made up of light-emitting diode at present can produce light source high-power, high brightness.Therefore will be widely, revolutionaryly replace traditional conventional lighting sources such as incandescent lamp, become the main light source that meets the energy-conserving and environment-protective theme.Yet, when making light-emitting diode, be earlier LED wafer to be cut into some LED wafer monomers mostly, should be positioned over one by one on the base plate by some LED wafer monomers then, adopt the mode of single encapsulation that the LED wafer monomer is packaged into light-emitting diode again, but this method for packing production efficiency is low, is difficult to realize large-scale automated production, be unfavorable for reducing cost, hindered popularizing of light-emitting diode to a great extent.
Development along with technology, begin gradually at present to occur to adopt and disposable all LED wafer are connected in array package mode on the base plate, the LED wafer that is about to a plurality of array arrangements is pressed on the base plate that is coated with conducting resinl simultaneously, thereby all LED wafer are finished and being electrically connected of base plate simultaneously.Yet, because LED wafer is for adopting comparatively intensive array arrangement mode, when being pressed into described LED wafer to conducting resinl, conducting particles in the described conducting resinl can run to the gap between the adjacent LED wafer because of being squeezed, make and meeting conducting between this adjacent LED wafer have short risk because conducting particles is in contact with one another.Along with the trend development of LED package towards volume-diminished, it is more and more nearer that adjacent LED wafer in the array package is leaned on, gap between the adjacent LED wafer is also more and more littler, makes that occurring short risk between the LED wafer improves.
Summary of the invention
In view of this, be necessary to provide a kind of manufacturing method for LED that in the array package mode, can prevent mutual conduction between the LED wafer.
A kind of manufacturing method for LED may further comprise the steps: a LED wafer is provided, and this LED wafer comprises a substrate and an epitaxial loayer of growing from this substrate; The epitaxial loayer of described LED wafer is cut into some light-emitting diode chip for backlight unit that are separated from each other, form a gap between the adjacent light-emitting diode chip for backlight unit; One insulating barrier is set in the gap between adjacent light-emitting diode chip for backlight unit; One base plate is provided, is coated with conducting resinl on this base plate, described substrate and light-emitting diode chip for backlight unit are inverted, each light-emitting diode chip for backlight unit is connected with the conducting resinl of described base plate, described insulating barrier cuts off the conducting resinl between the adjacent light-emitting diode chip for backlight unit; Thereby and utilize light transmissive material to coat described LED wafer to obtain light-emitting diode.
Compare with traditional manufacture method, in the above-mentioned manufacturing method for LED, in the gap of adjacent light-emitting diode chip for backlight unit, be provided with insulating barrier, this insulating barrier cuts off the conducting resinl between the adjacent light-emitting diode chip for backlight unit, thereby has avoided adjacent light-emitting diode chip for backlight unit to cause risk of short-circuits by the conducting resinl conducting when being connected with base plate.
Description of drawings
Fig. 1 is the flow chart of manufacturing method for LED better embodiment of the present invention.
The LED wafer of Fig. 2 for being provided in the step 1 shown in Figure 1.
Fig. 3 is for cutting into the epitaxial loayer of LED wafer shown in Figure 2 in the schematic diagram of some light-emitting diode chip for backlight unit.
Fill the schematic diagram of an insulating barrier in the gap of Fig. 4 for array that light-emitting diode chip for backlight unit shown in Figure 3 is lined up.
Fig. 5 is for being provided with the schematic diagram of tin ball on light-emitting diode chip for backlight unit shown in Figure 4.
Fig. 6 is for being inverted described light-emitting diode chip for backlight unit array shown in Figure 5 and be bonded to the schematic diagram on the base plate.
Fig. 7 is for being fixed in described light-emitting diode chip for backlight unit array shown in Figure 6 in schematic diagram behind the base plate.
Fig. 8 a utilizes light transmissive material light-emitting diode chip for backlight unit shown in Figure 7 to be carried out the schematic diagram of single encapsulation.
Fig. 8 b utilizes light transmissive material light-emitting diode chip for backlight unit shown in Figure 7 to be carried out the schematic diagram of one encapsulation.
The schematic diagram of Fig. 8 c for utilizing light transmissive material to encapsulate again after the substrate on the light-emitting diode chip for backlight unit shown in Figure 7 is removed.
The main element symbol description
Embodiment
See also Fig. 1, manufacturing method for LED of the present invention may further comprise the steps:
At first, as shown in Figure 2, provide a LED wafer 10.This LED wafer 10 comprises an epitaxial loayer 12 of a substrate 11 and growth on this substrate 11.The material of this substrate 11 can be sapphire, silicon or carborundum etc., and in the present embodiment, this substrate 11 is a sapphire, and this epitaxial loayer 12 is upwards grown from the upper surface 111 of this sapphire substrate 11 and formed.This epitaxial loayer 12 is for constituting the semiconductor of p-n junction, and the material of epitaxial loayer 12 can be GaAs, gallium arsenide phosphide, aluminum gallium arsenide etc.
Secondly, as shown in Figure 3, the epitaxial loayer 12 of this LED wafer 10 is cut into some light-emitting diode chip for backlight unit 13.Each light-emitting diode chip for backlight unit 13 comprises an end face 132 and a bottom surface 134, and the bottom surface 134 of this light-emitting diode chip for backlight unit 13 closely is connected on the upper surface 111 of sapphire substrate 11.These some light-emitting diode chip for backlight unit 13 spaces are arranged into an array.Form a gap 14 between the two adjacent light-emitting diode chip for backlight unit 13.
Secondly, as shown in Figure 4, filling one insulating barrier 15 gap 14 between this light-emitting diode chip for backlight unit 13 in, this insulating barrier 15 can be solidified under the effect of illumination by the photoresist of printing opacity and form.This insulating barrier 15 is spaced apart with two adjacent light-emitting diode chip for backlight unit 13.This insulating barrier 15 is perpendicular to the upper surface 111 of described sapphire substrate 11, and the height of this insulating barrier 15 is a little more than the end face 132 of described light-emitting diode chip for backlight unit 13.
Each light-emitting diode chip for backlight unit 13 once more, as shown in Figure 5, on positive and negative two electrodes of the end face 132 of each light-emitting diode chip for backlight unit 13, a tin ball 16 is set respectively, so that can be electrically connected with the external world by tin ball 16.
Once more, as Figure 6 and Figure 7, provide a base plate 21 that is provided with circuit, and the front 212 of this base plate 21 is coated with one deck conducting resinl 22, this conducting resinl 22 can be anisotropic conductive.This conducting resinl 22 comprises the resin sticker and is distributed in the interior conducting particles 224 of resin sticker discretely.This conducting resinl 22 plays the effect of conduction by the conducting particles in it 224.
Described sapphire substrate 11 and light-emitting diode chip for backlight unit 13 are inverted, the end face 132 that makes light-emitting diode chip for backlight unit 13 down, and the top of light-emitting diode chip for backlight unit 13 and insulating barrier 15 is pressed into to this conducting resinl 22, and push this conducting resinl 22, make conducting resinl 22 be subjected to force direction (being vertical direction) to produce conductivity, thereby make the tin ball 16 on the light-emitting diode chip for backlight unit 13 be connected with circuit on the base plate 21 by conducting resinl 22.
When being pressed into, when the conducting resinl 22 on the base plate 21 is subjected to the extruding of light-emitting diode chip for backlight unit 13, also can produce stress on horizontal (being horizontal direction) of this conducting resinl 22, and produce the trend overflow from the periphery of light-emitting diode chip for backlight unit 13, but owing to be provided with insulating barrier 15 in the gap 14 between the two adjacent light-emitting diode chip for backlight unit 13, and the height of insulating barrier 15 exceeds the end face 132 of light-emitting diode chip for backlight unit 13, this insulating barrier 15 can penetrate in the conducting resinl 22 and with the conducting resinl between the adjacent light-emitting diode chip for backlight unit 13 22 and cut off, thereby can stop the conducting resinl 22 that overflows to flow to adjacent light-emitting diode chip for backlight unit 13 place sides, thereby avoided conducting particles 224 to be filled in the gap 14 of light-emitting diode chip for backlight unit 13 arrays, avoided two adjacent light-emitting diode chip for backlight unit 13 of conducting and cause risk of short-circuits.
Once more, heat this conducting resinl 22, make it to solidify down, thereby light-emitting diode chip for backlight unit 13 and base plate 21 are connected in one in high temperature.Then, shown in Fig. 8 a, utilize light transmissive material 30 that each light-emitting diode chip for backlight unit 13 is coated respectively, light-emitting diode chip for backlight unit 13 is isolated from the outside.This light transmissive material 30 can adopt epoxy resin, acryl, the contour printing opacity of silica gel, high mechanical properties, strong moisture-proof material.Cut base plate 21 at last, make that each light-emitting diode chip for backlight unit 13 on the base plate 21 is separated from each other, each light-emitting diode chip for backlight unit 13 forms a light-emitting diode.In addition, the insulating barrier 15 between adjacent light-emitting diode chip for backlight unit 13 also possesses the effect of encapsulation, so can guarantee the cutting finish after each LED package intact.
See also Fig. 8 b, also available light transmissive material 40 makes all light-emitting diode chip for backlight unit 13 integrated being packaged together with all light-emitting diode chip for backlight unit 13 one encapsulation during encapsulation.
In Fig. 8 a and Fig. 8 b, this light transmissive material 30,40 coats substrate 11 with LED Chips for Communication 13.In addition, shown in Fig. 8 c, also can be earlier before the encapsulation sapphire substrate 11 of the bottom surface 134 of light-emitting diode chip for backlight unit 13 be removed, and then respectively each light-emitting diode chip for backlight unit 13 is encapsulated maybe with all light-emitting diode chip for backlight unit 13 integrated one that are packaged in.
In the above-mentioned method for manufacturing light-emitting, between adjacent light-emitting diode chip for backlight unit 13, be provided with insulating barrier 15, the conducting resinl 22 that this insulating barrier 15 cuts off between the adjacent light-emitting diode chip for backlight unit 13, intercepted conducting particles 224 and be filled in the gap 14 between the adjacent light-emitting diode chip for backlight unit 13, thereby avoided the adjacent light-emitting diode chip for backlight unit 13 when being connected, to cause risk of short-circuits by conducting resinl 22 conductings with base plate 21.
Claims (10)
1. manufacturing method for LED may further comprise the steps:
One LED wafer is provided, and this LED wafer comprises a substrate and an epitaxial loayer of growing from this substrate;
The epitaxial loayer of described LED wafer is cut into some light-emitting diode chip for backlight unit that are separated from each other, form a gap between the adjacent light-emitting diode chip for backlight unit;
One insulating barrier is set in the gap between adjacent light-emitting diode chip for backlight unit;
One base plate is provided, is coated with conducting resinl on this base plate, described substrate and light-emitting diode chip for backlight unit are inverted, each light-emitting diode chip for backlight unit is connected with the conducting resinl of described base plate, described insulating barrier cuts off the conducting resinl between the adjacent light-emitting diode chip for backlight unit; And
Thereby utilize light transmissive material to coat described LED wafer and obtain light-emitting diode.
2. manufacturing method for LED as claimed in claim 1 is characterized in that: this insulating barrier is solidified under the effect of illumination by photoresist and forms.
3. manufacturing method for LED as claimed in claim 1 is characterized in that: the height of this insulating barrier is higher than the end face of described light-emitting diode chip for backlight unit, and this insulating barrier penetrates in the conducting resinl.
4. manufacturing method for LED as claimed in claim 1 is characterized in that: described base plate is provided with circuit, and the end face of described light-emitting diode chip for backlight unit is provided with the tin ball, and this light-emitting diode chip for backlight unit is electrically connected with the conducting resinl of this base plate by the tin ball.
5. manufacturing method for LED as claimed in claim 1 is characterized in that: described conducting resinl is an anisotropic conductive.
6. manufacturing method for LED as claimed in claim 1 is characterized in that: curing was connected in one described light-emitting diode chip for backlight unit and base plate after described conducting resinl was heated.
7. manufacturing method for LED as claimed in claim 1 is characterized in that: described light transmissive material one coats all light-emitting diode chip for backlight unit, and all light-emitting diode chip for backlight unit one are packaged together.
8. manufacturing method for LED as claimed in claim 1 is characterized in that: described light transmissive material coats each light-emitting diode chip for backlight unit respectively, makes each light-emitting diode chip for backlight unit become independently packaging body.
9. as any described manufacturing method for LED of claim 1 to 8, it is characterized in that: this light transmissive material coats described substrate with light-emitting diode chip for backlight unit.
10. as any described manufacturing method for LED of claim 1 to 8, it is characterized in that: remove substrate before earlier in utilizing light transmissive material to coat described LED wafer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910311875.2A CN102104012B (en) | 2009-12-21 | 2009-12-21 | Manufacturing method of light-emitting diode |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910311875.2A CN102104012B (en) | 2009-12-21 | 2009-12-21 | Manufacturing method of light-emitting diode |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN102104012A true CN102104012A (en) | 2011-06-22 |
| CN102104012B CN102104012B (en) | 2014-04-30 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN200910311875.2A Expired - Fee Related CN102104012B (en) | 2009-12-21 | 2009-12-21 | Manufacturing method of light-emitting diode |
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| Country | Link |
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| CN (1) | CN102104012B (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106206914A (en) * | 2016-08-22 | 2016-12-07 | 成都众乐泰科技有限公司 | A kind of LED light emitting diode |
| CN106328790A (en) * | 2016-11-04 | 2017-01-11 | 苏州圣咏电子科技有限公司 | Production method of vertical LED packaged part and vertical LED packaged part |
| CN110197863A (en) * | 2018-02-27 | 2019-09-03 | 富泰华工业（深圳）有限公司 | Light-emitting diode display device and pixel installation method |
| CN111261053A (en) * | 2020-01-20 | 2020-06-09 | 京东方科技集团股份有限公司 | Micro light-emitting diode display panel, preparation method thereof and display device |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6700136B2 (en) * | 2001-07-30 | 2004-03-02 | General Electric Company | Light emitting device package |
| CN1901238A (en) * | 2005-07-20 | 2007-01-24 | 桦晶科技股份有限公司 | Package structure of light emitting diode (LED) no lining up |
-
2009
- 2009-12-21 CN CN200910311875.2A patent/CN102104012B/en not_active Expired - Fee Related
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6700136B2 (en) * | 2001-07-30 | 2004-03-02 | General Electric Company | Light emitting device package |
| CN1901238A (en) * | 2005-07-20 | 2007-01-24 | 桦晶科技股份有限公司 | Package structure of light emitting diode (LED) no lining up |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN106206914A (en) * | 2016-08-22 | 2016-12-07 | 成都众乐泰科技有限公司 | A kind of LED light emitting diode |
| CN106328790A (en) * | 2016-11-04 | 2017-01-11 | 苏州圣咏电子科技有限公司 | Production method of vertical LED packaged part and vertical LED packaged part |
| CN110197863A (en) * | 2018-02-27 | 2019-09-03 | 富泰华工业（深圳）有限公司 | Light-emitting diode display device and pixel installation method |
| CN111261053A (en) * | 2020-01-20 | 2020-06-09 | 京东方科技集团股份有限公司 | Micro light-emitting diode display panel, preparation method thereof and display device |
| CN111261053B (en) * | 2020-01-20 | 2023-10-13 | 京东方科技集团股份有限公司 | Micro light-emitting diode display panel, manufacturing method thereof and display device |
Also Published As
| Publication number | Publication date |
|---|---|
| CN102104012B (en) | 2014-04-30 |
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Granted publication date: 20140430 Termination date: 20161221 |