CN102832330B - Wafer level LED packaging structure - Google Patents
Wafer level LED packaging structure Download PDFInfo
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- CN102832330B CN102832330B CN201210303563.9A CN201210303563A CN102832330B CN 102832330 B CN102832330 B CN 102832330B CN 201210303563 A CN201210303563 A CN 201210303563A CN 102832330 B CN102832330 B CN 102832330B
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- isolated island
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Abstract
The invention relates to a wafer level LED packaging structure which comprises the technical field of semiconductor chip packaging and comprises an LED chip (1), a silicon base carrier (2), glass (3), a filling glue (4), a reflection layer (5), a photosensitive resin layer (6) and a metal layer, wherein a concave cavity (21) concaved in the right side of the silicon base carrier (2) is internally provided with an LED chip (1), a silicon island (22) is formed on the back surface of the silicon base carrier and is stridden with the cavity (21), a photosensitive resin layer I (61) with an island structure is covered on the lower surface of the silicon base carrier (2), a metal block (72) is arranged on the lower surface of the silicon island (22), a rewiring metal layer (71) is connected with an electrode I ( 121) and an electrode II (122), and a signal and heat of the LED chip are led outside. Due to the adoption of a non-TSV (Through Silicon Via) structure, the wafer level LED packaging structure has the advantages of low packaging process difficulty and low packaging cost, is improved in electricity conduction and heat radiating capacity, and is suitable for being widely applied in portable products.
Description
Technical field
The present invention relates to a kind of wafer level chip-packaging structure, belong to semiconductor die package technical field.
Background technology
LED(light-emitting diode) be a kind of solid-state semiconductor device that can be visible ray by electric energy conversion, it is widely used in the fields such as illumination, LCD backlight plate, control panel, flasher.
LED(light-emitting diode) by P-N knot, formed.At present, LED encapsulation is mainly undertaken by routing (being Bonding mode) and the mode of back bonding with single chips, has the following disadvantages:
1) Bonding formula encapsulation
The position of lead-in wire can cover and lose light intensity, the cooling base that Bonding mode encapsulates is all at chip back, and radiating effect is unsatisfactory, particularly the LED of high brightness, the package dimension that Bonding mode encapsulates is relatively large, is unfavorable for its application in portable product.Secondly, the packing forms production efficiency of single chips is low, and homogeneity of product is difficult to guarantee, causes the test result classification of product more, affects the actual output of product of factory.
2) mounted type wafer level LED encapsulation
Along with people deepen the understanding of Bonding mode LED encapsulation, the LED encapsulation technology that the disk of take is carrier starts to grow up, but in current technical development, basic silicon through hole (the Through Silicon Via) interconnected method that adopts of wafer level LED encapsulation, utilizing TSV(silicon through hole) the structure back side of realizing LED electrode shifts and distributes, its technology difficulty is larger, and packaging cost is higher, and the effective coverage of heat radiation is tied.
Summary of the invention
The object of the invention is to overcome above-mentioned deficiency, provide that a kind of encapsulating structure is simple, packaging cost is low, heat radiation ability, the wafer level LED chip encapsulating structure that is suitable for applying in portable product.
the present invention is achieved in thata wafer level LED encapsulating structure, it comprises LED chip, silicon substrate carrier and filling glue, and described LED chip comprises chip body, at chip body upper surface, is provided with electrode, and described electrode comprises electrode I and electrode II, and the top of described silicon substrate carrier arranges glass.
The front of described silicon substrate carrier is provided with recessed die cavity, the back side is provided with silicon isolated island, the two ends that described silicon isolated island strides across die cavity are connected with silicon substrate carrier, described LED chip is connected with the silicon isolated island in die cavity by linking glue, described glass is connected by filling glue with silicon substrate carrier, and fills glue and fill full die cavity inside.
The below of described silicon substrate carrier is provided with photosensitive resin layer and metal level, described photosensitive resin layer comprises photosensitive resin layer I and photosensitive resin layer II, described photosensitive resin layer I covers the lower surface of silicon substrate carrier, be island structure, its height flushes with silicon isolated island, described metal level comprises interconnection metal layer and metal derby again, described metal derby is arranged on the lower surface of silicon isolated island, described interconnection metal layer is again connected with electrode I, electrode II, described photosensitive resin layer II covers on metal level, and is provided with several photosensitive resin openings.
Described silicon isolated island is arranged at the below of LED chip.
The bottom cross-over connection of described silicon isolated island and die cavity.
The length of described silicon isolated island is greater than the bottom size of die cavity, and width is less than LED chip width.
Described photosensitive resin layer I and silicon isolated island flush.
The longitudinal section of described die cavity is inverted trapezoidal.
The upper surface of described mold cavity surface and silicon substrate carrier is provided with reflector layer.
The lower surface of described glass is set up phosphor powder layer.
The invention has the beneficial effects as follows:
A kind of wafer level LED of the present invention encapsulating structure adopts non-TSV structure, silicon isolated island and the structure photosensitive resin that is island structure are set in the bottom of LED chip, and make wiring metal connection-core plate electrode again, utilize large area again interconnection metal layer promoted conduction and the heat-sinking capability of encapsulating structure, heat energy on LED chip is shed by metal level fast, encapsulating structure is simple, reduced LED chip packaging cost, realize high conduction, the heat conductivility of LED chip encapsulation, met the surface mount process of standard simultaneously.
Accompanying drawing explanation
Fig. 1 is the schematic diagram of the embodiment mono-of a kind of wafer level LED of the present invention encapsulating structure.
Fig. 2 is the schematic diagram of the embodiment bis-of a kind of wafer level LED of the present invention encapsulating structure.
In figure:
LED chip 1
Chip body 11
Electrode 12
Electrode I 121
Electrode II 122
Link glue 13
Silicon substrate carrier 2
Die cavity 21
Silicon isolated island 22
Glass 3
Phosphor powder layer 31
Fill glue 4
Reflector layer 5
Photosensitive resin layer 6
Photosensitive resin layer I 61
Photosensitive resin layer II 62
Photosensitive resin opening 621
Metal level 7
Interconnection metal layer 71 again
Metal derby 72.
Embodiment
Referring to Fig. 1, a kind of wafer level LED of the present invention encapsulating structure, in embodiment mono-, this encapsulating structure comprises LED chip 1, silicon substrate carrier 2 and fills glue 4, described LED chip 1 comprises chip body 11, at chip body 11 upper surfaces, be provided with electrode 12, described electrode 12 comprises electrode I 121 and electrode II 122, and the top of described silicon substrate carrier 2 arranges glass 3.
The front of described silicon substrate carrier 2 is provided with recessed die cavity 21, the back side is provided with silicon isolated island 22, and the longitudinal section of described die cavity 21 is inverted trapezoidal.Described silicon isolated island 22 strides across the two ends of die cavity 21, with the bottom cross-over connection of die cavity 21.Described silicon isolated island 22 plays supporting chip effect.LED chip 1 in die cavity 21 is connected with silicon isolated island 22 by linking glue 13, and the length of described silicon isolated island 22 is greater than the bottom size of die cavity 21, and width is less than the width of LED chip 1.
The upper surface of described die cavity 21 surfaces and silicon substrate carrier 2 is provided with reflector layer 5, and described reflector layer 5 contributes to promote LED light extraction efficiency.
Described glass 3 is connected by filling glue 4 with silicon substrate carrier 2, and fills glue 4 and fill full die cavity 21 inside, and described filling glue 4 comprises silica gel.
The below of described silicon substrate carrier 2 is provided with photosensitive resin layer 6 and metal level 7, described photosensitive resin layer 6 comprises photosensitive resin layer I 61 and photosensitive resin layer II 62, described photosensitive resin layer I 61 covers the lower surface of silicon substrate carrier 2, is island structure, and its height flushes with silicon isolated island 22.Described metal level 7 comprises interconnection metal layer 71 and metal derby 72 again, and described metal derby 72 is arranged on the lower surface of silicon isolated island 22, and described interconnection metal layer again 71 is connected with electrode I 121, electrode II 122, and the LED chip signal of telecommunication and heat are drawn.Described photosensitive resin layer II 62 covers on metal level 7, and described photosensitive resin layer II 62 is provided with several photosensitive resin openings 621, exposes metal derby 72 and part interconnection metal layer 71 again.
In embodiment bis-, described glass 3 lower surfaces are set up phosphor powder layer 31, coordinate blue led chip 1, and this encapsulating structure becomes wafer level White-light LED package structure.Glass 3 lower surfaces that phosphor powder layer 31 is located at, leave LED chip 1 one segment distances, can extend the life-span of fluorescent material, extend the useful life of wafer level White-light LED package structure simultaneously.As shown in Figure 2.
Claims (9)
1. a wafer level LED encapsulating structure, comprise LED chip (1), silicon substrate carrier (2) and fill glue (4), described LED chip (1) comprises chip body (11), at chip body (11) upper surface, be provided with electrode (12), described electrode (12) comprises electrode I (121) and electrode II (122), the top of described silicon substrate carrier (2) arranges glass (3)
It is characterized in that: the front of described silicon substrate carrier (2) is provided with recessed die cavity (21), the back side is provided with silicon isolated island (22), the two ends that described silicon isolated island (22) strides across die cavity (21) are connected with silicon substrate carrier (2), described LED chip is connected with the silicon isolated island (22) in die cavity (21) by linking glue (13), described glass (3) is connected by filling glue (4) with silicon substrate carrier (2), and fill glue (4) and fill full die cavity (21) inside
The below of described silicon substrate carrier (2) is provided with photosensitive resin layer (6) and metal level (7), described photosensitive resin layer (6) comprises photosensitive resin layer I (61) and photosensitive resin layer II (62), described photosensitive resin layer I (61) covers the lower surface of silicon substrate carrier (2), be island structure, its height flushes with silicon isolated island (22), described metal level (7) comprises interconnection metal layer (71) and metal derby (72) again, described metal derby (72) is arranged on the lower surface of silicon isolated island (22), described interconnection metal layer again (71) and electrode I (121), electrode II (122) connects, described photosensitive resin layer II (62) covers on metal level (7), and be provided with several photosensitive resin openings (621).
2. a kind of wafer level LED encapsulating structure according to claim 1, is characterized in that: described silicon isolated island (22) is arranged at the below of LED chip (1).
3. a kind of wafer level LED encapsulating structure according to claim 1, is characterized in that: the bottom cross-over connection of described silicon isolated island (22) and die cavity (21).
4. a kind of wafer level LED encapsulating structure according to claim 1, is characterized in that: the length of described silicon isolated island (22) is greater than the bottom size of die cavity (21), and width is less than LED chip (1) width.
5. a kind of wafer level LED encapsulating structure according to claim 1, is characterized in that: described photosensitive resin layer I (61) and silicon isolated island (22) flush.
6. a kind of wafer level LED encapsulating structure according to claim 1, is characterized in that: the longitudinal section of described die cavity (21) is inverted trapezoidal.
7. according to a kind of wafer level LED encapsulating structure described in any one in claim 1 to 6, it is characterized in that: the upper surface of described die cavity (21) surface and silicon substrate carrier (2) is provided with reflector layer (5).
8. according to a kind of wafer level LED encapsulating structure described in any one in claim 1 to 6, it is characterized in that: the lower surface of described glass (3) is set up phosphor powder layer (31).
9. a kind of wafer level LED encapsulating structure according to claim 7, is characterized in that: the lower surface of described glass (3) is set up phosphor powder layer (31).
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| Application Number | Priority Date | Filing Date | Title |
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| CN201210303563.9A CN102832330B (en) | 2012-08-24 | 2012-08-24 | Wafer level LED packaging structure |
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| CN201210303563.9A CN102832330B (en) | 2012-08-24 | 2012-08-24 | Wafer level LED packaging structure |
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| CN102832330A CN102832330A (en) | 2012-12-19 |
| CN102832330B true CN102832330B (en) | 2014-12-10 |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN105390602A (en) * | 2015-12-14 | 2016-03-09 | 江阴乐圩光电股份有限公司 | LED package body |
| CN109075140A (en) * | 2018-08-07 | 2018-12-21 | 深圳市为通博科技有限责任公司 | Chip-packaging structure and its manufacturing method |
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| US6501103B1 (en) * | 2001-10-23 | 2002-12-31 | Lite-On Electronics, Inc. | Light emitting diode assembly with low thermal resistance |
| CN101997074A (en) * | 2010-07-30 | 2011-03-30 | 晶科电子（广州）有限公司 | LED (Light Emitting Diode) surface patch type encapsulating structure based on silicon base plate and encapsulating method thereof |
| CN201804913U (en) * | 2010-09-30 | 2011-04-20 | 江阴长电先进封装有限公司 | Wafer-level light emitting diode (LED) packaging structure |
| CN202067790U (en) * | 2011-03-17 | 2011-12-07 | 江阴长电先进封装有限公司 | LED encapsulation structure for silicon through hole of wafer-level glass cavity |
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|---|---|---|---|---|
| JP3992301B2 (en) * | 1995-04-26 | 2007-10-17 | シチズン電子株式会社 | Chip type light emitting diode |
| US7719099B2 (en) * | 2005-10-21 | 2010-05-18 | Advanced Optoelectronic Technology Inc. | Package structure for solid-state lighting devices and method of fabricating the same |
| US20070267642A1 (en) * | 2006-05-16 | 2007-11-22 | Luminus Devices, Inc. | Light-emitting devices and methods for manufacturing the same |
| KR101574286B1 (en) * | 2009-01-21 | 2015-12-04 | 삼성전자 주식회사 | Light emitting device |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6501103B1 (en) * | 2001-10-23 | 2002-12-31 | Lite-On Electronics, Inc. | Light emitting diode assembly with low thermal resistance |
| CN101997074A (en) * | 2010-07-30 | 2011-03-30 | 晶科电子（广州）有限公司 | LED (Light Emitting Diode) surface patch type encapsulating structure based on silicon base plate and encapsulating method thereof |
| CN201804913U (en) * | 2010-09-30 | 2011-04-20 | 江阴长电先进封装有限公司 | Wafer-level light emitting diode (LED) packaging structure |
| CN202067790U (en) * | 2011-03-17 | 2011-12-07 | 江阴长电先进封装有限公司 | LED encapsulation structure for silicon through hole of wafer-level glass cavity |
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