CN102103490A - Method for improving memory efficiency by using stream processing - Google Patents
Method for improving memory efficiency by using stream processing Download PDFInfo
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- CN102103490A CN102103490A CN2010105984973A CN201010598497A CN102103490A CN 102103490 A CN102103490 A CN 102103490A CN 2010105984973 A CN2010105984973 A CN 2010105984973A CN 201010598497 A CN201010598497 A CN 201010598497A CN 102103490 A CN102103490 A CN 102103490A
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Abstract
The invention provides a method for improving the memory efficiency by using stream processing. A parallel processing unit simultaneously sends a request and adds a tag number on a request address; returned data is stored into a corresponding buffer area according to a tag carried by the returned data of a memory in a classified way; and the data is fetched from the corresponding buffer area during use so as to perform data processing. By the method of parallel access and storage by using a production line, the access and storage efficiency is improved effectively.
Description
Technical field
The present invention relates to the internal memory control technology, specifically relate to a kind of method of utilizing stream treatment to improve memory efficient.
Background technology
Computer software has obtained application more and more widely in current society, and on the one hand, computer software is being applied in the middle of the growing field; On the other hand, the user of computer software is changed the users of present different know-hows into also by the Computer Engineer of original specialty.This just requires 10 computer software functions powerful, but be simple and easy to use, this requirement directly causes the computer software scale to become big, complexity increases, make the user when appliance computer software, the incidence of software error increases, and wherein, main, modal mistake is exactly the mistake that software causes when carrying out internal storage access.This wrong aggregate performance is two kinds of forms: a kind of is the read/write address misquotation; Another kind is that access limit is violated permission, and these two kinds of mistakes are referred to as the illegal memory visit.At present, the illegal memory visit can cause the skilful fruit in serious bad back: illegal rdma read, can cause that data referencing makes mistakes, and cause system's confusion; Illegally write internal memory, can destroy the normal data in the internal memory, when serious, also can cause systemic breakdown
In the method to internal storage access, substantially all be to carry out data search at present, need more periodicity owing to from the internal storage access to data, return, if sequential access can cause system performance low by the sequential access internal memory.
Summary of the invention
The objective of the invention is to propose a kind of high-level efficiency memory pool access method.
A kind of method of utilizing stream treatment to improve memory efficient, step is as follows:
When A, pipeline system receive new message information, obtain cryptographic hash according to four-tuple by hash algorithm, every level production line visit TCP connects concordance list, and 32 memory access addresses are widened to 40, and most-significant byte is tag number;
B, first order pipeline latency TCP connect the return data of concordance list, are saved in the buffer zone formation, tag position 1; When waiting for first order streamline return data, second level waterline is got location visit TCP linkage record buffer zone from the formation of tag position 1, and streamline can receive new message message simultaneously, carries out the memory access first time; The connection management system puts return data into different categories according to tag number and is saved to the fifo queue buffer zone;
When C, pipeline system are used data at needs, take out data from corresponding buffer zone and use.
First kind of optimal technical scheme of the present invention is: connection management adopts a plurality of TCP of 3 level production line mode concurrent processing to connect, and the first order connects concordance list for visit TCP, and the second level is TCP linkage record buffer zone, and 3rd level is for upgrading above-mentioned two list structures.
Second kind of optimal technical scheme of the present invention is: adopt pipeline system to carry out internal storage access.
The third optimal technical scheme of the present invention is: when carrying out two memory access in the first order and the second level, if stream table address and out of order buffer zone are soon used up, can initiate to upgrade the visit of above-mentioned two address pool, tag is respectively 3 and 4, and return data is stored in the corresponding buffer zone formation.
The present invention adopts the streamline memory access that walks abreast, and saves the data in the corresponding FIFO buffer formation, has effectively improved memory access efficient.
Description of drawings
Fig. 1 position building-block of logic of the present invention
Embodiment
When 1, receiving new message information, obtain cryptographic hash according to four-tuple by hash algorithm, first order streamline visit TCP connects concordance list, and 32 memory access addresses are widened to 40, and most-significant byte is 1.
2, waiting step 1 return data is saved in the FIFO buffer formation, tag position 1.When waiting for first order streamline return data, second level waterline is got location visit TCP linkage record buffer zone from the formation of tag position 1,32 memory access addresses are widened to 40, and most-significant byte is 2.Streamline can receive new message message simultaneously, carries out the memory access first time.
3, waiting step 2 return datas are saved in the corresponding buffer zone formation, and tag number is 2.
4, when carrying out above-mentioned two memory access, if stream table address and out of order buffer zone are soon used up, can initiate to upgrade the visit of above-mentioned two address pool, tag is respectively 3 and 4, and return data is stored in the corresponding buffer zone formation.
Claims (4)
1. method of utilizing stream treatment to improve memory efficient, it is characterized in that: step is as follows:
When A, pipeline system receive new message information, obtain cryptographic hash according to four-tuple by hash algorithm, every level production line visit TCP connects concordance list, and 32 memory access addresses are widened to 40, and most-significant byte is tag number;
B, first order pipeline latency TCP connect the return data of concordance list, are saved in the buffer zone formation, tag position 1; When waiting for first order streamline return data, second level waterline is got location visit TCP linkage record buffer zone from the formation of tag position 1, and streamline can receive new message message simultaneously, carries out the memory access first time; The connection management system puts return data into different categories according to tag number and is saved to the fifo queue buffer zone;
When C, pipeline system are used data at needs, take out data from corresponding buffer zone and use.
2. a kind of according to claim 1 method of utilizing stream treatment to improve memory efficient, it is characterized in that: connection management adopts a plurality of TCP of 3 level production line mode concurrent processing to connect, the first order connects concordance list for visit TCP, the second level is TCP linkage record buffer zone, and 3rd level is for upgrading above-mentioned two list structures.
3. a kind of according to claim 1 method of utilizing stream treatment to improve memory efficient is characterized in that: adopt pipeline system to carry out internal storage access.
4. a kind of according to claim 1 method of utilizing stream treatment to improve memory efficient, it is characterized in that: when carrying out two memory access in the first order and the second level, if stream table address and out of order buffer zone are soon used up, can initiate to upgrade the visit of above-mentioned two address pool, tag is respectively 3 and 4, and return data is stored in the corresponding buffer zone formation.
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| CN201010598497.3A CN102103490B (en) | 2010-12-17 | 2010-12-17 | Method for improving memory efficiency by using stream processing |
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| CN201010598497.3A CN102103490B (en) | 2010-12-17 | 2010-12-17 | Method for improving memory efficiency by using stream processing |
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| CN102103490A true CN102103490A (en) | 2011-06-22 |
| CN102103490B CN102103490B (en) | 2014-07-23 |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104793987A (en) * | 2014-01-17 | 2015-07-22 | 中国移动通信集团公司 | Data processing method and device |
| CN113590520A (en) * | 2021-06-15 | 2021-11-02 | 珠海一微半导体股份有限公司 | Control method for automatically writing data into SPI system and SPI system |
| CN114710421A (en) * | 2022-04-14 | 2022-07-05 | 合肥卓讯云网科技有限公司 | Network connection state maintenance device and method based on data prefetching |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010047456A1 (en) * | 2000-01-28 | 2001-11-29 | Thomas Schrobenhauzer | Processor |
| CN1949191A (en) * | 2005-10-14 | 2007-04-18 | 杭州中天微系统有限公司 | Method of realizing low power consumption high speed buffer storying and high speed buffer storage thereof |
| CN101650698A (en) * | 2009-08-28 | 2010-02-17 | 曙光信息产业(北京)有限公司 | Method for realizing direct memory access |
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2010
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Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20010047456A1 (en) * | 2000-01-28 | 2001-11-29 | Thomas Schrobenhauzer | Processor |
| CN1949191A (en) * | 2005-10-14 | 2007-04-18 | 杭州中天微系统有限公司 | Method of realizing low power consumption high speed buffer storying and high speed buffer storage thereof |
| CN101650698A (en) * | 2009-08-28 | 2010-02-17 | 曙光信息产业(北京)有限公司 | Method for realizing direct memory access |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104793987A (en) * | 2014-01-17 | 2015-07-22 | 中国移动通信集团公司 | Data processing method and device |
| CN104793987B (en) * | 2014-01-17 | 2018-08-03 | 中国移动通信集团公司 | A kind of data processing method and device |
| CN113590520A (en) * | 2021-06-15 | 2021-11-02 | 珠海一微半导体股份有限公司 | Control method for automatically writing data into SPI system and SPI system |
| CN114710421A (en) * | 2022-04-14 | 2022-07-05 | 合肥卓讯云网科技有限公司 | Network connection state maintenance device and method based on data prefetching |
| CN114710421B (en) * | 2022-04-14 | 2022-10-25 | 合肥卓讯云网科技有限公司 | Network connection state maintenance device and method based on data prefetching |
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| CN102103490B (en) | 2014-07-23 |
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Effective date of registration: 20210820 Address after: Room 111-1, 1st floor, building 23, No.8 yard, Dongbei Wangxi Road, Haidian District, Beijing 100193 Patentee after: Zhongke Tenglong Information Technology Co.,Ltd. Address before: 300384 Xiqing District, Tianjin Huayuan Industrial Zone (outside the ring) 15 1-3, hahihuayu street. Patentee before: DAWNING INFORMATION INDUSTRY Co.,Ltd. |
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