CN102098054B - Self-adaptive analog-to-digital conversion board card based on FPGA (field programmable gate array) - Google Patents

Self-adaptive analog-to-digital conversion board card based on FPGA (field programmable gate array) Download PDF

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CN102098054B
CN102098054B CN201010609092.5A CN201010609092A CN102098054B CN 102098054 B CN102098054 B CN 102098054B CN 201010609092 A CN201010609092 A CN 201010609092A CN 102098054 B CN102098054 B CN 102098054B
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signal
fpga
logic device
standard
input
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CN102098054A (en
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陈利锋
李文沛
邵俊昌
叶丰
陈定祥
张驰
成广伟
袁亦竑
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Tongji University
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Shanghai Maglev Transportation Engineering Technology Research Center
Shanghai Maglev Transportation Development Co Ltd
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Abstract

The invention provides a self-adaptive analog-to-digital conversion board card based on an FPGA (field programmable gate array), which comprises an FPGA logic device which is provided with a plurality of parallel processing signal processing channels to correspondingly distinguish and process a plurality of nonstandard RS485 signals with different speed rates. The self-adaptive analog-to-digital conversion board card can be used for automatically adapting to the date input of eight nonstandard RS485 signals with different speed rates, independently acquiring and distinguishing the data, synchronously converting the data into an analog signal, and outputting the analog signal. In an intelligent signal distinguishing method, the content of the transmitted signal can be correctly distinguished by acquiring the counting specific value between a high-level signal and a low-level signal under the condition that the frequencies of the input nonstandard RS485 signals do not need to be previously known; the real-time distinguishing and the series-parallel conversing of the input signals on a processing board card which is more centralized can be completed; and in order to improve the integrated level, a plurality of analog-to-digital conversion modules are further intergraded on the same board card, and a signal adjusting board card does not need to be additionally arranged during application, so that the cost is effectively saved.

Description

Self adaptation digital-to-analogue conversion board based on FPGA
Technical field
The present invention relates to a kind of data acquisition and digiverter, particularly a kind of self adaptation digital-to-analogue conversion board based on FPGA.
Background technology
Existing RS485 is typical serial communication, standard regulation defines logic " 0/1 " signal with the voltage difference between two holding wires, logical zero represents take the voltage difference of line-to-line as+(2-6) V, and logical one represents take the voltage difference of line-to-line as-(2-6) V.
Due to the signal attenuation effect of circuit, above-mentioned standard RS485 can only transmit certain distance.And standard RS485 requires transmit leg and recipient to must operate at same frequency range (allowing certain error); If transmit leg and recipient's frequency is inconsistent, can cause data not to be correctly validated.
In addition, as the board of standard RS485 signal of communication processing, conventionally can only process transmission and the conversion of a road signal, then by other signal condition board, data be carried out to the conversion such as D/A.
Summary of the invention
The object of this invention is to provide a kind of self adaptation digital-to-analogue conversion board based on FPGA, different frequency that can adaptive input data, identification duty ratio is 1/4 and 3/4 non-standard RS485 signal, and completes in real time data acquisition and the digital-to-analogue conversion processing of multiple signals.
In order to achieve the above object, technical scheme of the present invention is to provide a kind of self adaptation digital-to-analogue conversion board based on FPGA, comprise fpga logic device, it is provided with the signal processing channel of some parallel processings, carrys out the non-standard RS485 signal in some roads of corresponding identifying processing different frequency.
Some signal processing channels of described fpga logic device adopt same global clock to drive; The frequency of described global clock is far above the highest frequency of described non-standard RS485 signal.
The frequency of the non-standard RS485 signal in described some roads is distributed in respectively 100KHz between 1MHz.
The global clock of described fpga logic device, in the scope of 25MHz to 40MHz, is preferably 40MHz.
On described board, be also provided with input signal isolation modular converter, be connected with the input of described fpga logic device; Described input signal isolation modular converter, the non-standard RS485 signal in described some roads to input respectively, carries out signal type conversion, signal level conversion and level signal isolation successively.
Receive some roads output signal of described input signal isolation modular converter, by described fpga logic device described in it in some signal processing channels correspondence carry out sample count.
On described board, be also provided with the signal isolation output interface being connected with the output of described fpga logic device, the recognition result data of described fpga logic device output are carried out to serial-to-parallel conversion.
On described board, be also provided with the some D/A converter modules that are connected with described signal isolation output interface, its digital signal value corresponding conversion by the output of described signal isolation output interface is analog signal values, and exports to outside.
In a data bit of described non-standard RS485 signal, low and high level ratio, 1/4 and, is set to respectively valid data at 3/4 o'clock; Described valid data are 0 or 1.
Compared with prior art, self adaptation digital-to-analogue conversion board based on FPGA of the present invention, its advantage is: the present invention can adapt to the data input of the nearly 8 non-standard RS485 signals in tunnel of different rates automatically, carry out independently data acquisition identification, and synchronously convert analog signal output to simultaneously.
Be 1/4 and 3/4 non-standard RS485 signal owing to adopting duty ratio, thereby realized the transmitting of long distance R S485 serial data.
Due in the fpga logic device of board core, adopt intelligent signal recognition method, by gathering the count ratio of high level signal and low level signal, in the case of without knowing in advance the non-standard RS485 signal frequency of input, can correctly identify the signal content of transmission;
The present invention can be on more concentrated processing board in addition, completes Real time identification and string the conversion process of multichannel input signal; In order to improve integrated level, also integrated multi-channel digital and analogue modular converter on same board, thereby in application extra signalization conditioning board, effectively cost-saving.
Accompanying drawing explanation
Fig. 1 is the non-standard RS485 signal of the self adaptation digital-to-analogue conversion board identifying processing based on FPGA of the present invention;
Fig. 2 is the operation principle schematic diagram of the self adaptation digital-to-analogue conversion board based on FPGA of the present invention.
Embodiment
Below in conjunction with accompanying drawing explanation the specific embodiment of the present invention.
Self adaptation digital-to-analogue conversion board based on FPGA of the present invention, uses high speed FPGA(field programmable gate array) logical device, the non-standard RS485 signal that is 1/4 and 3/4 to duty ratio carries out signal capture and analyzing and processing.
As shown in Figure 1, described duty ratio is in 1/4 and 3/4 non-standard RS485 signal, label
Figure 2010106090925100002DEST_PATH_IMAGE002
the counting starting position of high level signal, i.e. the periodicity of start record signal in high level; Label
Figure 2010106090925100002DEST_PATH_IMAGE004
be that high level signal counting finishes, low level signal counting starts, start record signal is in low level periodicity; Label
Figure 2010106090925100002DEST_PATH_IMAGE006
it is data bit (1 bit) end position of described non-standard RS485 signal, if high level signal counting is 1/4 with the ratio of low level signal counting in a bit, be that duty ratio is 1/4, determine that this bit is for " 0 ", if high level signal counting is 3/4 with the ratio of low level signal counting, be that duty ratio is 3/4, determine that this bit is for " 1 ".
As shown in Figure 2, on board of the present invention, the integrated input signal isolation modular converter 10 that arranges, carrys out the 8 tunnel above-mentioned non-standard RS485 signals of corresponding reception from outside industrial computer PXI interface; Described input signal isolation modular converter 10 carries out, after type conversion, signal level conversion and the level signal isolation of input signal, exporting to the fpga logic device 20 of board core successively.
The 8 non-standard RS485 signals in tunnel of above-mentioned input are RS485 differential signals, and first it be converted into level signal, then isolate by input signal the Bus isolation chip of establishing in modular converter 10 level signal is converted to stable TTL signal.
Utilize the parallel processing capability of described fpga logic device 20,8 identical signal processing channels are set therein; Adopt the clock of an overall 40MHz to drive to all signal processing channels; The input signal of each signal processing channel does not interfere with each other, and can carry out the identifying processing of input signal separately simultaneously.The Spartan II 2S150 that the adoptable fpga chip of the present invention is Xilinx, or Spartan III 3S400.
Because the data maximum transmission rate of RS-485 is 10Mbps, due to the non-standard RS485 signal of outside input, its peak frequency is below 1MHz; For automatically adapt to described non-standard RS485 signal respectively at 100KHz to the data frequency distributing between 1MHz, make fpga logic device 20 of the present invention in 25MHz to 40MHz scope, be preferably under the high frequency of 40MHz, to carrying out sample count by the input signal after input signal isolation modular converter 10 conversion process.
The effect of bringing is thus as follows: to the 1MHz signal of any one bit, high level signal counting is 1/4 o'clock with the scope of the ratio of low level signal counting in 10/30(duty ratio) be 3/4 o'clock to 30/10(duty ratio); And 500KHz signal to any one bit, the scope of the ratio of high level signal counting/low level signal counting 20/60 (duty ratio is 1/4 o'clock) to 60/20 (duty ratio is 3/4 o'clock).
Visible, the frequency of signal is lower, and count value is larger; No matter but frequency input signal is how many, duty ratio is that the calculated value of 1/4 signal is 0.33 left and right, duty ratio is that the calculated value of 3/4 signal is 3 left and right, both numerical value difference are very large, thereby, for the frequency input signal between frequency distribution is from 100KHz to 1MHz, the data that the present invention all can identify current transmission are exactly 0 or 1.
In order further to improve the integrated level of described board, on board of the present invention, be also provided with 8 D/A converter modules 40.Described fpga logic device 20 is isolated output interface 30 by signalization and is connected with described D/A converter module 40, exports the recognition result of described fpga logic device 20.
The recognition result data of each described signal processing channel output, all isolate output interface 30 by signal and carry out from serial-to-parallel conversion, then by the corresponding outputting analog signal value of described D/A converter module 40; Described analog signal values is 0 ~ 5V continually varying voltage signal.
In application, the self adaptation digital-to-analogue conversion board based on FPGA of the present invention, the PXI slot of insertion industrial computer; After system powers on, board obtains power supply from PXI interface automatically.The non-standard RS485 signal of input continuously, isolate modular converter 10 by input signal and be sent to fpga logic device 20, can select some passages in 8 signal processing channels to use, sample without interfering with each other after identification, by corresponding D/A converter module 40 outputting analog signal values, be delivered to analog signal output interface as the output signal of described board by shielding conductor.On board, corresponding each signal processing channel arranges indicator light interface, is connected to the LED light on industrial computer panel with flat wire, in order to show the ruuning situation of each passage.
In sum, the self adaptation digital-to-analogue conversion board based on FPGA of the present invention, can adapt to the data input of maximum 8 non-standard RS485 signals in tunnel of different rates automatically, carries out independently data acquisition identification, and synchronously converts analog signal output to simultaneously.
Be 1/4 and 3/4 non-standard RS485 signal owing to adopting duty ratio, transmit in differential signal mode, theoretic maximum transmission distance can reach 1219M, thereby has realized the transmitting of long distance R S485 serial data.
Due in the fpga logic device of board core, adopt intelligent signal recognition method, by gathering the count ratio of high level signal and low level signal, in the case of without knowing in advance the non-standard RS485 signal frequency of input, can correctly identify the signal content of transmission;
The present invention can be on more concentrated processing board in addition, completes Real time identification and string the conversion process of multichannel input signal; In order to improve integrated level, also integrated multi-channel digital and analogue modular converter on same board, thereby in application extra signalization conditioning board.The present invention can be applicable to industrial environment as the data acquisition system in the fields such as the control of large electric appliances equipment, the signal transmission of industrial mine.
Although content of the present invention has been done detailed introduction by above preferred embodiment, will be appreciated that above-mentioned description should not be considered to limitation of the present invention.Read after foregoing those skilled in the art, for multiple modification of the present invention and substitute will be all apparent.Therefore, protection scope of the present invention should be limited to the appended claims.

Claims (6)

1. the self adaptation digital-to-analogue conversion board based on FPGA, is characterized in that, comprises fpga logic device (20), and it is provided with the signal processing channel of some parallel processings, carrys out the non-standard RS485 signal in some roads of corresponding identifying processing different frequency;
On described board, be also provided with lower module:
Input signal isolation modular converter (10), is connected with the input of described fpga logic device (20); Described input signal isolation modular converter (10), respectively to non-standard RS485 signal described in some roads of input, carries out signal type conversion, signal level conversion and level signal isolation successively; Receive some roads output signal of described input signal isolation modular converter (10), carry out sample count by described fpga logic device (20) correspondence in the some described signal processing channel of its setting;
Signal isolation output interface (30), is connected with the output of described fpga logic device (20); Described signal isolation output interface (30), carries out serial-to-parallel conversion to the recognition result data of described fpga logic device (20) output;
Some D/A converter modules (40), are connected with described signal isolation output interface (30); Described D/A converter module (40), is analog signal values by the digital signal value corresponding conversion of described signal isolation output interface (30) output, and exports to outside.
2. the self adaptation digital-to-analogue conversion board based on FPGA as claimed in claim 1, is characterized in that, some signal processing channels of described fpga logic device (20) adopt same global clock to drive; The frequency of described global clock is far above the highest frequency of described non-standard RS485 signal.
3. the self adaptation digital-to-analogue conversion board based on FPGA as claimed in claim 2, is characterized in that, the frequency of non-standard RS485 signal is distributed in respectively 100KHz between 1MHz described in some roads.
4. the self adaptation digital-to-analogue conversion board based on FPGA as claimed in claim 3, is characterized in that, the global clock of described fpga logic device (20) is in the scope of 25MHz to 40MHz.
5. the self adaptation digital-to-analogue conversion board based on FPGA as claimed in claim 4, is characterized in that, the global clock of described fpga logic device (20) is 40MHz.
6. the self adaptation digital-to-analogue conversion board based on FPGA as described in any one in claim 1 to 5, is characterized in that, in a data bit of described non-standard RS485 signal, low and high level ratio, 1/4 or, is set to respectively valid data at 3/4 o'clock; Described valid data are 0 or 1.
CN201010609092.5A 2010-12-28 2010-12-28 Self-adaptive analog-to-digital conversion board card based on FPGA (field programmable gate array) Expired - Fee Related CN102098054B (en)

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CN103336250B (en) * 2013-07-15 2016-08-10 中国空间技术研究院 DC/DC supply convertor single particle effect detecting system based on voltage adaptive technology
CN106827835B (en) * 2015-12-07 2019-01-01 北大方正集团有限公司 Synchronization signal control method and synchronization signal Control card
CN114528237B (en) * 2022-02-18 2023-12-12 南昌华勤电子科技有限公司 Interface converter, circuit board and electronic equipment

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1635501A (en) * 2003-12-26 2005-07-06 上海自动化仪表股份有限公司 Multifunctional communication capture card and distributed control system and capture method thereof
CN101615010A (en) * 2009-07-17 2009-12-30 西安电子科技大学 Multi-path data acquiring system based on FPGA

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1635501A (en) * 2003-12-26 2005-07-06 上海自动化仪表股份有限公司 Multifunctional communication capture card and distributed control system and capture method thereof
CN101615010A (en) * 2009-07-17 2009-12-30 西安电子科技大学 Multi-path data acquiring system based on FPGA

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
采用FPGA的振动模拟器设计;顾海燕等;《微计算机信息》;20070331;第23卷(第08期);196-197,179 *
顾海燕等.采用FPGA的振动模拟器设计.《微计算机信息》.2007,第23卷(第08期),196-197,179.

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