CN102097388A - Method for integrating photodiode in CMOS process - Google Patents
Method for integrating photodiode in CMOS process Download PDFInfo
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- CN102097388A CN102097388A CN2009102019406A CN200910201940A CN102097388A CN 102097388 A CN102097388 A CN 102097388A CN 2009102019406 A CN2009102019406 A CN 2009102019406A CN 200910201940 A CN200910201940 A CN 200910201940A CN 102097388 A CN102097388 A CN 102097388A
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Abstract
The invention discloses a method for integrating a photodiode in a complementary metal oxide semiconductor (CMOS) process, which comprises the following steps of: forming a field oxide layer by adopting a 0.35mum CMOS process through growth of a gasket oxide layer, deposition of SiN, photolithography and etching, growth of the field oxide layer and removal of the SiN; forming a photodiode N well (PDNwell) layer by one-time photolithography and implantation; and completing a grid, a side wall, a light dope drain (LDD), a source drain (SD) and a silicide alloy layer by adopting the 0.35mum CMOS process after one-time thermal process. The method can realize the function of a photoelectric mouse with low manufacturing cost.
Description
Technical field
The present invention relates to a kind of semiconductor integrated circuit method of manufacturing technology, particularly relate to a kind of in CMOS (complementary metal oxide semiconductors (CMOS)) technology the method for integrated photodiode.
Background technology
Photodiode integrated more common on cmos device now, it is mainly used in imager, and general required photoetching level is more, and cost is higher.
The purposes of photodiode involved in the present invention is comparatively cheap ruddiness mouse, and photodiode is as optical receiving set, and cmos device then is used as the control circuit part.
This purposes has determined that this photodiode is had following requirement:
At first, this photodiode must be to red light sensitiveness on the function, produces photoelectric current and there is certain requirement the discharge response time.
Secondly, because the market competition of this commodity of mouse is stronger, must realize its desired function with the simplest structure of minimum cost.Therefore, the 0.35 μ m CMOS technology that alternative costs are lower is come integrated photodiode as basic technology.
At last, the integrated performance that can not have influence on other various devices in the original CMOS technology of photodiode.
Summary of the invention
The technical problem to be solved in the present invention provide a kind of in CMOS technology the method for integrated photodiode, can realize the function of optical mouse with lower manufacturing cost.
For solving the problems of the technologies described above, of the present invention in CMOS technology the method for integrated photodiode be to come integrated described photodiode as typical process flow with 0.35 μ m CMOS technology, comprise the steps:
Adopt 0.35 μ mCMOS process, by the growth of cushion oxide layer, the deposit of SiN, photoetching and etching, field oxide is grown up, and the removal of SiN forms field oxide;
Form PDNwell (photodiode N trap) layer by a photoetching and injection;
Through after thermal process, adopt 0.35 μ mCMOS process to finish grid, side wall, LDD (injection of lightly doped drain ion), SD (source is leaked and injected) silicide alloy layer.
Adopt method of the present invention, only need on the basis of former COMS technology, to increase just energy integrated photodiode device of one deck lithography layer, making needs the optical mouse of 2 chip blocks originally, only needs chip piece to realize now, greatly reduces the cost of chip manufacturing, encapsulation.
Description of drawings
The present invention is further detailed explanation below in conjunction with accompanying drawing and embodiment:
Fig. 1 is the formation schematic diagram of field oxide;
Fig. 2 is the formation schematic diagram of PDNwell layer;
Fig. 3 is a photodiode device structural representation integrated in CMOS technology;
Fig. 4 is a method flow diagram of the present invention.
Embodiment
In a specific embodiment of the present invention, come integrated photodiode as typical process flow with 0.35 μ m CMOS technology; In conjunction with shown in Figure 4, the technological process of specific implementation is as follows:
Referring to Fig. 1, at first, according to existing C MOS manufacturing process flow, by the growth of cushion oxide layer, the deposit of SiN (silicon nitride), photoetching and etching, field oxide is grown up, and the removal of SiN forms field oxide.
In above-mentioned steps, use 4000-5600
Field oxide replace blocking layer of metal silicide (SAB) protection photodiode device.Formed field oxide has not only played the effect of isolating device, and has played the effect that the barrier metal silicide forms; Not only protect photodiode part can not be subjected to follow-up influence of generally injecting engineering and etching engineering, but also guaranteed when enforcement silicide alloy engineering silicide alloy on photodiode area can not be grown.Because silicide alloy is lighttight, if silicide alloy is gone up in the photodiode area growth, will not have light so and inject photodiode, then there is not photoelectricity to miscarry.Just because of this, can make whole process flow reduce by a layer photoetching.
Referring to shown in Figure 2, after having finished field oxide, form the N trap of photodiode by a photoetching and injection again; Inject P elements, the injection energy is 700kev ± 20%, and implantation dosage is 1.5E13 ± 20%.Carry out oxygen annealing after injection is finished, temperature is 1100 ℃, and the time is 110 minutes, and oxygen content is 1%.
Through the photodiode of above-mentioned process formation, by P
Sub(P type substrate) replaced the P end of PN junction, saved a layer photoetching again.
In conjunction with shown in Figure 3,, finish grid according to existing C MOS manufacturing process flow, side wall, LDD, SD, subsequent process steps such as silicide alloy through (temperature is 1100 ℃, and the time is 110 minutes, and oxygen content is 1%) after thermal process.The Ndiff (N type diffusion region) in the PD in the photodiode (photodiode) zone and Pdiff (p type diffusion region) are leaked when injecting by the source and finish together, have saved Twi-lithography so again.
So far, through the technological process of optimizing of the present invention, only Duoed the photoetching of one deck PDNwell than existing C MOS manufacturing process flow, make the original 5 road photoetching flow processs that need to increase, becoming only increases the photoetching flow process one, can come in photodiode is integrated, greatly reduces cost.By drawing inclined to one side experiment, confirm that further method process allowance of the present invention is very big, technology is very stable.
More than by embodiment the present invention is had been described in detail, but these are not to be construed as limiting the invention.Under the situation that does not break away from the principle of the invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (4)
1. the method for an integrated photodiode in CMOS technology is characterized in that: described CMOS technology is to come integrated described photodiode with 0.35 μ m CMOS technology as typical process flow, comprise the steps,
Adopt 0.35 μ m CMOS process, by the growth of cushion oxide layer, the deposit of SiN, photoetching and etching, field oxide is grown up, and the removal of SiN forms field oxide;
Inject formation photodiode N trap layer by a photoetching and P elements;
Through after thermal process, adopt 0.35 μ m CMOS process to finish grid, side wall, the lightly doped drain ion injects, and the source is leaked and is injected the silicide alloy layer.
2. the method for claim 1, it is characterized in that: the thickness of described field oxide is
3. the method for claim 1, it is characterized in that: the injection energy is 700kev ± 20%, implantation dosage is 1.5E13 ± 20%; Carry out oxygen annealing after injection is finished, temperature is 1100 ℃, and the time is 110 minutes, and oxygen content is 1%.
4. the method for claim 1 is characterized in that: finishes together when the N type diffusion region of the photodiode area in the described photodiode and p type diffusion region leak injection by the source.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 200910201940 CN102097388B (en) | 2009-12-15 | 2009-12-15 | Method for integrating photodiode in CMOS process |
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| CN 200910201940 CN102097388B (en) | 2009-12-15 | 2009-12-15 | Method for integrating photodiode in CMOS process |
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| CN102097388A true CN102097388A (en) | 2011-06-15 |
| CN102097388B CN102097388B (en) | 2013-12-18 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105633018A (en) * | 2014-11-03 | 2016-06-01 | 无锡华润上华半导体有限公司 | Integrated circuit manufacturing methods |
| CN107546286A (en) * | 2017-07-28 | 2018-01-05 | 深圳市汇春科技股份有限公司 | A kind of photodiode based on CMOS technology |
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| CN1417866A (en) * | 2001-11-06 | 2003-05-14 | 全视技术有限公司 | Active pixel with weakened dark current in CMOS image sensor |
| CN1531101A (en) * | 2003-03-13 | 2004-09-22 | ����ʿ�뵼������˾ | Producing method for complementary metal oxide semiconductor image sensor |
| US20040217397A1 (en) * | 2003-04-30 | 2004-11-04 | Won-Ho Lee | CMOS image sensor having test pattern therein and method for manufacturing the same |
| CN1744323A (en) * | 2004-07-05 | 2006-03-08 | 东部亚南半导体株式会社 | Method for fabricating CMOS image sensor |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1417866A (en) * | 2001-11-06 | 2003-05-14 | 全视技术有限公司 | Active pixel with weakened dark current in CMOS image sensor |
| CN1531101A (en) * | 2003-03-13 | 2004-09-22 | ����ʿ�뵼������˾ | Producing method for complementary metal oxide semiconductor image sensor |
| US20040217397A1 (en) * | 2003-04-30 | 2004-11-04 | Won-Ho Lee | CMOS image sensor having test pattern therein and method for manufacturing the same |
| CN1744323A (en) * | 2004-07-05 | 2006-03-08 | 东部亚南半导体株式会社 | Method for fabricating CMOS image sensor |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN105633018A (en) * | 2014-11-03 | 2016-06-01 | 无锡华润上华半导体有限公司 | Integrated circuit manufacturing methods |
| CN107546286A (en) * | 2017-07-28 | 2018-01-05 | 深圳市汇春科技股份有限公司 | A kind of photodiode based on CMOS technology |
| CN107546286B (en) * | 2017-07-28 | 2020-09-04 | 深圳市汇春科技股份有限公司 | Photosensitive diode based on CMOS (complementary Metal oxide semiconductor) process |
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| CN102097388B (en) | 2013-12-18 |
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Owner name: SHANGHAI HUAHONG GRACE SEMICONDUCTOR MANUFACTURING Free format text: FORMER OWNER: HUAHONG NEC ELECTRONICS CO LTD, SHANGHAI Effective date: 20140108 |
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Effective date of registration: 20140108 Address after: 201203 Shanghai city Zuchongzhi road Pudong New Area Zhangjiang hi tech Park No. 1399 Patentee after: Shanghai Huahong Grace Semiconductor Manufacturing Corporation Address before: 201206, Shanghai, Pudong New Area, Sichuan Road, No. 1188 Bridge Patentee before: Shanghai Huahong NEC Electronics Co., Ltd. |