CN102096372B - Method for calibrating satellite system clock based on bus mode - Google Patents
Method for calibrating satellite system clock based on bus mode Download PDFInfo
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- CN102096372B CN102096372B CN 200910200329 CN200910200329A CN102096372B CN 102096372 B CN102096372 B CN 102096372B CN 200910200329 CN200910200329 CN 200910200329 CN 200910200329 A CN200910200329 A CN 200910200329A CN 102096372 B CN102096372 B CN 102096372B
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Abstract
The invention discloses a method for calibrating a satellite system clock based on a bus mode. In the method,, a low-accuracy clock user is mutually connected with a high-accuracy clock source through a serial data bus, and the clock is calibrated by the following steps of: 1) generating a local system clock parameter TL and transmitting the parameter to the high-accuracy clock source by the low-accuracy clock user; 2) receiving the clock parameter TL and simultaneously generating a real-time clock parameter TH of the clock source by the high-accuracy clock source, subtracting the two parameters to acquire time difference data Delta Tlast, and correcting fixed time delay to acquire time difference data Delta Tlast; 3) acquiring the time difference data Delta Tlast and adding the time difference data Delta Tlast to a system clock of the low-accuracy clock user by the low-accuracy clock user; and 4) repeating the steps 1), 2) and 3) according to certain period intervals. The method has the advantages of reducing a hardware pulse circuit and simplifying an interface between single satellites.
Description
Technical field
The present invention relates to the calibration steps of satellite system clock based on bus mode.
Background technology
Satellite in the past adopts centralized architecture usually, and contact each other connects through the hardware data line, clock to the time calibration also must adopt and realize that therefore, hardware that need be certain is paid wages such as hardware pulse per second (PPS) interface circuit.Along with the satellite function is increasingly sophisticated, the increase of scale, the increasing of on-board equipment instrument, therefore the star-like communication modes incompatibility satellite development demand more and more so that certain system is the center adopts mostly both at home and abroad at present and carries out information Control based on bus mode.The benefit that bus-structured communication brings has: simplify various communication interfaces to a kind of, the communication information content is customizable, has good electrical characteristic and fault detect, isolation.
The spaceborne instrument and equipment of large-scale satellite much needs higher clock accuracy, in order to improve reliability and to save cost, a high accuracy clock source is set on star usually, handles when this clock needs the instrument clock to carry out the school to other again.If mode during with traditional in the past point-to-point hardware pulse school; Then the clock source device needs a large amount of hardware resources dispose a plurality of hardware pulse circuit interfaces, and pulse interface circuit and the interrupt response program local clock that aligns was counted when the take over party also must dispose the reception school simultaneously.Mode has increased whole star wiring difficulty during this starlike school, tests fast when also being unfavorable for the school of whole star.And in case instrument and equipment is changed increase and decrease during by the school, the design of high precision clock source device hardware equally must change.
If satellite has adopted bus-structured communication modes; Can design a kind of calibration method so based on bus; Utilize the extensibility of existing bus message content, Content of communciation when increasing a kind of school is worked when realizing the school in each instrument unit and high precision clock source.Can make full use of under the data channel that bus is promptly arranged like this, deduct the hardware pulse circuit, make that interface is simplified greatly between the satellite unit.
Do not have at present to find explanation or report, do not collect both at home and abroad similarly data as yet yet with similar techniques of the present invention.
Summary of the invention
The purpose of this invention is to provide the calibration steps of a kind of satellite system clock, utilize existing bus structure, work when realizing the school to each terminal of bus and high precision clock source based on bus mode.Utilize the present invention, when no longer the hardware pulse circuit mode through special configuration comes the school, thereby, reduced the hardware pulse circuit, make that interface is simplified greatly between the satellite unit.
In order to reach the foregoing invention purpose; The technical scheme that the present invention is adopted for its technical matters of solution provides the calibration steps of a kind of satellite system clock based on bus mode; This method comprises: low precision clock user interconnects through serial data bus and high precision clock source, when carrying out accurate school according to following steps:
Step 1), when low precision clock user's system clock need be with the high precision clock source calibration, gather in real time immediately and generate local system clock parameter T
L, according to the time format of arranging on the star, through the system clock parameter T of serial data bus with this locality
LSend to the high precision clock source;
Step 2), the high precision clock source is adopted interrupt mode to make an immediate response and is received the timing parameter T on the bus
L, generate the higher accurate real-time clock parameter T in local high accuracy clock source simultaneously
HThen, the high precision clock source is with local high accuracy clock parameter T
HDeduct the low precision timing parameter T that receives
L, obtain preliminary time difference data Δ T; And then the fixed delay T on removal and the correction intermediate link
Delay, obtain accurate time difference data Δ T
Last
Bus is passed through accurate time difference result data Δ T in step 3), high precision clock source
LastTurn back to low precision clock user; Low precision clock user obtains through bus and calculates good time difference data Δ T
LastAfter, carry out time difference threshold range and whether meet the judgement within the preset range, if think that time difference data can use, then time difference data Δ T
LastBe added on low precision clock user's the system clock TIMER, carry out clock correction and error compensation;
After accomplishing during the accurate school of step 4), this bus, repeat step 1), 2 at interval according to some cycles), 3) clock alignment that continues;
Step 5), for the long playing rocket system, at interval, periodically the clock system to low precision adopts the accurate calibration method of bus to calibrate local clock when need setting the school according to the reality use.
A kind of satellite system clock of the present invention is based on the calibration steps of bus mode; Owing to take above-mentioned technical scheme; Proposed between high precision clock source and low precision user clock, to carry out timing parameter communication, time difference computing method,, calculated more accurate time difference data value again to the time difference data correction; User clock compensating this final time difference data value to low precision finally reaches the target synchronous with high precision clock.When the invention solves traditional in the past point-to-point hardware pulse school, transmit leg and take over party need a large amount of hardware resources to dispose the problem of a plurality of hardware pulse circuit interfaces, have obtained minimizing hardware pulse circuit, simplify the beneficial effect of interface between the satellite unit.
Description of drawings
Fig. 1 is the structural representation during based on the bus mode school;
Fig. 2 is the workflow diagram during based on the bus mode school.
Embodiment
Below in conjunction with description of drawings the preferred embodiments of the present invention.
Fig. 1 is the structural representation of satellite system clock of the present invention during based on the bus mode school; Comprise that low precision clock user 2 comprises all clock users such as bus clock user 2-1～2-n through serial data bus 3 interconnective high precision clock sources 1 and low precision clock user 2.
High precision clock source 1 is for having the local clock system of degree of precision, can adopt on the satellite such as unit such as GPS, rubidium clock, caesium clocks, and precision generally is superior to 10
-9, far above the clock system of other unit of satellite, as the split-second precision benchmark of whole star.High precision clock source 1 receives the real-time clock data that low precision clock user 2 sends over through bus; After making an immediate response through interrupt mode; With local high precision real-time clock parameter, the low precision clock of receiving with bus interface subtracts, and obtains the difference of time data; After removing some fixed delay amounts again, as the time difference data in high precision clock source.
Low precision clock user 2 is unit during by the school on the satellite, safeguards the clock system of a local lower accuracy, and clock accuracy is 10 usually
-5～10
-7About, promptly the shortest 100 seconds are the longest 2.7 hours, and therefore local clock error 1ms must need low precision clock user 2 to carry out clock alignment and alignment with high precision clock source 1 on the star.The low precision clock user 2 periodic real-time clock parameters that produce send to high precision clock source 1 to timing parameter through bus and calculate time difference data, with this time difference data local clock are carried out the time difference then and revise, and keep consistent with high precision clock source 1.Above-mentioned low precision clock user can be one, also can be a plurality of.
Serial data bus 3 is carried out 1553B/CAN/RS485 serial data bus communications protocol, is that connecting bus controller and each are far put the media cable at terminal, can dispose unibus, two redundancy or many redundant bus.
Fig. 2 is the workflow diagram when the present invention is based on the bus mode school, and shown in the embodiment of Fig. 2, the present invention realizes clock data communication through following steps, and the time difference calculates, with the correction compensation of the time difference.
Step 1), when low precision clock user's 2 system clock need be with the high precision clock source calibration, gather in real time immediately and generate local system clock parameter T
L, according to the time format of arranging on the star, through the system clock parameter T of serial data bus 3 with this locality
LSend to high precision clock source 1;
Step 2), the high precision clock source 1 of the other end on the serial data bus 3 is adopted interrupt mode to make an immediate response and is received the timing parameter T on the bus
L, generate the higher accurate real-time clock parameter T in local high accuracy clock source 1 simultaneously
HThen, 1 usefulness local high accuracy clock parameter in high precision clock source deducts the low precision timing parameter that receives, and obtains preliminary time difference data Δ T (Δ T=T
H-T
L); And then the fixed delay T on removal and the correction intermediate link
Delay, obtain accurate time difference data Δ T
Last
Bus is passed through accurate time difference result data Δ T in step 3), high precision clock source 1
Last(Δ T
Last=Δ T-T
Delay1-T
Delay2-T
Delay3-...-T
Delayn) turn back to and hang down precision clock user 2; Low precision clock user 2 obtains through bus 3 and calculates good time difference data Δ T
LastAfter, carry out time difference threshold range and whether meet the judgement within the preset range, if think that time difference data can use, then time difference data Δ T
LastThe system clock TIMER that is added to low precision clock user goes up (TIMER=TIMER+ Δ T
Last), carry out clock correction and error compensation, keep consistent with high precision clock source 1;
After accomplishing during the accurate school of step 4), this bus, repeat step 1), 2 at interval according to some cycles), 3) clock alignment that continues, final low precision clock user's the clock system long-term accuracy that makes keeps and the high precision clock systems compliant;
Step 5), for the long playing rocket system, at interval, periodically the clock system to low precision adopts the accurate calibration method of bus to calibrate local clock when need setting the school according to the reality use.
As stated; Maximum characteristics of the present invention are to utilize the serial data bus of existing satellite to realize low precision clock user is carried out the real-time transmission of timing parameter; Carry out the accurate time difference by high precision clock source on the bus and calculate, turn back to low precision clock user again and carry out time difference calibration.
Claims (3)
1. a satellite system clock is characterized in that based on the calibration steps of bus mode this method comprises: low precision clock user interconnects through serial data bus and high precision clock source, when carrying out accurate school according to following steps:
Step 1), when low precision clock user's system clock need be with the high precision clock source calibration, gather in real time immediately and generate local system clock parameter T
L, according to the time format of arranging on the star, through the system clock parameter T of serial data bus with this locality
LSend to the high precision clock source;
Step 2), the high precision clock source is adopted interrupt mode to make an immediate response and is received the timing parameter T on the bus
L, generate the real-time clock parameter T of the degree of precision in local high accuracy clock source simultaneously
HThen, the high precision clock source is with local high accuracy clock parameter T
HDeduct the low precision timing parameter T that receives
L, obtain preliminary time difference data Δ T; And then the fixed delay T on removal and the correction intermediate link
Delay, obtain accurate time difference data Δ T
Last
Bus is passed through accurate time difference data Δ T in step 3), high precision clock source
LastTurn back to low precision clock user; Low precision clock user obtains through bus and calculates good time difference data Δ T
LastAfter, carry out time difference threshold range and whether meet the judgement within the preset range, if think that time difference data can use, then time difference data Δ T
LastBe added on low precision clock user's the system clock TIMER, carry out clock correction and error compensation;
After accomplishing during the accurate school of step 4), this bus, repeat step 1), 2 at interval according to some cycles), 3) clock alignment that continues;
Step 5), for the long playing rocket system, at interval, periodically the clock system to low precision adopts the accurate calibration method of bus to calibrate local clock when need setting the school according to the reality use.
2. the calibration steps based on bus mode as claimed in claim 1 is characterized in that: the object in described high precision clock source can be a kind of high steady clock source of following type form: GPS, rubidium clock, caesium clock.
3. the calibration steps based on bus mode as claimed in claim 1 is characterized in that: described low precision clock user can be one, also can be a plurality of.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910200329 CN102096372B (en) | 2009-12-11 | 2009-12-11 | Method for calibrating satellite system clock based on bus mode |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 200910200329 CN102096372B (en) | 2009-12-11 | 2009-12-11 | Method for calibrating satellite system clock based on bus mode |
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| CN102096372A CN102096372A (en) | 2011-06-15 |
| CN102096372B true CN102096372B (en) | 2012-09-19 |
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Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102937819B (en) * | 2012-09-21 | 2015-02-11 | 北京控制工程研究所 | On-board computer time label output system |
| CN103345457B (en) * | 2013-06-06 | 2015-08-19 | 北京空间飞行器总体设计部 | The method that satellite assistance data high precision sends is guaranteed by 1553B bus |
| CN103684649A (en) * | 2013-12-13 | 2014-03-26 | 中国航空工业集团公司第六三一研究所 | 1553B bus system time synchronization method |
| CN104316047B (en) * | 2014-10-10 | 2017-05-10 | 北京控制工程研究所 | Method for automatically improving time mark precision of sensor data by utilizing GPS (global positioning system) |
| CN105045087A (en) * | 2015-07-31 | 2015-11-11 | 上海卫星工程研究所 | High-precision satellite time calibration method |
| CN107070567B (en) * | 2017-04-06 | 2020-04-10 | 中国科学院国家授时中心 | Satellite ground station inter-station time delay calibration method based on pseudo satellite |
| CN108055257A (en) * | 2017-12-08 | 2018-05-18 | 杭州和利时自动化有限公司 | A kind of FPGA auxiliary high-performance calculation methods and FPGA |
| CN110167130A (en) * | 2018-02-13 | 2019-08-23 | 华为技术有限公司 | A kind of transmission method and device of temporal information |
| CN113835334B (en) * | 2021-09-08 | 2022-09-16 | 浙江睿朗信息科技有限公司 | Calibration method for low-precision clock in multi-module product |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1117151A (en) * | 1995-01-19 | 1996-02-21 | 中国科学院武汉物理研究所 | Short-wave timing digital correlated detecting technique and short-wave self-correcting time-keeping clock |
| CN101202545A (en) * | 2007-11-13 | 2008-06-18 | 中国人民解放军63891部队 | High-accuracy data receiving time service instrument |
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2009
- 2009-12-11 CN CN 200910200329 patent/CN102096372B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1117151A (en) * | 1995-01-19 | 1996-02-21 | 中国科学院武汉物理研究所 | Short-wave timing digital correlated detecting technique and short-wave self-correcting time-keeping clock |
| CN101202545A (en) * | 2007-11-13 | 2008-06-18 | 中国人民解放军63891部队 | High-accuracy data receiving time service instrument |
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