CN102054805A - Packaging structure of flip resin circuit board chip with circumscribed radiator - Google Patents

Packaging structure of flip resin circuit board chip with circumscribed radiator Download PDF

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Publication number
CN102054805A
CN102054805A CN2010105587610A CN201010558761A CN102054805A CN 102054805 A CN102054805 A CN 102054805A CN 2010105587610 A CN2010105587610 A CN 2010105587610A CN 201010558761 A CN201010558761 A CN 201010558761A CN 102054805 A CN102054805 A CN 102054805A
Authority
CN
China
Prior art keywords
chip
circuit board
radiator
resin circuit
packaging structure
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
CN2010105587610A
Other languages
Chinese (zh)
Inventor
王新潮
梁志忠
承杰
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
JCET Group Co Ltd
Original Assignee
Jiangsu Changjiang Electronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Jiangsu Changjiang Electronics Technology Co Ltd filed Critical Jiangsu Changjiang Electronics Technology Co Ltd
Priority to CN2010105587610A priority Critical patent/CN102054805A/en
Publication of CN102054805A publication Critical patent/CN102054805A/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Abstract

The invention relates to a packaging structure of a flip resin circuit board chip with a circumscribed radiator. The packaging structure comprises the chip (3), the single-layer or multi-layer resin circuit board (9) supporting the chip, a metal projection (10) used for the interconnection of the chip and the single-layer or multi-layer resin circuit board, and a conducting or non-conducting heat-conducting bonding material I (2) between the chip and the single-layer or multi-layer resin circuit board, and is characterized in that the radiator (11) is arranged above the chip (3); a conducting or non-conducting heat-conducting bonding material II (6) is arranged between the chip and the single-layer or multi-layer resin circuit board in an embedded manner; and the chip (3) and the metal projection (10) are encapsulated in the area surrounded by the radiator (11) and the single-layer or multi-layer resin circuit board (9) through the radiator (11). The invention can provide a packaging body which has high heat radiating capability and can transfer heat of the chip to the outside fast.

Description

The resin circuit board chip-flip external radiator packaging structure
Technical field
The present invention relates to a kind of resin circuit board chip-flip external radiator packaging structure.Belong to the semiconductor packaging field.
Background technology
The radiating mode of traditional Chip Packaging form mainly be to have adopted the Metal Substrate island of chip below as heat radiation conduction instrument or approach, and there is following not enough point in the heat radiation of this conventional package mode conduction:
1, Metal Substrate island volume is too little
The Metal Substrate island is in the conventional package form, in order to pursue the reliability safety of packaging body, nearly all adopted the Metal Substrate island to be embedded in the packaging body, and in limited packaging body, to imbed the interior pin (as shown in Figures 1 and 2) of metal of Metal Substrate island and signal, power supply conduction usefulness simultaneously, very the little so effective area on Metal Substrate island and volume just seem, and the function of the heat radiation of high heat also will be served as in the Metal Substrate island simultaneously, will seem deficiency more.
2, baried type Metal Substrate island (as shown in Figures 1 and 2)
The Metal Substrate island is in the conventional package form, in order to pursue the reliability safety of packaging body, nearly all adopted the Metal Substrate island to be embedded in the packaging body, and the Metal Substrate island is about dependence or four fine support bars in corner fix or support metal Ji Dao, also because the characteristic of this fine support bar, the heat that has caused the Metal Substrate island to be absorbed from the chip, can't conduct out from fine support bar fast, so the heat of chip can't or be transmitted to the packaging body external world fast, caused the life-span quick aging of chip even burn or burnt out.
3, Metal Substrate island exposed type (as shown in Figures 3 and 4)
Though expose on the Metal Substrate island, can provide also will good heat-sinking capability than the heat sinking function of baried type, because the volume on Metal Substrate island and area still very little in packaging body, so heat dissipation capability can be provided, still very limited.
Summary of the invention
The objective of the invention is to overcome above-mentioned deficiency, providing a kind of can provide heat dissipation capability strong resin circuit board chip-flip external radiator packaging structure.
The object of the present invention is achieved like this: a kind of resin circuit board chip-flip external radiator packaging structure, include chip, the single or multiple lift resin circuit board that is carried of chip below, metal coupling and the conduction between chip and the described single or multiple lift resin circuit board or the nonconducting heat conduction bonding material I that chip is used to the signal interconnection of single or multiple lift resin circuit board, it is characterized in that above described chip, being provided with radiator, be equipped with conduction or nonconducting heat conduction bonding material II between this radiator and the described chip; This radiator is encapsulated in described chip and metal coupling in the zone that is surrounded by this radiator and described single or multiple lift resin circuit board.
The invention has the beneficial effects as follows:
The present invention serves as the function of the heat radiation of high heat by addition radiator above chip, can provide heat dissipation capability strong, makes the heat of chip can be transmitted to the packaging body external world fast.Can be applied in and make it become height or superelevation heat radiation (High Thermal or Super High Thermal) ability on the packaging body of general packing forms and the packaging technology, can become SHT-FBP/QFN as FBP can become SHT-QFN/BGA and can become SHT-BGA/CSP and can become SHT-CSP ...Avoided the life-span quick aging of chip even burn or burnt out.
Description of drawings
Fig. 1 is Metal Substrate island baried type chip-packaging structure schematic diagram in the past.
Fig. 2 is the vertical view of Fig. 1.
Fig. 3 is Metal Substrate island exposed type chip-packaging structure schematic diagram in the past.
Fig. 4 is the vertical view of Fig. 3.
Fig. 5 is resin circuit board chip-flip external radiator packaging structure embodiment 1 schematic diagram of the present invention.
Fig. 6 is resin circuit board chip-flip external radiator packaging structure embodiment 2 schematic diagrames of the present invention.
Reference numeral among the figure:
Conduction or nonconducting heat conduction bonding material I 2, chip 3, conduction or nonconducting heat conduction bonding material II 6, resin circuit board 9, metal coupling 10, radiator 11.
Embodiment
Embodiment 1:
Referring to Fig. 5, Fig. 5 is resin circuit board chip-flip external radiator packaging structure embodiment 1 schematic diagram of the present invention.As seen from Figure 5, resin circuit board chip-flip external radiator packaging structure of the present invention includes chip 3, the single or multiple lift resin circuit board 9 that is carried of chip below, metal coupling 10 and the chip that chip is used to the signal interconnection of single or multiple lift resin circuit board 3And the conduction between the described single or multiple lift resin circuit board or nonconducting heat conduction bonding material I 2 are provided with radiator 11 above described chip 3, are equipped with conduction or nonconducting heat conduction bonding material II 6 between this radiator 11 and the described chip 3; This radiator 11 is encapsulated in described chip 3 and metal coupling 10 in the zone that is surrounded by this radiator 11 and described single or multiple lift resin circuit board 9.
The material of described metal coupling 10 can be tin, gold or alloy etc.
The material of described radiator 11 can be copper, aluminium, pottery or alloy etc.
Embodiment 2:
Embodiment 2 only is with the difference of embodiment 1: described radiator 11 is heating panel, and need not described chip 3 and metal coupling 10 are sealed, as Fig. 6.

Claims (5)

1. resin circuit board chip-flip external radiator packaging structure, include the single or multiple lift resin circuit board (9) that is carried of chip (3), chip below, metal coupling (10) that chip is used to the signal interconnection of single or multiple lift resin circuit board and conduction or the nonconducting heat conduction bonding material I (2) between chip and the described single or multiple lift resin circuit board, it is characterized in that being provided with radiator (11), be equipped with conduction or nonconducting heat conduction bonding material II (6) between this radiator (11) and the described chip (3) in described chip (3) top.
2. a kind of resin circuit board chip-flip external radiator packaging structure according to claim 1 is characterized in that described radiator (11) is a heating panel.
3. a kind of resin circuit board chip-flip external radiator packaging structure according to claim 1 is characterized in that radiator (11) is encapsulated in described chip (3) and metal coupling (10) in the zone that is surrounded by this radiator (11) and described single or multiple lift resin circuit board (9).
4. a kind of resin circuit board chip-flip external radiator packaging structure according to claim 1, the material that it is characterized in that described metal coupling (10) is tin, gold or alloy.
5. a kind of resin circuit board chip-flip external radiator packaging structure according to claim 1, the material that it is characterized in that described radiator (11) is copper, aluminium, pottery or alloy.
CN2010105587610A 2010-01-30 2010-11-25 Packaging structure of flip resin circuit board chip with circumscribed radiator Pending CN102054805A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN2010105587610A CN102054805A (en) 2010-01-30 2010-11-25 Packaging structure of flip resin circuit board chip with circumscribed radiator

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
CN201010117852.0 2010-01-30
CN201010117815.X 2010-01-30
CN201010117852 2010-01-30
CN201010117815 2010-01-30
CN2010105587610A CN102054805A (en) 2010-01-30 2010-11-25 Packaging structure of flip resin circuit board chip with circumscribed radiator

Publications (1)

Publication Number Publication Date
CN102054805A true CN102054805A (en) 2011-05-11

Family

ID=43958982

Family Applications (1)

Application Number Title Priority Date Filing Date
CN2010105587610A Pending CN102054805A (en) 2010-01-30 2010-11-25 Packaging structure of flip resin circuit board chip with circumscribed radiator

Country Status (1)

Country Link
CN (1) CN102054805A (en)

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05299544A (en) * 1992-04-20 1993-11-12 Hitachi Ltd Semiconductor device
US5814536A (en) * 1995-12-27 1998-09-29 Lsi Logic Corporation Method of manufacturing powdered metal heat sinks having increased surface area
CN1355564A (en) * 2000-11-24 2002-06-26 矽品精密工业股份有限公司 Semiconductor package and its making method
CN1630073A (en) * 2003-12-19 2005-06-22 威宇科技测试封装有限公司 Chip ball grid array packaging structure
CN101221944A (en) * 2007-01-09 2008-07-16 矽品精密工业股份有限公司 Cooling type semiconductor packaging member

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH05299544A (en) * 1992-04-20 1993-11-12 Hitachi Ltd Semiconductor device
US5814536A (en) * 1995-12-27 1998-09-29 Lsi Logic Corporation Method of manufacturing powdered metal heat sinks having increased surface area
CN1355564A (en) * 2000-11-24 2002-06-26 矽品精密工业股份有限公司 Semiconductor package and its making method
CN1630073A (en) * 2003-12-19 2005-06-22 威宇科技测试封装有限公司 Chip ball grid array packaging structure
CN101221944A (en) * 2007-01-09 2008-07-16 矽品精密工业股份有限公司 Cooling type semiconductor packaging member

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Application publication date: 20110511