CN102037547A - 形成含纳米丛集介电层的方法及包括上述介电层的装置 - Google Patents
形成含纳米丛集介电层的方法及包括上述介电层的装置 Download PDFInfo
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- CN102037547A CN102037547A CN2009801157271A CN200980115727A CN102037547A CN 102037547 A CN102037547 A CN 102037547A CN 2009801157271 A CN2009801157271 A CN 2009801157271A CN 200980115727 A CN200980115727 A CN 200980115727A CN 102037547 A CN102037547 A CN 102037547A
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Abstract
本发明揭示一种于半导体装置(300)的额外层(114,320)上形成介电层(300)的方法。该方法包括于额外层(114,320)上方沉积介电前驱化合物和额外前驱化合物,介电前驱化合物包括择自由钇系元素和镧系元素组成的族群的金属离子,且额外前驱化合物包括择自由第四族金属和第五族金属组成的族群的金属离子;将介电前驱化合物和额外前驱化合物分别化学转变为介电化合物和额外化合物,额外化合物于转变期间自我组装为多个纳米丛集核心(335),位于由上述介电前驱化合物形成的上述介电层(330)内。因此形成具有优异电荷捕捉能力的一介电层。这一种介电层特别适合用于例如非易失性存储器的半导体装置。
Description
技术领域
本发明涉及一种于一半导体装置的一额外层上形成一含纳米丛集介电层的方法。
本发明尤其涉及一种包括上述一介电层的半导体装置。
背景技术
半导体元件的不间断地微型化,触发半导体元件的新材料和新设计的研发,以克服关于上述半导体元件微型化的问题。举例来说,例如晶体管和存储器晶胞的半导体元件中介电层的层厚度降低,不仅会增加元件的开关速度,而且会增加穿过上述介电层的漏电。为了克服漏电问题,使用所谓的高介电常数材料做为介电层。这些材料具有实质上高于氧化硅的介电常数的一介电常数。有时,一高介电常数材料定义为介电常数至少为五的一材料。
理想地,结合一高介电常数(k)的一介电材料具有一高介电击穿电场(EBD),例如以促进使用上述介电材料为例如晶体管的半导体元件中的栅极氧化层,或一电容中的介电层。对于一同质介电薄膜的这些参数之间经验上的关系规定为:
因此,可以看到的是得到一适当的介电材料对应于得到上述材料的介电击穿和介电特性之间一良好的权衡关系。此外,明显的是上述同质介电薄膜,不管是一非晶形式或是一结晶形式,具有一特性限制,其会禁止上述材料的在高性能领域及/或进一步深次微米工艺的使用。
美国专利公开号US 2005/0067651揭示用于半导体元的数个堆叠介电层,其由镧系元素氧化物形成,例如氧化锆(ZrO2)和例如氧化镨(Pr2O3)、氧化钕(Nd2O3)、氧化钐(Sm2O3)、氧化钆(Gd2O3)、氧化镝(Dy2O3)和镨钛氧化物(PrTixOy),其中x和y为变数且于1.0x对0.9-1.0y的范围内。上述堆叠介电层。上述堆叠层,其可使用反应式连续原子层沉积法(RS-ALD,也为已知的原子层沉积法(ALD))技术成长,具有一较高的结合介电常数,例如k=12-24,依据使用的层厚度而定。
然而,一问题为上述堆叠介电层表现出麦克斯韦-瓦格纳效应(Maxwell-Wagner effect),其意指上述堆叠介电层的击穿电场不会被改善。
起因于半导体元件的不间断地微型化的一个问题为在例如一非易失性存储器晶胞的一半导体元件的一电荷保存层的足够电荷保存能力的问题。这种晶胞阵列可具有内嵌于一互补式金属氧化物半导体晶体管元件的一栅极氧化物中的一浮置栅极结构,其中每当有需要时可以存储或抽出电荷以写入或读取信息。图1表示具有一浮置栅极配置的一典型公知非易失性存储器晶胞。上述晶胞包括基板110,其中利用一沟道120隔开一源极112和一漏极116。一穿隧氧化层120覆盖上述沟道116,且上述穿隧氧化层120被一浮置栅极氧化物130和一接触氧化物140覆盖。上述穿隧氧化层120可为一高介电常数氧化材料以促进具有一增加的厚度和改善的电荷保存能力的一穿隧氧化层120的使用性。在上述非易失性存储器晶胞存储电荷的期间,电荷125利用富尔-诺罕穿隧工艺(Fowler-Nordheim tunneling process)穿隧过上述穿隧氧化层120,且聚集于上述穿隧氧化层120和上述浮置栅极氧化物130之间的上述界面上。这些电子会维持在位于上述界面直到对漏极施加一反向偏压,以抽出上述电子。此为这种非易失性存储器晶胞的抹除机制。
关于元件的不间断地微型化的问题的其中之一为当薄化上述浮置栅极氧化物130时,存储于上述浮置栅极氧化物130和上述穿隧氧化层120之间的上述界面的电荷会开始漏失,其会威胁上述晶胞的电荷保存能力和可靠度。此外,当上述晶胞的表面面积也微型化时,减少可以存储于上述晶胞中的电荷数量。此情形也会威胁上述晶胞的电荷保存能力和可靠度。
在最糟情况的局面中,其可于例如45纳米的互补式金属氧化物半导体晶体管(CMOS45)的深次微米工艺中变为事实,可存储于具有45*45*10纳米(长*宽*厚度)尺寸的浮置栅极层中的电荷总数量会被限制为在单位晶胞中有2.5个电子,其基于1015电荷/平方公分(charges/cm2)的典型界面电荷密度,且假设电荷仅聚集于上述界面。此外,浮置栅极下方的穿隧氧化层会消耗功率,在假设穿隧氧化层包含缺陷的情形下,上述缺陷在写入或读取存储信息时会捕捉电荷。这些为非易失性存储器工艺微型化的主要障碍。
利用美国专利公开号US 2005/0067651的堆叠介电层仍不足以解决上述问题,因为电荷保存会产生于氧化锆(ZrO2)和上述镧氧化物之间的界面上,上述镧氧化物不会增加这一层的电荷存储能力。
在美国专利公开号US 2005/0067651中,揭示一非易失性存储器晶胞,其使用位于上述穿隧氧化层上方的多个介电纳米丛集。利用于上述穿隧氧化层上方沉积一电荷捕捉介电层,且于上述电荷捕捉介电层上方形成纳米点的方式形成多个介电纳米丛集。使用上述纳米点做为一蚀刻掩模,依序图案化上述电荷捕捉介电层为多柱状纳米丛集,之后形成一栅极介电质,以使上述纳米丛集嵌入于上述介电层中。虽然这种非易失性存储器晶胞包括改善的电荷捕捉能力,但其制造麻烦且昂贵。
发明内容
本发明试图提供一种于一半导体装置的一额外层上形成一改善的介电层的方法。
本发明还试图提供一种改善的半导体装置。
依据本发明的第一实施例,提供一种于一半导体装置的一额外层上形成一改善的介电层的方法,上述方法包括于上述额外层上方沉积一介电前驱化合物和一额外前驱化合物,上述介电前驱化合物包括择自由钇系元素和镧系元素组成的族群的一金属离子,且上述额外前驱化合物包括择自由第四族金属和第五族金属组成的族群的一金属离子;以及将上述介电前驱化合物和上述额外前驱化合物分别化学转变为一介电化合物和一额外化合物,上述额外化合物于上述转变期间自我组装(self-assembly)为多个纳米丛集核心,位于由上述介电前驱化合物形成的上述介电层内。
已发现上述前驱化合物会导致于由钇或镧化合物形成的一介电基质中的第四族金属和第五族金属氧化物或金属氮化物的纳米丛集的自发的自我组装,上述钇或镧化合物为介电质,意即在本质上为非金属的,例如钇或镧氧化物。因此,当使用这种材料的组合时,不需图案化步骤,因而相较于美国专利公开号US 2005/0067651揭示的工艺明显简化工艺。以此方式形成的纳米丛集在本质上可为介电质或金属。
此外,相较于美国专利公开号US 2005/0067651的纳米丛柱结构,具有高表面积的上述纳米丛集意谓本发明的介电层具有改善的电荷保存能力。另外,上述丛集增加一半导体装置的击穿现象的机率路径(percolation path),上述装置产生的击穿现象也会增加,其意谓当维持一高介电常数时,本发明的介电层相较于美国专利公开号US 2005/0067651具有改善的击穿特性。
虽然上述制造方法可应用于任何电荷捕捉介电层,特别的优点为如果上述半导体额外层包括一沟道区,其中上述介电层沉积于上述沟道区上方时,上述方法还包括于上述介电层上方沉积一额外介电层,因而形成一非易失性存储器晶胞,其表现出优异的电荷捕捉行为。然而,数个其他实施例包括形成一晶体管,其包括本发明的上述介电层,上述介电层做为一栅极氧化物,或形成一电容,其使用本发明的上述介电层做为电极板之间的一绝缘物。包括依据本发明的一介电层的半导体装置的其他适当实施例对本领域普通技术人员为显而易见。
在一实施例中,上述介电前驱化合物的上述金属离子为一镧离子,且上述额外前驱化合物的金属离子为一锆离子。已发现镧和锆的组合会在镧基基质中引起锆基纳米丛集明显的自我组装。最后,上述介电前驱化合物包括一第一有机金属前驱物,且上述额外前驱化合物包括一额外有机金属前驱物,例如,三(2,2,6,6-四甲基-3,5-庚二酮酸)镧(tris(2,2,6,6-tetramethyl-3,5-heptanedionato)-lanthanum)和二(甲基-η5-环戊二烯基)甲基-甲氧基(IV)锆(bis(methyl-η5-cyclopentadienyl)methyl-methoxy(IV)zirconium)为适当的前驱化合物。
较佳地,沉积上述介电前驱化合物、沉积上述额外前驱化合物和各自化学转变的上述些步骤为一原子层沉积(ALD)工艺的一循环的分离步骤。已发现,原子层沉积工艺的使用产生优异的纳米丛集自我组装。然而,预期例如化学气相沉积法(CVD)、等离子体增强型化学气相沉积法(plasma-enhancedCVD)、和等离子体辅助原子层沉积法(plasma-assisted ALD)的其他以前驱物为基础的沉积工艺会产生类似的结果,因为在这些工艺中,前驱化合物下的化学转变工艺类似于原子层沉积工艺。
原子层沉积工艺可包括多个工艺循环,且在沉积上述额外介电前驱化合物之前可重多次沉积一介电前驱化合物和化学转变上述介电前驱化合物的步骤,或者在沉积上述介电前驱化合物之前可重多次沉积一额外介电前驱化合物和化学转变上述额外介电前驱化合物的步骤。上述方式,可控制上述介电材料和和上述纳米丛集的比值。
较佳地,如果发生使用一锆基额外介电前驱化合物,在上述介电层中的上述锆含量至少为上述介电层的总金属含量的重量的30%。已发现,在这种锆分级之下,锆基纳米丛集的自我组装变得特别完全。
依据本发明的又一实施例,提供一种半导体装置包括一介电层,包括择自由钇系元素和镧系元素组成的族群的一金属,上述介电层包括包含择自由第四族金属和第五族金属组成的族群多个纳米丛集核心。
在例如上述介电层的上述金属氧化物基质中的具有自我组装纳米丛集的上述半导体装置具有优异的电荷捕捉能力,因为上述纳米丛集的上述表面具有电荷捕捉特性。此外,指出因为一自我组装的纳米丛集具有大于美国专利公开号US 2005/0067651揭示的柱形纳米结构的一表面积对体积比值,相较于此先前技术,本发明的上述纳米丛集基础的半导体装置具有改善的电荷捕捉能力。已于先前讨论,上述半导体装置可为包括一介电层的任何元件,例如一晶体管或一电容。
在一实施例中,上述半导体装置包括被上述介电层覆盖的一沟道区,上述介电层被一额外介电层覆盖。因此,可配置上述半导体装置以操作为一非易失性存储器,其中上述介电层作用为一穿隧氧化层,且上述内嵌纳米丛集作用为电荷捕捉界面,因而提供一种具有优异的电荷捕捉能力的上述半导体装置。
在一实施例中,上述介电层包括一非晶态氧化镧(La2O3)基质,且其中上述纳米丛集包括氧化锆(ZrO2)。较佳地,上述介电层中的上述锆含量至少为30%重量百分比,如先前的解释。
依据本发明的多个半导体装置可形成一存储器装置。上述存储器装置具有优异的电荷保持特性,且因此实现在上述存储器装置中,提供使工艺进一步微型化的一适当设计。
附图说明
本发明多种实施例的详细说明可搭配图示而彻底了解,其中:
图1为一公知非易失性存储器的示意图;
图2a-图2f为一原子层沉积工艺的示意图;
图3为借由本发明实施例的方法得到的一半导体装置的示意图;
图4为穿过一公知的介电层和穿过依据本发明实施例的一介电层的漏电流效应的效果;
图5和图6为在不同镧∶锆比例下依据本发明实施例形成的一介电层的X光绕射图谱;
图7为依据本发明实施例形成的一介电层中的锆含量和自我组装的纳米丛集的尺寸之间的预测相关值;
图8为依据本发明实施例形成的一介电层的一高解析度穿透式电子显微镜图像;
图9为依据本发明实施例形成的一介电层的另一高解析度穿透式电子显微镜图像;
图10为氧化镧介电层中的氧化锆纳米丛集尺寸和击穿电场之间的关系;以及
图11为内嵌于氧化镧的的氧化锆纳米丛集在不同镧∶锆脉冲比例下的电性。
具体实施方式
应了解说明书的附图仅为示意图而并未依照比率示出。也应了解在附图或说明书描述中,相似或相同的部分均使用相同的附图标记。
图2a-图2f为使用原子层沉积(ALD)工艺形成一介电层的示意图。在图2a中,一功能性基板200具有带氢氧基的一表面210。一介电前驱材料220包括有一反应化合物,例如为被有机配体(organic ligand)或例如卤化物的其他适当取代基包围的一金属离子,被脉冲输送于功能性基板200的表面210上方。
如图2b所示,这样会于其中引起一化学反应,从上述介电前驱材料220移除的取代基会被上述介电前驱材料220中的上述金属离子和基板表面210上的氢氧基之间的一键结取代。这种反应会改变上述金属离子的氧化态。上述反应通常会被下述事实驱动,金属取代基键结为一较弱的键结,且金属对氧原子的结合具有较高的亲和力,以使全部的反应的吉布斯自由能(Gibbsfree energy)(ΔG)为负值。介电前驱化合物220在表面210的有效覆盖率依据数个因子而定,例如取代基的尺寸和基板表面210暴露的持续时间。
在下一步骤中,如图2c所示,上述基板暴露于一氧气源中,例如水(H2O)、臭氧(O3)、等离子体产生的氧自由基(oxygen radical)或其他适当的氧气源会将介电前驱化合物220剩下的取代基用氧取代,因而会于基板表面210上方形成一介电层230。重申的是,这个介电层230可仅为不完全覆盖是因为表面210上缺乏反应的氢氧基或因为介电前驱化合物220的配体之间的空间障碍物,所以会禁止与表面210上每一个可用的反应基反应。因此,如图2a-图2c所示的步骤可重多次以成长上述介电层至一足够的覆盖率及/或厚度。
接着,可于上述介电层230的上方成长一不同介电质。为这目的,可重复如图2a-图2c所描述的步骤,但使用一额外介电前驱材料240,如图2D所示。如图2e所示,这种额外介电前驱化合物240与介电层220及/或基板200的表面210的可用的氧位置(oxide site)反应,如图2f所示,之后,利用暴露于一氧气源的方式使上述额外介电前驱化合物240转变成为一额外介电材料250。例如为了借由额外介电材料250改善介电层230的覆盖率及/或为了增加额外介电材料250的厚度或重量部分,在重复如图2a-2c所示的步骤之前可重多次如图2d-图2f所示的步骤。
对于本领域普通技术人员显而易见的是,虽然上述原子层沉积工艺于前驱化合物220和240与一氧气源的反应方面已被描述,但上述工艺可应用于前驱化合物与任何取代基的反应,其会导致前驱化合物的配体的取代,例如氮化物。在这种实施例中,在图2c和图2f中的氧气源可以例如氨气(NH3)的氮气源取代。
依据本发明的实施,已发现如果在上述第一介电前驱化合物220中的上述金属离子择自由钇元素(Yttrium)和镧(Lanthanide)元素组成的族群,且在上述额外介电前驱化合物240中的上述金属离子择自由第四族元素和第五族元素组成的族群,图2c和图2f的转变反应会于上述额外介电材料250中导致一成核工艺,因而致使上述额外介电材料250在第一介电材料230的基质(matrix)中自我组装(self-assembly)为纳米丛集(nanocluster)。一含镧第一介电前驱化合物220和一含锆介电前驱化合物240已做为实施例,且如果由各自的族群选择的其他元素可预测到类似的行为,因为从各自的族群的不同元素之间的行为中有公知的相似处。此一工艺的不同实施例如下所示。
例子
在一ASM公司热壁(hot-wall),型号cross-flow2000的原子层沉积(ALD)反应机台中,于p型200纳米(nm)且电阻值为3-10欧姆-公分(Ω-cm)的硅(100)基板上沉积不同镧∶锆(La∶Zr)脉冲比值(1∶0,12∶1,4∶1,1∶4,1∶9和0∶1)的氧化镧(La2O3)和氧化锆(ZrO2)的薄膜。三(2,2,6,6-四甲基-3,5-庚二酮酸)镧(tris(2,2,6,6-tetramethyl-3,5-heptanedionato)-lanthanum)(La(thd)3)和二(甲基-η5-环戊二烯基)甲基-甲氧基(IV)锆(bis(methyl-η5-cyclopentadienyl)methyl-methoxy(IV)zirconium)(ZrD-04)分别做为沉积氧化镧(La2O3)和氧化锆(ZrO2)的前驱物,且臭氧(O3)做为氧化剂。于300℃的温度下沉积上述薄膜。可以检测到上述薄膜的氧化致使于不同氧化镧(La2O3)和氧化锆(ZrO2)的相中形成一镧锆氧化物(LayZr1-yOx)层。利用改变La(thd)3和ZrD-04前驱物的脉冲比值的方式改变镧锆氧化物(LayZr1-yOx)层中的成份。氧化镧(La2O3)和氧化锆(ZrO2))彼此不同的沉积速率和氧化镧(La2O3)和氧化锆(ZrO2)彼此的顶部成核行为会导致不同厚度的试样。已发现内嵌于氧化镧(La2O3)层的氧化锆(ZrO2)纳米丛集表现出约40的介电常数,其进一步表现出优异的击穿特性(参见下述)。
图3为包括一氧化镧(La2O3)介电层330中内嵌有氧化锆(ZrO2)纳米丛集340的一半导体装置300的示意图。可借由前述例子得到此介电层。在图3中的半导体装置300为一非易失性存储器晶胞,但可了解的是本发明并非限于非易失性存储器晶胞,且可应用于需要一电荷保存层的任何元件,例如一电容元件。上述半导体装置300还包括一基板110,其中一源极112和一漏极116借由一沟道114隔开。上述基板110可为任何适当的基板。这些工艺步骤并非为本发明的中心。
半导体装置220包括介于介电层330和沟道114之间的一穿隧氧化层320。上述穿隧氧化层320可为任何适当材料,例如一高介电常数(high-k)材料,的一独立氧化层。举例来说,氧化镧(La2O3)为一适当的高介电常数(high-k)材料,因为40纳米厚度的氧化镧(La2O3)具有10纳米厚的一二氧化硅(SiO2)氧化物等效厚度。因此,这种高介电常数(high-k)材料可用以形成一更厚的穿隧氧化层而不需增加等效的二氧化硅(SiO2)厚度,因而降低穿隧引起的漏电穿过上述层。在其他实施例中,上述穿隧氧化层320可为介电层330的一区域,且可在使用锆前驱物脉冲之前,在原子层沉积工艺中,利用重复镧前驱物脉冲数次的方式形成上述穿隧氧化层320。在本实施例中,介电层330也可做为穿隧氧化层320,且可由在非晶氧化镧(La2O3)基质330中的氧化锆(ZrO2)电荷保存纳米丛集335形成电荷保存’层’。上述介电层330通常被任何适当的接触栅极氧化物140覆盖。
在含锆前驱物转变为氧化锆(ZrO2)的期间,于一成核工艺中同时形成上述结晶氧化锆(ZrO2)纳米丛集335。四角形的氧化锆(ZrO2)结晶似乎支配结晶形状。已发现以此方式形成的内嵌于介电层330的纳米丛集335为热稳定。利用暴露上述层330于数个在温度T等于400℃的退火步骤的方式测试上述热稳定,上述退火步骤不会导致介电层330或其中的纳米丛集335任何显著的衰减。
在原子层沉积工艺中,于氧化镧(La2O3)基质内部的上述结晶氧化锆(ZrO2)纳米丛集335可维持小于2纳米(nm),因而提供具有优于美国专利公开号US2005/0067651揭示的公知的纳米丛集的表面对体积比值的电荷保存纳米丛集。上述非常重要,因为穿隧通过穿隧氧化层320的电荷125聚集于纳米丛集335的表面区域,其意谓本发明实施例的纳米丛集成核物335在单位体积下可保留更多电荷。
美国专利公开号US 2005/0067651与本发明实施例的又一差别为一纳米丛集335的对称轴会具有一方向,其独立于另一个纳米丛集335的对称轴的方向,因而在上述介电层330各处的上述轴会产生一随机分布,反之美国专利公开号US 2005/0067651的纳米丛集通常共用对称轴的同一方向。
图4描述穿过一公知的介电层和穿过包含氧化锆(ZrO2)纳米丛集335的氧化镧(La2O3)薄膜420的漏电流效果为穿过上述薄膜的一外加电场的一函数。在上述薄膜中的镧∶锆(La∶Zr)比值为1∶1。无疑的,于包含氧化锆(ZrO2)纳米丛集335的氧化镧(La2O3)薄膜420中发生磁滞效应(hysteresis effect)。这是由纳米丛集335的表面捕捉电荷导致而成。
可使用不同数量的原子层沉积工艺循环以改变介电层330的厚度。表I显示上述变异的效果,其中原子层沉积工艺循环的数量和每一个原子层沉积工艺循环的脉冲比值两者做变化。
表I
表I的第一栏列出脉冲比值,意即在沉积另一金属的前驱化合物之前,一金属的前驱化合物的沉积和转变连续重复的数量。第二栏和第三栏列出分别利用拉塞福背向散射分析仪(RBS)和X光光电子能谱仪(XPS)测定的镧对镧+锆的比值,以及第四栏列出利用椭圆仪测定的介电层330的24个不同位置的厚度平均值(nm)。列于表I中的不同层的厚度变异小于±5%。
表I清楚地证明可于具有不同厚度的介电层330中形成纳米丛集335。
图5和图6为介电层330在不同镧∶锆(La∶Zr)比值下的X光绕射图谱。从X轴突出的线意指四角形的氧化锆(ZrO2)的理论绕射线。在图5中,介电层330的图谱具有一1∶0的镧∶锆(La∶Zr)比值(图谱线510)、一4∶1的镧∶锆(La∶Zr)比值(图谱线520)和一1∶1的镧∶锆(La∶Zr)比值(图谱线530)的比较。可从在2θ≈30°的图谱线看见在介电层330中增加锆含量得到的此相角的绕射强度增加。上述绕射与四角形的氧化锆(ZrO2)的理论预测绕射线一致,因而提供于氧化镧(La2O3)基质中形成氧化锆(ZrO2)的一个清楚的指示。
在图6中,上述图谱具有一1∶4镧∶锆(La∶Zr)的比值、一1∶9的镧∶锆(La∶Zr)比值和一0∶1的镧∶锆(La∶Zr)比值(图谱线610)的比较。立即显而易见的上述图谱实质上为类似,因而提供于介电层330中出现大量的四角形的氧化锆(ZrO2)的一个清楚证据。
可使用德拜-谢乐公式(Debye-Scherrer formula)得到氧化锆(ZrO2)丛集尺寸的粗略评估。上述公式给予在强度掉至最大值的一半时的绕射峰的半宽度(half-width)β和与x光在一(理想晶体)晶面的反射面垂直的晶体长度之间的关系,为:
图7描述此评估结果,其显示氧化锆(ZrO2)丛集尺寸为锆含量的函数其为总金属含量(意即镧加锆(La+Zr))的一重量百分比。图7清楚预测四角形的氧化锆(ZrO2)纳米丛集335的丛集尺寸和锆含量之间的一线性相关性。基于此关系,可预料的是,全部的锆含量应至少为30%,以于氧化镧(La2O3)介电层330中得到四角形的氧化锆(ZrO2)纳米丛集335。可利用使用至多9∶1的一镧∶锆(La∶Zr)脉冲比值,意即在每一个氧化锆(ZrO2)前驱物脉冲下不多于九个氧化镧(La2O3)前驱物脉冲,且使用上述实施例的前驱物的方式,于一原子层沉积工艺中得到这种含量。如果锆含量低于30%,用这些前驱物可得到均匀的镧锆氧化物(LayZr1-yOx)层,其至少为德拜-谢乐公式(Debye-Scherrerformula)所预测。在一实施例中,选择镧∶锆(La∶Zr)脉冲比值于从9∶1至1∶9的范围中,因为在上述范围中形成的氧化锆(ZrO2)纳米丛集具有特别好的表面对体积比值。
然而,应了解用于给定例子中的前驱物化合物上述比值对的特定值,且不同的前驱物化合物可需要不同优先的脉冲比值和纳米丛集金属含量。
于上述要点,注意的是,可以相信介于形成的纳米丛集之间的驱动力,具有形成纳米丛集的材料会形成一结晶层结构的趋势。上述趋势保证,意即在上述原子层沉积脉冲工艺中,会以一不足的连续循环的数量沉积上述介电层前驱物及/或纳米丛集前驱物的任一个或两者,以完全覆盖上述下方层或基板,以使于上述下方层沉积一前驱物的岛状物,而不是一完全覆盖的前驱物层。可以相信会触发上述额外前驱物的自我组装到上述结晶纳米丛集中,因为把此视为一更稳定的结构,上述结构中形成前驱物的绕射岛状物。为这目的,较佳为上述介电层前驱物和上述额外前驱物化合物的脉冲比值为不均衡,例如4∶1或1∶9,以使至少一个的化合物无法形成一完全覆盖层。
反之,由于美国专利公开号US 2005/0067651把具有数个纳米丛集厚度的堆叠层的形成方式做为目标,通常对每一层施加数个连续脉冲循环,因而保证以一后续层完全覆盖一先前层,在本例中不会看到纳米丛集的形成,说明理由如上述。
可想象使用许多适当的前驱物化合物,以于介电层330中形成介电或金属纳米丛集335。例如,其他环戊二烯基基配体(other cyclopentadienyl-basedligands)、锆卤化物(Zr halides)、铪卤化物(Hf halides)和四-(乙基甲基胺基酸)-锆(tetrakis(ethylmethylamino)-Zr(Zr-TEMA))。
图8为具有1∶4的镧∶锆(La∶Zr)脉冲比值的介电层330的一高解析度穿透式电子显微镜(HRTEM)图像。层800为沉积于介电层330上方的一铂电极。介电层中的黑点意指出现的氧化锆(ZrO2)纳米丛集335,因而提供如果锆含量为30%时,纳米丛集实际上自我组装的证据。
图9为图8的纳米丛集335的一高解析度穿透式电子显微镜图像,其中一莫尔条纹(MoiréPattern)900为清晰可见。这是因为介电层330中纳米丛集335的不同取向(orientation)而致。
图10为氧化镧(La2O3)介电层中的氧化锆(ZrO2)纳米丛集尺寸和击穿电场之间的直接关系。x轴以纳米(nm)表示氧化锆(ZrO2)纳米丛集的平均尺寸,且y轴以千伏/公分(MV/cm)表示氧化镧(La2O3)介电层的击穿电场。为使击穿特性最佳化,需要保持小的丛集尺寸,清楚地指出纳米丛集的总表面积和击穿电场之间的关系。
图11为不同镧∶锆比例的不同氧化镧(La2O3)介电层的电性。上述氧化镧(La2O3)介电层中存在的氧化锆(ZrO2)纳米丛集的镧∶锆比例为4∶1、1∶1、1∶4、1∶9。y轴表示介电击穿电场平方和介电常数((EBD)2.k)的乘积,且水平线意指以方程式(1)决定的一介电层的理论最佳可做极限(best-can-do limit),方程式(1)为假设击穿电场平方和介电常数(EBD 2.k)乘积为最大值,因而意指击穿特性和关注的介电材料的介电常数之间一最佳可能的权衡。清楚证明,在上述氧化镧(La2O3)介电层中存在的氧化锆(ZrO2)纳米丛集会导致上述介电层具有胜过理论’最佳可做’极限的一电性。
应了解的是,上述实施例做列示之用而并非用以限制本发明,本领域普通技术人员应能知悉,在不脱离本发明的精神与范畴的前提下,当做些许更动,本发明的范畴以所述的权利要求为准。在权利要求中,置于圆括号之间的任何元件符号不应解释为限制上述申请专利范围。“包括”一词并非排除除了列于权利要求之外出现的元件或步骤。前置于一元件的词“一”并非排除出现的多个元件。不争的事实为陈述于彼此不同的从属权利要求的某些方法并非意指不能使用这些方法的组合使处于优势。
Claims (15)
1.一种于一半导体装置(300)的一额外层(114,320)上形成一介电层(300)的方法,该方法包括:
于该额外层(114,320)上方沉积一介电前驱化合物和一额外前驱化合物,该介电前驱化合物包括择自由钇系元素和镧系元素组成的族群的一金属离子,且该额外前驱化合物包括择自由第四族金属和第五族金属组成的族群的一金属离子;以及
将该介电前驱化合物和该额外前驱化合物分别化学转变为一介电化合物和一额外化合物,该额外化合物于该转变期间自我组装为多个纳米丛集核心(335),位于由该介电前驱化合物形成的该介电层(330)内。
2.如权利要求1所述的方法,其中该额外层包括一沟道区(114),其中该介电层(320,330)沉积于该沟道区(114)上方,该方法还包括于该介电层(330)上方沉积一额外介电层(140)。
3.如权利要求1或2所述的方法,其中该介电前驱化合物的该金属离子为一镧离子,且该额外前驱化合物的金属离子为一锆离子。
4.如权利要求3所述的方法,其中该介电前驱化合物包括一第一有机金属前驱物,较佳为三(2,2,6,6-四甲基-3,5-庚二酮酸)镧,且该额外前驱化合物包括一额外有机金属前驱物,较佳为二(甲基-η5-环戊二烯基)甲基-甲氧基(IV)锆。
5.如权利要求1-4的任意一项所述的方法,其中沉积该介电前驱化合物、沉积该额外前驱化合物和各自化学转变的所述步骤为一原子层沉积工艺的一循环的分离步骤。
6.如权利要求5所述的方法,其中该原子层沉积工艺包括多个循环。
7.如权利要求1或6所述的方法,其中在沉积该额外前驱化合物之前,重多次沉积该介电前驱化合物和化学转变该介电前驱化合物的所述步骤。
8.如权利要求1、6或7所述的方法,其中在沉积该介电前驱化合物之前,重多次沉积该介电前驱化合物和化学转变该额外前驱化合物的所述步骤。
9.如权利要求8所述的方法,其中该介电层(330)的含锆量至少为该介电层(330)的金属总含量的30%重量百分比。
10.一种半导体装置(300),包括:
一介电层(330),包括择自由钇系元素和镧系元素组成的族群的一金属,该介电层(330)包括包含择自由第四族金属和第五族金属组成的族群多个纳米丛集核心(335)。
11.如权利要求10所述的半导体装置(300),还包括被该介电层(330)覆盖的一沟道区(114),且该介电层(330)被一额外介电层(140)覆盖。
12.如权利要求11所述的半导体装置(300),其中该介电层(330)为一氧化镧(La2O3)层。
13.如权利要求10-12的任意一项所述的半导体装置(300),其中该介电层(330)包括一氧化镧(La2O3)基质,且其中所述多个纳米丛集核心(335)包括氧化锆(ZrO2)。
14.如权利要求13所述的半导体装置(300),其中该介电层(330)的含锆量至少为该介电层(330)的金属总含量的30%重量百分比。
15.一种存储器装置,包括多个如权利要求11-14所述的半导体装置(300)。
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