CN102034681A - Method for repairing surface scratches of wafer - Google Patents

Method for repairing surface scratches of wafer Download PDF

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Publication number
CN102034681A
CN102034681A CN2009101967251A CN200910196725A CN102034681A CN 102034681 A CN102034681 A CN 102034681A CN 2009101967251 A CN2009101967251 A CN 2009101967251A CN 200910196725 A CN200910196725 A CN 200910196725A CN 102034681 A CN102034681 A CN 102034681A
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China
Prior art keywords
crystal column
column surface
wafer
packed layer
scratches
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Pending
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CN2009101967251A
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Chinese (zh)
Inventor
曾明
李健
卜维亮
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Wuxi CSMC Semiconductor Co Ltd
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CSMC Technologies Corp
Wuxi CSMC Semiconductor Co Ltd
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Priority to CN2009101967251A priority Critical patent/CN102034681A/en
Publication of CN102034681A publication Critical patent/CN102034681A/en
Pending legal-status Critical Current

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Abstract

The invention relates to a method for repairing surface scratches of a wafer, comprising the following steps of: providing a wafer, the surface of which has scratched dents ; growing a filling layer on the surface of the wafer, wherein the filling layer fully covers the surface of the wafer and fills in the dents on the surface of the wafer; and grinding the surface of the wafer to the target thickness. The invention has the advantages: the scratches on the surface of the wafer are filled by growing the filling layer, and a supplementary polishing process is then implemented, therefore, the smooth surface can be obtained without grinding to the bottoms of the dents, and thus the method is especially suitable for repairing the deep scratches on the surface of the wafer.

Description

A kind of method of repairing the crystal column surface scuffing
[technical field]
The present invention relates to field of semiconductor manufacture, relate in particular to a kind of method that crystal column surface scratches of repairing.
[background technology]
Along with the critical size of wafer is more and more littler, the scratch of chemico-mechanical polishing (CMP) is increasing to the influence of product yield, even very little scratch also may cause the decline of yield.May cause the factor of CMP scratch very many, with regard to the appearance of present technological level scratch be difficult to controlled.
The generation reason of these scuffings is very complicated, and wherein very important reasons is owing to the impurity particle of crystal column surface can't be caused by the dissolving of the polishing fluid in the CMP technology.When the thin layer that crystal column surface is grown polished,, all might introduce impurity particle, thereby in CMP technology, cause surface tear in the surface and the inside of thin layer owing to the influence of environmental factor or gas purity.
When the CMP scratch occurring, replenish again after the CMP process implementing of being everlasting finishes and grind certain thickness, in the process of grinding, make the vestige of scratch floating.After the shortcoming of this technology is to replenish and grinds, the thickness of polishing layer is inevitable less than target thickness, cause the thickness of final products can't reach designing requirement easily, and the shallow-layer that this additional abrasive method only can treatment surface scratch, and can not the very dark scuffing of degree of treatment.
[summary of the invention]
Technical problem to be solved by this invention is to provide a kind of and can repair the restorative procedure that the crystal column surface deep layer scratches.
In order to address the above problem, the invention provides a kind of method that crystal column surface scratches of repairing, comprise the steps: to provide a wafer, described crystal column surface has the depression that forms owing to scratching; At crystal column surface growth packed layer, described packed layer covers crystal column surface, and fills up the depression of crystal column surface; Grind crystal column surface to target thickness.
As optional technical scheme, the surfacing of described wafer is identical with the material of packed layer.If only from the angle of recovery table surface evenness, the material of described packed layer can be the common materials in this area arbitrarily.If but in the subsequent technique to the specific (special) requirements that constitutes of the surfacing of wafer, then the embodiment of more optimizing should be adopt with crystal column surface thin layer identical materials as packed layer.
As optional technical scheme, adopt high density plasma CVD technology or plasma reinforced chemical vapour deposition technology at the crystal column surface packed layer of growing.Above-mentioned two kinds of technologies all are the growth techniques with high filling capacity, can better depression be filled up, and are unlikely to produce the slit between packed layer and depression inwall.Though if surface topography is smooth after implementing glossing, but there is plurality of holes in inside, then also can bring hidden danger to subsequent technique.
As optional technical scheme, the thickness range of described packed layer is 50nm to 300nm.Practice shows, polishes the caused cup depth overwhelming majority all less than 50nm, so the thickness of packed layer is to guarantee that greater than the advantage of 50nm most depression can be filled and led up.And the reason that impurity particle produces is mainly introduced in the process of growing film, and the purpose that the thickness of restriction packed layer is not more than 300nm is not wish to introduce impurity particle once more in the process of this step growth packed layer.
As optional technical scheme, adopt CMP (Chemical Mechanical Polishing) process to grind crystal column surface.
The invention has the advantages that, the scuffing of crystal column surface is filled up, implement to replenish glossing again, thereby the bottom that need not to be ground to depression just can obtain even curface, therefore is particularly useful for repairing the degree of depth scuffing of crystal column surface by the growth packed layer.
[description of drawings]
Accompanying drawing 1 is the implementation step schematic diagram of method first embodiment of reparation crystal column surface scuffing of the present invention;
Accompanying drawing 2 to accompanying drawing 4 is process schematic representations of method first embodiment of reparation crystal column surface scuffing of the present invention.
Accompanying drawing 5 is implementation step schematic diagrames of method second embodiment of reparation crystal column surface scuffing of the present invention.
[embodiment]
Elaborate below in conjunction with the embodiment of accompanying drawing to the method for reparation crystal column surface scuffing provided by the invention.
Provide first embodiment of the method for reparation crystal column surface scuffing provided by the invention at first in conjunction with the accompanying drawings.
Be the implementation step schematic diagram of this embodiment shown in the accompanying drawing 1, comprise: step S10, a wafer is provided, described crystal column surface has the depression that forms owing to scratching; Step S11, at crystal column surface growth packed layer, described packed layer covers crystal column surface, and fills up the depression of crystal column surface; Step S12 grinds crystal column surface to target thickness.
Glossing described in this embodiment is chemico-mechanical polishing.
Accompanying drawing 2 is to shown in the accompanying drawing 4 being the process schematic representation of this embodiment.
Shown in the accompanying drawing 2, refer step S10 provides wafer 10, and described crystal column surface has the depression that forms owing to scratching.It also can be a plurality of that described depression can be one, and this embodiment is with 11,13 and 15 expressions of caving in.
In this embodiment, the thin layer 19 that comprises support substrates 18 and support substrates 18 surfaces of described wafer 10.The complex genesis of depression 11,13 and 15, when the polished thin layer 19 of crystal column surface 10 growth because the influence of environmental factor or gas purity, all might introduce impurity particle, thereby in the implementation process of glossing, cause surface tear in the surface and the inside of thin layer 19.The airborne impurity particle of thin layer 19 surface adsorption also can cause scuffing in polishing process.
In other execution mode, described wafer 10 also can be the substrate that the surface does not have any film and device architecture, in the case, scratching mainly is owing to the airborne impurity particle of the surface adsorption of wafer 10 causes with wafer 10 surperficial mutual friction mutually in polishing process.
The material of described wafer 10 can be the various common material that is used for as substrate that comprises monocrystalline silicon and compound semiconductor.
Shown in the accompanying drawing 3, refer step S11, at wafer 10 superficial growth packed layers 20, described packed layer 20 is wafer 10 surperficial all standings, and fills up wafer 10 depressions in the surface 11,13 and 15.
If only from the angle of recovery table surface evenness, the material of described packed layer can be the common materials in this area arbitrarily.If but in the subsequent technique to the specific (special) requirements that constitutes of the surfacing of wafer 10, then the embodiment of more optimizing should be adopt with wafer 10 surface film layers 19 identical materials as packed layer 20.In other embodiment, if wafer 10 no any thin layer in surface and device architectures, then the surfacing of wafer 10 is the material that constitutes wafer 10, and the material of then described packed layer 20 should be identical with the material of wafer 10.
The technology of growth packed layer 20 should be the technology with high filling capacity in this step, for example high density plasma CVD technology or plasma reinforced chemical vapour deposition technology etc., its advantage is can be better depression 11,13 and 15 be filled up, and is unlikely to produce the slit between packed layer 20 and 11,13 and 15 the inwall of caving in.Though if surface topography is smooth after implementing glossing, but there is plurality of holes in inside, then also can bring hidden danger to subsequent technique.
In this step, the thickness range of packed layer 20 is 50nm to 300nm.Practice shows, polishes the caused cup depth overwhelming majority all less than 50nm, so the thickness of packed layer 20 is to guarantee that greater than the advantage of 50nm most depression can be filled and led up.And the reason that impurity particle produces is mainly introduced in the process of growing film, the purpose that the thickness of restriction packed layer 20 is not more than 300nm is not wish to introduce impurity particle once more in the process of this step growth packed layer, thereby this method is absorbed among the undying circulation.
Shown in the accompanying drawing 4, refer step S12 grinds wafer 10 surfaces to target thickness.
The purpose of the additional grinding that this step is done is to remove the scuffing on surface, the packed layer 20 owing to grown, depression 11,13 and 15 has been filled, promptly make owing to scratch the depression 11,13 and 15 that causes and obtained reparation, therefore need not just can obtain even curface as the bottom that is ground to depression in the common technology by the packed layer 20 of having grown.
Next provide second embodiment of the method for reparation crystal column surface scuffing provided by the invention in conjunction with the accompanying drawings.
Be the implementation step schematic diagram of this embodiment shown in the accompanying drawing 5, comprise: step S20, a wafer is provided, described crystal column surface has the depression that forms owing to scratching; Step S21, the depression of identification and location crystal column surface; Step S22, at the position growth filler that crystal column surface has depression, described filler fills up the depression of crystal column surface; Step S23, the filler that grinds crystal column surface is consistent with crystal column surface to its height.
More than be that with the difference of first embodiment this embodiment has the step of a location depression, this step is used to obtain the positional information of crystal column surface defective, for the step of subsequent growth filler provides clear and definite guiding.The step of subsequent growth filler can be carried out selective growth like this, has saved the technology cost, also makes technology more targeted, has guaranteed that further recess can be filled material fully and fill.Also can emphasis in grinding the step of crystal column surface growth has the zone of filler to implement to grind to crystal column surface, to increase the levels of precision that grinds.
The above only is a preferred implementation of the present invention; should be pointed out that for those skilled in the art, under the prerequisite that does not break away from the principle of the invention; can also make some improvements and modifications, these improvements and modifications also should be considered as protection scope of the present invention.

Claims (6)

1. repair the method that crystal column surface scratches for one kind, it is characterized in that, comprise the steps:
One wafer is provided, and described crystal column surface has the depression that forms owing to scratching;
At crystal column surface growth packed layer, described packed layer covers crystal column surface, and fills up the depression of crystal column surface;
Grind crystal column surface to target thickness.
2. the method that reparation crystal column surface according to claim 1 scratches is characterized in that the surfacing of described wafer is identical with the material of packed layer.
3. the method that reparation crystal column surface according to claim 1 and 2 scratches is characterized in that, adopts high density plasma CVD technology or plasma reinforced chemical vapour deposition technology at the crystal column surface packed layer of growing.
4. the method that reparation crystal column surface according to claim 1 scratches is characterized in that the thickness range of described packed layer is 50nm to 300nm.
5. the method that reparation crystal column surface according to claim 1 scratches is characterized in that, adopts CMP (Chemical Mechanical Polishing) process to grind crystal column surface.
6. the method that reparation crystal column surface according to claim 1 scratches is characterized in that described method further comprises: the depression of identification and location crystal column surface before the growth packed layer.
CN2009101967251A 2009-09-29 2009-09-29 Method for repairing surface scratches of wafer Pending CN102034681A (en)

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Application Number Priority Date Filing Date Title
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102610497A (en) * 2012-04-09 2012-07-25 上海先进半导体制造股份有限公司 Wafer surface repair method
CN103128650A (en) * 2011-12-05 2013-06-05 无锡华润上华科技有限公司 Chemical mechanical polishing method
CN103165412A (en) * 2013-03-15 2013-06-19 上海华力微电子有限公司 Method for treating wafer surface indentation defect
CN110484386A (en) * 2019-09-12 2019-11-22 河北工业大学 Cleaning agent and its cleaning method after a kind of polishing of integrated circuit low k dielectric

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1538505A (en) * 2003-04-18 2004-10-20 矽统科技股份有限公司 Method of improving flatness of wafer surface
US20070212986A1 (en) * 2006-03-13 2007-09-13 Karl Heinz Priewasser Method for concave grinding of wafer and unevenness-absorbing pad
CN101140878A (en) * 2007-06-15 2008-03-12 中国电子科技集团公司第二十四研究所 Polycrystalline silicon medium flat method

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1538505A (en) * 2003-04-18 2004-10-20 矽统科技股份有限公司 Method of improving flatness of wafer surface
US20070212986A1 (en) * 2006-03-13 2007-09-13 Karl Heinz Priewasser Method for concave grinding of wafer and unevenness-absorbing pad
CN101140878A (en) * 2007-06-15 2008-03-12 中国电子科技集团公司第二十四研究所 Polycrystalline silicon medium flat method

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103128650A (en) * 2011-12-05 2013-06-05 无锡华润上华科技有限公司 Chemical mechanical polishing method
CN102610497A (en) * 2012-04-09 2012-07-25 上海先进半导体制造股份有限公司 Wafer surface repair method
CN103165412A (en) * 2013-03-15 2013-06-19 上海华力微电子有限公司 Method for treating wafer surface indentation defect
CN110484386A (en) * 2019-09-12 2019-11-22 河北工业大学 Cleaning agent and its cleaning method after a kind of polishing of integrated circuit low k dielectric

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Application publication date: 20110427