CN102034526B - Method for realizing static and dynamic random access memory (SDRAM) refresh by using field programmable gate array (FPGA) - Google Patents
Method for realizing static and dynamic random access memory (SDRAM) refresh by using field programmable gate array (FPGA) Download PDFInfo
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- CN102034526B CN102034526B CN 201010598447 CN201010598447A CN102034526B CN 102034526 B CN102034526 B CN 102034526B CN 201010598447 CN201010598447 CN 201010598447 CN 201010598447 A CN201010598447 A CN 201010598447A CN 102034526 B CN102034526 B CN 102034526B
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CN102034526B true CN102034526B (en) | 2013-06-12 |
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Families Citing this family (4)
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CN102426854A (en) * | 2011-12-13 | 2012-04-25 | 曙光信息产业(北京)有限公司 | Method for lowering DDR3 (Double Data Rate) memory refreshing power consumption |
CN102426850A (en) * | 2011-12-13 | 2012-04-25 | 曙光信息产业(北京)有限公司 | Method for reducing DDR2 initialization time |
CN108597551B (en) * | 2018-04-26 | 2020-12-08 | 上海交通大学 | Memory refreshing method and system for read-intensive big data processing |
CN115357952B (en) * | 2022-10-18 | 2023-02-03 | 合肥奎芯集成电路设计有限公司 | Line hammer attack defense method and device for dynamic memory |
Citations (4)
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US5926434A (en) * | 1997-06-26 | 1999-07-20 | Mitsubishi Denki Kabushiki Kaisha | Synchronous semiconductor memory device capable of reducing electricity consumption on standby |
US6453400B1 (en) * | 1997-09-16 | 2002-09-17 | Nec Corporation | Semiconductor integrated circuit device |
CN1853175A (en) * | 2003-09-29 | 2006-10-25 | 英特尔公司 | Memory buffer device integrating refresh |
CN101266833A (en) * | 2007-03-16 | 2008-09-17 | 富士通株式会社 | Semiconductor memory, memory controller, system, and operating method of semiconductor memory |
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KR101607489B1 (en) * | 2009-01-19 | 2016-03-30 | 삼성전자주식회사 | Refresh control circuit, semiconductor memory device having the refresh control circuit and memory system |
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Publication number | Priority date | Publication date | Assignee | Title |
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US5926434A (en) * | 1997-06-26 | 1999-07-20 | Mitsubishi Denki Kabushiki Kaisha | Synchronous semiconductor memory device capable of reducing electricity consumption on standby |
US6453400B1 (en) * | 1997-09-16 | 2002-09-17 | Nec Corporation | Semiconductor integrated circuit device |
CN1853175A (en) * | 2003-09-29 | 2006-10-25 | 英特尔公司 | Memory buffer device integrating refresh |
CN101266833A (en) * | 2007-03-16 | 2008-09-17 | 富士通株式会社 | Semiconductor memory, memory controller, system, and operating method of semiconductor memory |
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Inventor after: Li Jing Inventor after: Li Nanning Inventor after: Bai Zongyuan Inventor after: Zhang Lei Inventor after: Zhang Yingwen Inventor after: Ji Kui Inventor before: Li Jing Inventor before: Bai Zongyuan Inventor before: Zhang Lei Inventor before: Zhang Yingwen Inventor before: Ji Kui |
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Free format text: CORRECT: INVENTOR; FROM: LI JING BAI ZONGYUAN ZHANG LEI ZHANG YINGWEN JI KUI TO: LI JING LI NANNING BAI ZONGYUAN ZHANG LEI ZHANG YINGWEN JI KUI |
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Effective date of registration: 20221215 Address after: 430040 NO.666, Wuhuan Avenue, linkonggang economic and Technological Development Zone, Wuhan City, Hubei Province (10) Patentee after: Dawning Network Technology Co.,Ltd. Address before: 300384 Xiqing District, Tianjin Huayuan Industrial Zone (outside the ring) 15 1-3, hahihuayu street. Patentee before: DAWNING INFORMATION INDUSTRY Co.,Ltd. |
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