CN102023605A - Special field programmable gate array (FPGA) controller for detecting appearance parameters of yarns - Google Patents
Special field programmable gate array (FPGA) controller for detecting appearance parameters of yarns Download PDFInfo
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- CN102023605A CN102023605A CN2010105768688A CN201010576868A CN102023605A CN 102023605 A CN102023605 A CN 102023605A CN 2010105768688 A CN2010105768688 A CN 2010105768688A CN 201010576868 A CN201010576868 A CN 201010576868A CN 102023605 A CN102023605 A CN 102023605A
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Abstract
The invention discloses a special field programmable gate array (FPGA) controller for detecting the appearance parameters of yarns, which belongs to the technical field of new textile machines, and aims to solve the technical problem that because the types of the appearance parameters of yarns are various, and in the process of detecting the appearance parameters of different yarns, the movement velocities of the yarns, the types of detecting heads and the distances between the detecting heads and the yarns are all different, a simple and unique software processing method obviously can not satisfy the real-time control requirements for the detection on the appearance parameters of the yarns through a specific detection process selected according to the type of the appearance parameters of the yarns required to be detected in the process of detecting the appearance parameters of yarns. For solving the technical problem, in the invention, an FPGA controller system is used as the core of a control system for reading in the types and relevant characteristics of the appearance parameters of the yarns, and controlling the subsequent processing flow of the detection on the appearance parameters of yarns so as to satisfy the real-time control requirements for the detection on the appearance parameters of the yarns, thereby completing the processing flow of the detection on the appearance parameters of yarns.
Description
Technical field
The present invention relates to the FPGA system is core exploitation yarn appearance parameter detecting dedicated control system, be specifically related to utilize the FPGA embedded system to read yarn appearance parameter kind and correlated characteristic data and store this information to storer, thereby and with the control of this data in real time control step motor action realization, to reach the effect that the yarn appearance parameter detecting is handled in real time to yarn appearance parameter detecting processing mechanism.
Background technology
After yarn production, need assess yarn qualities, the normal accepted standard of yarn qualities assessment is the apparent parameter of yarn, therefore need finish the detection of yarn appearance parameter, thereby the yarn qualities grade is evaluated.When carrying out yarn production according to the yarn sample equally, also need to detect earlier the apparent parameter of yarn, could set the production technology of spinning, to produce the yarn of similar model.At the apparent parameter that detects yarn, multiple parameters such as the fineness of needs detection yarn, filoplume, yarn unevenness, different apparent parameters need be selected different detection heads, and the distance between adjustment detection head and the yarn, thereby realize the accurate detection of yarn appearance parameter, whole testing process as shown in Figure 1.
The yarn appearance parameter kind that traditional yarn appearance parameter detecting needs to detect is as required selected different detection machine, and different detection methods and principle are set, and needs the testing staff to grasp the method for operating of multiple machine, and needs the training through specialty.Progress along with control technology, the machine that the different apparent parameter pick-up units of yarn are integrated in one progressively is developed, but still need select different detection heads, and adjust position and distance between yarn and the detection head according to the kind of the yarn appearance parameter of required detection.Utilize artificial these mechanisms that adjust, need training, and the possibility of result that different testing staff adjusts can be variant, thereby cause the inaccurate of yarn appearance parameter detecting through specialty.The present invention is directed to this problem, utilize the FPGA system development to go out the special-purpose control system of a cover, automatically select yarn appearance parameter detecting head, and automatically adjust position and distance between detection head and the yarn according to the yarn appearance parameter kind of required detection, realization is to the automatic detection of yarn appearance parameter, and accuracy, the stability of assurance testing result data.
Summary of the invention
The design concept and the implementation method that the purpose of this invention is to provide a kind of yarn appearance parameter detecting nonshared control unit utilize the control technology of FPGA system to realize the Automatic Control that the yarn appearance parameter detecting is handled.
Concrete steps are:
(1) selects suitable FPGA system;
(2) the PCB development board of design control system;
(3) Design of System Software;
(4) software debugging, the requirement of realization system control.
The present invention utilizes the FPGA system to realize the control that the yarn appearance parameter detecting is handled, for real-time, the efficient and Automatic Control that further realizes the yarn appearance parameter detecting has proposed new thought.
Description of drawings
Fig. 1 yarn appearance parameter detecting flow process
Fig. 2 yarn appearance parameter detecting processor circuit composition frame chart
The circuit of Fig. 3 RS232 yarn appearance parameter detecting controller is formed
The circuit of Fig. 4 USB yarn appearance parameter detecting controller is formed
Embodiment
Embodiment 1
Whole yarn appearance parameter detecting controller is mainly by the FPGAMUL501 system, yarn appearance parameter detecting processor mainly is made up of FPGAMUL501 system, memory bank, communication interface and keyboard display etc., be used for reception, storage and handle the yarn appearance supplemental characteristic in the course of the work, composition frame chart as shown in Figure 2.Change constantly at the yarn appearance supplemental characteristic, utilize system microcomputer by RS232 interface input yarn appearance supplemental characteristic and be stored in the yarn appearance parameter Processor.
The yarn appearance parameter storage is used to store the yarn appearance supplemental characteristic; Keyboard, display are used to import yarn appearance parameter kind parameter and other running parameter; The RS-232 serial communication interface receives the yarn appearance supplemental characteristic that sends from host computer; FPGA is responsible for the operation control and the data processing of whole yarn appearance parameter Processor.
Whole yarn appearance parameter detecting processing controller mainly by FPGAMUL501 system, yarn appearance parameter Processor, circuit for generating synchronous signals, yarn movement stepper motor driving circuit, yarn unofficial biography parameter detecting driving circuit, main motor speed control circuit, open, parking and fault automatic stop interface circuit, compositions such as keyboard-display circuit.The circuit composition frame chart as shown in Figure 3.
The FPGAMUL501 system is the core of entire controller, is responsible for the operational management of entire controller.After the system start-up, under the driving of the synchronizing signal that synchronous signal circuit produces, the data that the yarn appearance parameter Processor is provided require to deliver to respectively 16 tunnel yarn appearance parameter detecting processing driving circuit and 16 road yarn movement stepper motor drivers chronologically, and the outer parameter detecting controller of control yarn detects and handles the yarn appearance parameter.Be that processor also is responsible for the speed control of main motor and the monitoring of running status in addition, when finding the motor movement abnormal signal,, and send alerting signal automatic stopping.
Example 2
Whole yarn appearance parameter detecting controller is mainly by FPGA Altera system, yarn appearance parameter detecting processor mainly is made up of FPGA Altera system, memory bank, communication interface and keyboard display etc., be used for reception, storage and handle the yarn appearance supplemental characteristic in the course of the work, composition frame chart as shown in Figure 5.When the yarn appearance supplemental characteristic changes, yarns treated apparent parameter data are deposited in USB flash disk, by USB interface the yarn appearance supplemental characteristic of USB flash disk is read in the internal memory of yarn appearance parameter detecting processor.
Claims (2)
1. yarn appearance parameter detecting FPGA controller is to adopt the control core of FPGA embedded system as the yarn appearance parameter detecting, thereby reaches the robotization control problem of yarn appearance parameter detecting process.
2. adopt the core of the FPGA system of any model as yarn appearance parameter detecting control system.
Priority Applications (1)
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CN2010105768688A CN102023605A (en) | 2010-12-03 | 2010-12-03 | Special field programmable gate array (FPGA) controller for detecting appearance parameters of yarns |
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CN2010105768688A CN102023605A (en) | 2010-12-03 | 2010-12-03 | Special field programmable gate array (FPGA) controller for detecting appearance parameters of yarns |
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CN2010105768688A Pending CN102023605A (en) | 2010-12-03 | 2010-12-03 | Special field programmable gate array (FPGA) controller for detecting appearance parameters of yarns |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102830127A (en) * | 2012-08-21 | 2012-12-19 | 西安工程大学 | Discrete fourier transform (DFT) frequency sampling-based sliver spectrum analysis IP soft core and test method thereof |
-
2010
- 2010-12-03 CN CN2010105768688A patent/CN102023605A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102830127A (en) * | 2012-08-21 | 2012-12-19 | 西安工程大学 | Discrete fourier transform (DFT) frequency sampling-based sliver spectrum analysis IP soft core and test method thereof |
CN102830127B (en) * | 2012-08-21 | 2014-08-06 | 西安工程大学 | Discrete fourier transform (DFT) frequency sampling-based sliver spectrum analysis IP soft core and test method thereof |
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Application publication date: 20110420 |