Embodiment
Embodiment 1
With reference to accompanying drawing 3A, APLC communication among the present invention, the modulated voltage signal that in 10kV/0.4kV distribution transformer low-pressure side three-phase four-wire system trunk power line, does not have carrier communication, APLC electric energy meter gateway 4 main frames as the APLC communication, the input (upper end) of APLC electric energy meter gateway 4 is connected in the distribution transformer low-pressure side three-phase four-wire system trunk power line, the output (lower end) of APLC electric energy meter gateway is the power line branch line in the trunk power line, so APLC electric energy meter gateway 4 is nodes of trunk power line and power line branch line.APLC electric energy meter gateway 4 on the electric power branch line with the electric power branch line on the APLC information terminal carry out the APLC communication.APLC electric energy meter gateway 4 is a main frame at this moment, APLC information terminal on the electric power branch line is a slave, the inner APLC circuit of APLC electric energy meter gateway 4 main frames is by series connection high-frequency mutual inductance device LA1 4.1 and phase line coupling capacitance CA2 4.2 between center line (N line) and phase line, the voltage signal of voltage-type FSK or S-FSK modulation is coupling in center line series connection high-frequency mutual inductance device load one side, forms between center line and the phase line.And the opposite side of center line series connection high-frequency mutual inductance device, because the inner APLC circuit of APLC electric energy meter gateway (main frame) has coupling capacitance CA2 4.2 between center line and phase line, so it is idiostatic that the voltage signal of the FSK of the power line input of APLC electric energy meter gateway or S-FSK modulation is coupled capacitor C A2 4.2 short circuits, the power line input of APLC electric energy meter gateway 4 does not have the voltage signal of carrier communication.The advantage of APLC communication is to be parallel with a plurality of APLC electric energy meter gateways (power line node) in 10kV/0.4kV distribution transformer low-pressure side three-phase four-wire system trunk power line, and each APLC electric energy meter gateway (main frame) can only carry out the APLC communication with the APLC information terminal (slave) on the relevant electric power branch line, and each APLC electric energy meter gateway does not have the voltage signal of FSK or S-FSK modulation each other in the trunk power line, make between each APLC electric energy meter gateway (main frame) when real-time communication, do not disturb mutually, improved reliability and anti-interference.The current signal of the FSK that sends of the APLC information terminal (slave) of each electric power branch line or S-FSK modulation in addition, the current signal of modulation can not flow in other electric power branch line, the current signal of FSK that APLC information terminal (slave) sends or S-FSK modulation can only flow back in the 10kV/0.4kV distribution transformer low-pressure side three-phase four-wire system subgrade coil, so can only be received by the APLC electric energy meter gateway (main frame) on the relevant electric power branch line.And the current signal of FSK or S-FSK modulation is difficult for disturbed in long transmission line, and FSK or S-FSK modulation that APLC information terminal (slave) can little current forms form the long distance of low power mode and carry out the APLC communication.Principle of Communication figure between APLC electric energy meter gateway (main frame) and the APLC information terminal (slave) is shown in accompanying drawing 3A.
With reference to Fig. 2, present embodiment comprises following three kinds of communication modes:
1, ZigBee multilink bridge 1 can carry out digital communication by RS-485 fieldbus and APLC electric energy meter gateway 4, and ZigBee multilink bridge 1 also can carry out digital communication by DCPL fieldbus and DCPL network intelligence type water meter, DCPL network intelligence type gas meter, flow meter and other DCPL network terminal 5; ZigBee multilink bridge 1 concentrates bridge to carry out wireless telecommunications through ZigBee radio communication chain circuit layer and TD-SCDMA/ZigBee.And APLC electric energy meter gateway 4, mainly the electric weight with the APLC standard shows that control bridge 6 carries out asymmetric electric line carrier communication with white information household electrical appliances 7, referring to link mode 1 in the accompanying drawing 2.
2, D-APLC link bridge 2 carries out digital communication by DCPL fieldbus and DCPL network intelligence type water meter, DCPL network intelligence type gas meter, flow meter indoors; D-APLC link bridge 2 also shows that by APLC bus and electric weight control gateway is connected, and electric weight shows that control gateway is carried out asymmetric power line carrier and APLC electric energy meter gateway 4 carries out digital communication, referring to link mode 2 in the accompanying drawing 2.APLC electric energy meter gateway 4 carries out digital communication by RS-485 bus and ZigBee multilink bridge 1.
3, ZB-DCPL link bridge 3 carries out digital communication by DCPL fieldbus and DCPL network intelligence type water meter, DCPL network intelligence type gas meter, flow meter indoors; ZB-DCPL link bridge 3 also shows that by ZigBee wireless telecommunications and electric weight control bridge 6 carries out wireless telecommunications, and electric weight shows that control bridge 5 carries out digital communication by asymmetric power line carrier and APLC electric energy meter gateway 4, referring to link mode 3 in the accompanying drawing 2.APLC electric energy meter gateway 4 carries out digital communication by RS-485 bus and ZigBee multilink bridge 1.
Embodiment 2
The difference of present embodiment and embodiment 1 is that APLC electric energy meter gateway and the communication of control bridge slave are to realize in the mode of carrying out asymmetric electric power carrier communication between center line and ground wire.
Shown in Fig. 3 B, the inner APLC circuit of APLC electric energy meter gateway 4 main frames is by series connection high-frequency mutual inductance device LA1 4.1 and ground wire coupling capacitance CA2 4.2 between center line (N line) and ground wire, the voltage signal of voltage-type FSK or S-FSK modulation is coupling in center line series connection high-frequency mutual inductance device load one side, forms between center line and the ground wire.And the opposite side of center line series connection high-frequency mutual inductance device, because the inner APLC circuit of APLC electric energy meter gateway (main frame) has coupling capacitance CA2 4.2 between center line and ground wire, so it is idiostatic that the voltage signal of the FSK of the power line input of APLC electric energy meter gateway or S-FSK modulation is coupled capacitor C A2 4.2 short circuits, the power line input of APLC electric energy meter gateway 4 does not have the voltage signal of carrier communication.
Embodiment 3
With reference to accompanying drawing 2, shown in Figure 4, embodiment of the invention ZigBee multilink bridge 1 comprises three parts: circuit part 1, be to have ZigBee transmitting-receiving RF circuit chip IC1, reset circuit IC2, time circuit IC3, memory IC 4, temperature sensor IC5, display circuit IC6, multichannel optical coupler IC7, RS-485 bus driving circuits IC8 by microprocessor, and peripheral resistance, electric capacity, inductance and crystal oscillator intelligent ZigBee wireless transceiver circuit and the RS-485 interface circuit formed; Circuit part 2 is by modulator-demodulator U1, amplifier IC1A and IC1B, triode TC1-TC5, inductance L C1, amplitude limiter DC3, diode DC1 and DC2, and the DCPL bus host drive circuit formed of peripheral resistance, electric capacity and crystal oscillator; Circuit part 3 is by transformer T1, rectifier Z1 and Z2, voltage stabilizing circuit W1-W3, isolates pressurizer W4, diode DA1-DA3, rechargeable battery E, and the voltage stabilizing circuit formed of peripheral resistance, electric capacity;
Circuit part 1, microprocessor has ZigBee transmitting-receiving RF circuit chip IC1 and adopts the CC2533 chip, and the CC2533 chip is to include 8051 microprocessors and ZigBee wireless telecommunications transmission circuit (being the RF transceiver that adopts the 2.4GHz of IEEE802.15.4 standard); IC2 adopts the MAX809 reset circuit; IC3 adopts the RX8025 time circuit; IC4 adopts the 24WC08 memory; IC5 adopts the SE95 temperature sensor; IC6 adopts the PCF8576 display circuit; IC7 multichannel optical coupler; IC8 adopts the SP485 drive circuit.
IC1 CC2533 chip is connected with IC6 PCF8576 display circuit, IC5 SE95 temperature sensor, IC4 24WC08 memory, IC3 RX8025 time circuit, corresponding SDA, SCL interface by I2C bus interface SDA, SCL in the circuit, and resistance R 1-R8 is the pull-up resistor of I2C bus; IC1 CC2533 chip has two asynchronous serial UART0, UART1 interface in the circuit, and it is that P0.0 (RXD), P0.1 (TXD), P0.2 are transmitting-receiving control that asynchronous serial UART0 sets the I/O mouth; P0.0 (RXD) connects A1 optical coupler 1 end among the multichannel optical coupler IC7, P0.1 (TXD) connects A2 optical coupler 4 ends among the multichannel optical coupler IC7, P0.2 is A3 optical coupler 6 ends among the transmitting-receiving control connection multichannel optical coupler IC7, and resistance R 12-R14 draws current-limiting resistance on being, powers to be VDD; Corresponding respectively 2 and 3 ends, 4 ends, 1 end that is connected to IC8 SP485 drive circuit of 7 ends of A3, A2, A1 optical coupler, 10 ends, 11 ends among the multichannel optical coupler IC7, resistance R 15-R17 draws current-limiting resistance on being; 5 and 6 ends of IC8 SP485 drive circuit are RS-485 field-bus interface A and B binding post, and resistance R 18 is the bus impedance build-out resistor with R19, and D1 is the antistatic amplitude limiter, and the VEE that powers to insulating power supply is.It is that P0.3 (TXD), P0.4 are that receiving and transmitting signal detects, P0.5 (RXD), P0.6 are transmitting-receiving control that asynchronous serial UART1 sets the I/O mouth; Corresponding respectively 9,10,11,12 and 14 ends that are connected to modulator-demodulator U1 of P0.3 (TXD), P0.4, P0.5 (RXD), P0.6.25,26 ends of IC1 CC2533 chip are the output and the input of the wireless receipts machine of RF in the circuit, and by capacitor C 6-C10, inductance L 1, L2 coupling circuit, AN receives and dispatches through antenna; Crystal oscillating circuit C1, C2, Z3 consist of the oscillator of the wireless receipts machine of RF, and crystal oscillating circuit C3, C4, Z2 consist of the oscillator of micro-processor interface circuit.
Circuit part 2, in the DCPL bus host drive circuit, present embodiment modulator-demodulator U1 adopts MSM7512(also can adopt LM1893, ST75 XX series), modulator- demodulator U1 9,10,11,12 with corresponding respectively P0.3 (TXD), P0.4, P0.5 (RXD), the P0.6 that connects IC1 CC2533 chip of 14 ends; The 3(AO of modulator-demodulator U1) end is the modulation fsk signal output that main frame sends, fsk signal is input to the DCPL bus driving circuits, the DCPL bus driving circuits is made up of with DC2, amplitude limiter DC3, inductance L C1 amplifier IC1A, resistance R C1-RC8, capacitor C C1-CC4, triode TC1-TC5, diode DC1, and inductance L C1 connects the bus output interface; The 2(AI of modulator-demodulator U1) end is the input that receives slave modulation FSK voltage signal, the modulation FSK current signal that sends when slave is through inductance L C1, the voltage signal of the FSK that capacitor C C4 is corresponding with the generation of inductance L C1 two ends, send into the 2(AI of modulator-demodulator U1 through capacitor C C5, amplifier IC1B, capacitor C C7) end, resistance R C11, capacitor C C6 are feedback resistance and the electric capacity of amplifier IC1B; SD2 is the crystal oscillator of modulator-demodulator U1 in the circuit.
Circuit part 3, transformer secondary coil and rectifier Z1, filter capacitor CA4-CA6, pressurizer W2 form the supply power voltage VCC of DCPL fieldbus in the voltage stabilizing circuit, VCC voltage can be according to slave number on the DCPL fieldbus and DCPL field bus communication distance, select the size of VCC voltage, scope is generally 6V-24V, is safe voltage 36V to the maximum; Transformer secondary coil and rectifier Z2, filter capacitor CA1-CA3, pressurizer W1 form the 5V voltage stabilizing circuit, and W3 pressurizer, resistance R A1-RA3, capacitor C A7, diode DA1-DA3, rechargeable battery E are formed the vdd voltage power supply, and voltage is 3.6V; And isolate pressurizer W4 is the VEE power supply that produces insulating power supply 5V in the RS-485 circuit.Embodiment 1, the principal character of ZigBee multilink bridge is: possess DCPL fieldbus, RS-485 fieldbus and the communication of the wireless multilink bridge joint of ZigBee, and be the long-range bridge joint equipment that special communications protocol and APLC electric energy meter gateway carry out the digital communication of white information household electrical appliances.
Embodiment 4
With reference to accompanying drawing 3, shown in Figure 5, embodiment of the invention D-APLC link network bridge circuit partly comprises 4 major parts: circuit part 1, be by microprocessor IC1, reset circuit IC2, temperature sensor IC3, memory IC 4, display IC5, modulator-demodulator IC6, analog switch IC7, and the intelligent processor circuit formed of peripheral resistance, electric capacity, crystal oscillator.Circuit part 2, be by coupling transformer T1, amplifier U1, optical coupler OP1-OP3, triode TU1-TU8, diode DU1-DU4, rectifier DU5, controllable silicon SU1, and the Asymmetric Electric line carrier communication that peripheral resistance, electric capacity are formed is called for short APLC from machine circuit from machine circuit.Circuit part 3 is by amplifier UC1A and UC1B, triode TC1-TC5, diode DC1 and DC2, inductance L C1, amplitude limiter DC3, and the DCPL bus host drive circuit formed of peripheral resistance, electric capacity.Circuit part 4 is by plug ZD, transformer TA1, rectifier Z1, pressurizer W3, diode DA1-DA3, rechargeable battery E, and the voltage stabilizing circuit formed of peripheral resistance, electric capacity.
Circuit part 1, microprocessor chip IC1 adopts the P89LPC9XX family chip, the 12C bus interface 11(SDA of microprocessor chip IC1), corresponding SDA and the SCL that connects temperature sensor IC3, memory IC 4, display IC5 of 12 (SCL), resistance R 2-R7 is a pull-up resistor; Serial port RXD, TXD, the P0.5(of microprocessor chip IC1 receive and dispatch control) mouthful, P0.6(receive and dispatch detection) 17,13 and 20,15 ends of mouth connection modulator-demodulator IC6; The P0.3 of microprocessor chip IC1, P0.4 mouth connect IC7A(13 among the simulation switch I C7) and IC7C(5), IC7B(12) and switch control end IC7D(6), the wrong high-low level of P0.3, P0.4 oral sex by IC1, control and the communication of selecting APLC from machine circuit or DCPL bus host drive circuit, as P0.3(1), P0.4(0) time APLC carry out communication from machine circuit, as P0.3(0), P0.4(1) time DCPL bus host drive circuit communication; 1 mouthful of connecting circuit 2 of the interrupt INT of microprocessor chip IC1, the Asymmetric Electric line carrier communication is optical coupler OP3 synchronous signal output end from machine circuit.
Circuit part 2, by APLC electric energy meter gateway 4(main frame) the modulation FSK voltage signal that sends, by center line (N line) series connection high-frequency mutual inductance device LA1 4.1 and phase line coupling capacitance CA2 4.2, the voltage signal of FSK or S-FSK modulation is coupling between the center line of center line series connection high-frequency mutual inductance device load one side and the phase line forms, the fsk signal that modulation is arranged in the power line of slave at this moment, through capacitor C U6 and CU7, coupling transformer T1 primary coil, fsk signal on coupling transformer T1 subgrade coil is through RU7, RU9 amplifies output by amplifier U1, connect simulation switch I C7A input 1 through capacitor C U1, analog switch IC7A exports the 3(AI of the modulation fsk signal connection modulator-demodulator IC6 of 2 ends) input, resistance R U8, capacitor C U3 forms feedback and filter circuit; The 5(AO of modulator-demodulator IC6) the modulation fsk signal of end output is sent into through analog switch IC7C, form isolated drive circuit by triode TU1 and TU2, optical coupler OP1, resistance R U4-RU6, capacitor C U2 and CU4, the output of optical coupler OP1 in the isolated drive circuit, the base stage of triode TU7 in the connection current amplifier circuit; Current amplifier circuit is made up of triode TU5-TU8, resistance R U12-RU15, wherein triode TU5 and TU6, resistance R U12 and RU13 form current-limiting circuit, select the size of RU13 resistance, the maximum of decision current limliting, and the size of resistance R U14 decision fsk modulated signal electric current is sent to APLC electric energy meter gateway; Triode TU1 and TU3, resistance R U1 and RU2, diode DU1, optical coupler OP2 form the transmitting-receiving control circuit; Triode TU4, resistance R U10 and RU11, voltage stabilizing didoe DU2, capacitor C U5 form voltage stabilizing circuit; Controllable silicon SU1, diode DU3, optical coupler OP3, resistance R U19 form synchronous generator, and controllable silicon SU1 triggering level is provided by the bleeder circuit that resistance R U16-RU18, voltage-stabiliser tube DU4 form; Alternating current 50Hz is triggered by controllable silicon SU1 through rectifier DU5 rectification output, obtains the output of 100Hz synchronizing signal and exports at optical coupler OP3 phototriode collector electrode.APLC electric energy meter gateway and APLC slave carrier communication waveform schematic diagram are shown in accompanying drawing 7.
Circuit part 3 is in the DCPL bus host drive circuit, by the fsk modulated signal connection DCPL bus driving circuits of analog switch IC7D output; The DCPL bus driving circuits is made up of with DC2, amplitude limiter DC3, inductance L C1 amplifier UC1A, resistance R C1-RC8, capacitor C C1-CC4, triode TC1-TC5, diode DC1, and inductance L C1 connects the bus output interface; The modulation FSK current signal that slave sends on bus is through inductance L C1, the voltage signal of the FSK that capacitor C C8 is corresponding with the generation of inductance L C1 two ends, send into analog switch IC7B through capacitor C C5, amplifier UC1B, capacitor C C7, resistance R C11, capacitor C C6 are feedback resistance and the electric capacity of amplifier UC1B.
Circuit part 4, primary coil by plug ZD, resistance R A4, capacitor C A3, transformer TA1 is formed the input circuit that capacitive reactance is connected with induction reactance, the secondary coil of transformer TA1 is through rectifier Z1, pressurizer W3 and resistance R 2 and RA3, capacitor C A1 and CA2, resistance R 1 and diode DA1-DA3, rechargeable battery E, the voltage stabilizing circuit of being formed, rechargeable battery E are back-up source.
D-APLC link bridge 2 principal characters are: can carry out digital communication by DCPL fieldbus and DCPL network intelligence type water meter, DCPL network intelligence type gas meter, flow meter and other DCPL network terminal, and D-APLC link bridge can also carry out digital bridge joint communication by asymmetric power line carrier of APLC and APLC electric energy meter gateway.
Embodiment 5
With reference to accompanying drawing 3, shown in Figure 6, embodiment of the invention ZB-DCPL link bridge 3 circuit parts comprise 3 major parts: circuit part 1, be to have ZigBee transmitting-receiving RF circuit chip IC1, reset circuit IC2, time circuit IC3, memory IC 4, temperature sensor IC5, display circuit IC6 by microprocessor, and the intelligent ZigBee wireless transceiver circuit formed of peripheral resistance, electric capacity, inductance and crystal oscillator; Circuit part 2 is by modulator-demodulator U1, amplifier IC1A and IC1B, triode TC1-TC5, inductance L C1, amplitude limiter DC3, diode DC1 and DC2, and the DCPL bus host drive circuit formed of peripheral resistance, electric capacity and crystal oscillator; Circuit part 3 is by transformer T1, rectifier Z1 and Z2, voltage stabilizing circuit W3, diode DA1-DA3, rechargeable battery E1 and battery E2, and the voltage stabilizing circuit formed of peripheral resistance, electric capacity.
Circuit part 1, microprocessor has ZigBee transmitting-receiving RF circuit chip IC1 and adopts the CC2533 chip, and the CC2533 chip is to include 8051 microprocessors and ZigBee wireless telecommunications transmission circuit (being the RF transceiver that adopts the 2.4GHz of IEEE802.15.4 standard); IC2 adopts the MAX809 reset circuit; IC3 adopts the RX8025 time circuit; IC4 adopts the 24WC08 memory; IC5 adopts the SE95 temperature sensor; IC6 adopts the PCF8576 display circuit.
IC1 CC2533 chip is connected with IC6 PCF8576 display circuit, IC5 SE95 temperature sensor, IC4 24WC08 memory, IC3 RX8025 time circuit, corresponding SDA, SCL interface by I2C bus interface SDA, SCL in the circuit, and resistance R 1-R8 is the pull-up resistor of I2C bus; To select UART1 be Asynchronous Serial Interface to IC1 CC2533 chip in the circuit, and setting the I/O mouth is that P0.3 (TXD), P0.4 are that receiving and transmitting signal detects, P0.5 (RXD), P0.6 are transmitting-receiving control; Corresponding respectively 9,10,11,12 and 14 ends that are connected to modulator-demodulator U1 of P0.3 (TXD), P0.4, P0.5 (RXD), P0.6.25,26 ends of IC1 CC2533 chip are the output and the input of the wireless receipts machine of RF in the circuit, and by capacitor C 6-C10, inductance L 1, L2 coupling circuit, AN receives and dispatches through antenna; Crystal oscillating circuit C1, C2, Z3 consist of the oscillator of the wireless receipts machine of RF, and crystal oscillating circuit C3, C4, Z2 consist of the oscillator of micro-processor interface circuit.
Circuit part 2, in the DCPL bus host drive circuit, present embodiment modulator-demodulator U1 adopts MSM7512(also can adopt LM1893, ST75 XX series), modulator- demodulator U1 9,10,11,12 with corresponding respectively P0.3 (TXD), P0.4, P0.5 (RXD), the P0.6 that connects IC1 CC2533 chip of 14 ends; The 3(AO of modulator-demodulator U1) end is the modulation fsk signal output that main frame sends, fsk signal is input to the DCPL bus driving circuits, the DCPL bus driving circuits is made up of with DC2, amplitude limiter DC3, inductance L C1 amplifier IC1A, resistance R C1-RC8, capacitor C C1-CC4, triode TC1-TC5, diode DC1, and inductance L C1 connects the bus output interface; The 2(AI of modulator-demodulator U1) end is the input that receives slave modulation FSK voltage signal, the modulation FSK current signal that sends when slave is through inductance L C1, the voltage signal of the FSK that capacitor C C4 is corresponding with the generation of inductance L C1 two ends, send into the 2(AI of modulator-demodulator U1 through capacitor C C5, amplifier IC1B, capacitor C C7) end, resistance R C11, capacitor C C6 are feedback resistance and the electric capacity of amplifier IC1B; SD2 is the crystal oscillator of modulator-demodulator U1 in the circuit.
Circuit part 3, primary coil by resistance R A4, capacitor C A3, transformer TA1 is formed the input circuit that capacitive reactance is connected with induction reactance, the secondary coil of transformer TA1 is through rectifier Z1, pressurizer W3 and resistance R 2 and RA3, capacitor C A1 and CA2, resistance R 1 and diode DA1-DA3, rechargeable battery E1, the voltage stabilizing circuit of being formed; Rechargeable battery E1 is a back-up source, and E2 is an external connection battery.