CN111030903A - Communication method and device for electronic detonator - Google Patents
Communication method and device for electronic detonator Download PDFInfo
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- CN111030903A CN111030903A CN201911088813.XA CN201911088813A CN111030903A CN 111030903 A CN111030903 A CN 111030903A CN 201911088813 A CN201911088813 A CN 201911088813A CN 111030903 A CN111030903 A CN 111030903A
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L12/00—Data switching networks
- H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
- H04L12/40—Bus networks
- H04L12/40006—Architecture of a communication node
- H04L12/40045—Details regarding the feeding of energy to the node from the bus
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- F—MECHANICAL ENGINEERING; LIGHTING; HEATING; WEAPONS; BLASTING
- F42—AMMUNITION; BLASTING
- F42C—AMMUNITION FUZES; ARMING OR SAFETY MEANS THEREFOR
- F42C19/00—Details of fuzes
- F42C19/08—Primers; Detonators
- F42C19/12—Primers; Detonators electric
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L1/00—Arrangements for detecting or preventing errors in the information received
- H04L1/0078—Avoidance of errors by organising the transmitted data in a format specifically designed to deal with errors, e.g. location
- H04L1/0083—Formatting with frames or packets; Protocol or part of protocol for error control
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- Computer Networks & Wireless Communication (AREA)
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- General Engineering & Computer Science (AREA)
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Abstract
The invention discloses a communication method for an electronic detonator, which is used for communication between a host and a slave, and comprises the following steps: the master machine sends a voltage frequency modulation signal to the slave machine, and the slave machine returns a current signal to the master machine; the host machine and the slave machine are communicated in a bus mode, and the slave machine and the host machine are communicated in a synchronous communication mode. The invention uses frequency modulation mode for data downloading and synchronous communication return current signal for data uploading, so the anti-interference ability is strong.
Description
Technical Field
The invention relates to the field of electronic detonators, in particular to a communication method and a communication device for electronic detonators.
Background
Because the electronic detonator belongs to loss type consumption, the production cost of the electronic detonator needs to be cheap, and the communication distance of the electronic detonator is required to be long in order to ensure the safety of personnel on a blasting site, and is not less than 1000 m. One-time networking of a large blasting site is hundreds of times. The networking of the communication network of the electronic detonator is required to be strong. After the field explosion, the networking wires are damaged many times, and the communication line is almost consumed once. In order to control the cost, the communication circuit of the electronic detonator is combined with the power supply circuit. Communication is established on the power line and there are also various types of communication-power solutions. Considering the requirements of the electronic detonator such as cost, volume, power consumption and the like, the simpler the design is, the better the design is.
The currently available solution for communication and Power supply is the fire Bus, the Power-Bus. Both buses have been mature solutions. But there are problems with network capacity and cost and in some practical applications.
Disclosure of Invention
In view of the above-mentioned drawbacks of the prior art, it is an object of the present invention to provide a communication method and apparatus for an electronic detonator, which solves at least one of the drawbacks of the prior art.
To achieve the above and other related objects, the present invention provides a communication method for an electronic detonator, for communication between a master and a slave, the method comprising:
the master machine sends a voltage frequency modulation signal to the slave machine, and the slave machine returns a current signal to the master machine; the host machine and the slave machine are communicated in a bus mode, and the slave machine and the host machine are communicated in a synchronous communication mode.
Optionally, the data sent by the master to the slave includes: wake-up signal, data start signal, 4 data signals, and data end signal.
Optionally, the data sent by the master to the slave includes: the frequency ranges of the wake-up signal, the data start signal, the 4 data signals and the data end signal are not crossed with each other.
Optionally, the data start signal, the 4 data signals, and the data end signal are generated as follows:
106and a frequency of 1M. Wherein, P _ min is the pulse period of the array memory, the initial value of Fsrc is the maximum frequency in the communication line, Ferror is the tolerance of the communication frequency, and P _ center is the period of the data pulse.
Optionally, a communication protocol for communication between the host and the slave is as follows:
to achieve the above and other related objects, the present invention provides a communication device for an electronic detonator, comprising:
a host;
the slave machine is communicated with the host machine in a bus mode, and the slave machine is communicated with the host machine in a synchronous communication mode;
the master machine sends a voltage frequency modulation signal to the slave machine, and the slave machine returns a current signal to the master machine.
Optionally, the data sent by the master to the slave includes: wake-up signal, data start signal, 4 data signals, and data end signal.
Optionally, the data sent by the master to the slave includes: the frequency ranges of the wake-up signal, the data start signal, the 4 data signals and the data end signal are not crossed with each other.
Optionally, the data start signal, the 4 data signals, and the data end signal are generated as follows:
106and a frequency of 1M. Wherein, P _ min is the pulse period of the array memory, the initial value of Fsrc is the maximum frequency in the communication line, Ferror is the tolerance of the communication frequency, and P _ center is the period of the data pulse.
Optionally, a communication protocol for communication between the host and the slave is as follows:
as described above, the communication method and apparatus for electronic detonators of the present invention have the following beneficial effects:
because the data is downloaded by using a frequency modulation mode and uploaded by using a synchronous communication return current signal, the anti-interference capability is strong;
the communication speed can be improved by increasing the frequency of Fsrc, or increasing the length of data transmitted by each frame, or increasing the frequency of code return to shorten the time of current return, and the communication speed is flexible and adjustable.
The problem of large clock deviation of the MCU can be solved by increasing the value of the Ferror, and compared with communication modes such as common serial port communication and can communication, the MCU has better applicability, strong fault tolerance resistance and wide application range.
Drawings
FIG. 1 is a flow chart of a communication method for an electronic detonator according to an embodiment of the present invention;
fig. 2 is a schematic block diagram of a communication device for an electronic detonator according to an embodiment of the present invention.
Detailed Description
The embodiments of the present invention are described below with reference to specific embodiments, and other advantages and effects of the present invention will be easily understood by those skilled in the art from the disclosure of the present specification. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention. It is to be noted that the features in the following embodiments and examples may be combined with each other without conflict.
It should be noted that the drawings provided in the following embodiments are only for illustrating the basic idea of the present invention, and the components related to the present invention are only shown in the drawings rather than drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of the components in actual implementation may be changed freely, and the layout of the components may be more complicated.
As shown in fig. 1, a communication method for an electronic detonator is used for communication between a master and a slave, and the method comprises the following steps:
s11, the master machine sends a voltage frequency modulation signal to the slave machine;
s12 returning the current signal from the slave to the master; the host machine and the slave machine are communicated in a bus mode, and the slave machine and the host machine are communicated in a synchronous communication mode.
Because the data is downloaded by using a frequency modulation mode and uploaded by using a synchronous communication return current signal, the anti-interference capability is strong.
In one embodiment, the master and the slave communicate with each other via a bus, and the communication bus has a mandatory constraint that all modules not returning data consume no bus current when the bus is at a medium level.
Generally, an electronic detonator has an energy storage device which is used to consume energy at a medium level and to charge the device at a high level.
In one embodiment, the data sent by the master to the slave requires 7 pulse frequencies, which are: wake-up signal, data start signal, 4 data signals, and data end signal. The wake-up signal is used to wake up the MCU from an ultra-low power state, and the frequency of the signal burst is not strictly constrained. The respective data signal frequency ranges may be adjacent but not intersecting. The other 6 frequencies are generated as follows:
106and a frequency of 1M. The clock description of the MCU is all in terms of frequency, where the characteristic frequency in the frame data is calculated. Two adjacent characteristic frequencies F1, F2. F1>F2 satisfied that F1 (1-Ferror) was greater than F2 (1+ Ferror). The obtained frequency is converted into a period (1/T), and the program processing adopts a period setting mode.
The initial value of Fsrc is the maximum frequency in the communication line, depending on the field and application of use. The larger the Fsrc, the faster the communication rate, but the larger the power consumption, the closer the transmission distance. The error is the tolerance of the communication frequency, and according to the reference chip, the internal clock of the chip has an error of 5% under the extremely bad condition, and the software processing of the host and the slave also has an error. The value is set according to the actual situation, and the larger the Ferror is, the more compatible chips are, and the smaller the Ferror is, the faster the communication speed is. The P _ min array stores pulse periods, the unit is microsecond, and two adjacent pulse periods are used for representing the lower limit and the upper line of one data pulse period and are used for judging signals from a slave machine. P _ center is the period of the data burst for the host to send the burst signal. The host sends a pulse, the slave captures the pulse and searches in the group P _ min, if the pulse is greater than P _ min [ i ] and less than P _ min [ i +1], the data is considered as one, and the data is judged according to the value of i.
The data communication protocol is as follows:
a wake-up signal: the wake-up signal is not narrowly limited and may be omitted to wake-up the slave from a low power state. The period of this signal can be designed to be longer if wake-up is required.
Initial signals: the starting signal tells the slave to start transmitting data, and the signal can be continuously used for ensuring the stability of communication. The starting signal period P _ center [4], b ≧ 1 sent by the host.
The frame type signal is one of data signals. The frame type signal is the content of the data frame format, fixed after the start signal. Placing it in a data signal does not embody the location information. There are four types of data signals, and the host sends a burst period between P _ center [0] and P _ center [3 ]. These 4 signals represent 4 frame types. 00B marks the initial data frame, which shows that the frame is the preamble data of a long data packet; 01B, marking a data ending frame, and showing the last frame data of a long data packet when the frame data is the last frame data; 10B middle data frame, which shows the middle data of a long data packet when the data frame; 11B complete frame, which shows that the frame data is a complete data packet.
Data signal: 1 byte uses 4 data pulse, one data frame can transmit n bytes, and n is changed flexibly according to field use condition. The larger n is, the faster the communication speed is, but the higher the average power consumption during communication is, and the poorer the interference resistance is. The host sends a burst period between P _ center [0] and P _ center [3 ].
An end signal: indicating the end of a data frame, starting to translate the received data pulse signal after the slave machine recognizes, and c ≧ 1.
Let wake-up signal period 600us, Fsrc initial value 5K, Ferror 8%, b 3, n 4, c 2. The communication rate of a data frame thus designed was actually measured to be about 4.5K/bit.
The duty ratio of each pulse signal is adjusted according to the actual communication condition, and the power consumption and the capacitive load condition need to be considered. The large duty ratio has good stability for the network, but weak capacitive load resistance. The low level time of the wake-up signal can be slightly larger than 100us, and the duty ratio of other pulses can be designed to be 80%. The practical effect of the design can realize the communication capability of the 1000m and 400 nodes.
The slave machine returns data and adopts a synchronous mode, and the master machine sends a pulse and responds a bit. The answer signal uses a current signal. The communication speed is controlled by the host, the slave returns data immediately after receiving the falling edge of the pulse signal, the current duration is 20us-100us, and the current duration can be dynamically adjusted. The communication rate depends on the pulse frequency of the master and the time of the slave return current.
As shown in fig. 2, a communication device for an electronic detonator, the device comprising:
a host 11;
the slave 12 is communicated with the host in a bus mode, and the slave is communicated with the host in a synchronous communication mode;
the master machine sends a voltage frequency modulation signal to the slave machine, and the slave machine returns a current signal to the master machine.
Because the data is downloaded by using a frequency modulation mode and uploaded by using a synchronous communication return current signal, the anti-interference capability is strong.
In one embodiment, the master and the slave communicate with each other via a bus, and the communication bus has a mandatory constraint that all modules not returning data consume no bus current when the bus is at a medium level.
Generally, an electronic detonator has an energy storage device which is used to consume energy at a medium level and to charge the device at a high level.
In one embodiment, the data sent by the master to the slave requires 7 pulse frequencies, which are: wake-up signal, data start signal, 4 data signals, and data end signal. The wake-up signal is used to wake up the MCU from an ultra-low power state, and the frequency of the signal is not strictly constrained. The individual pulse frequencies may be adjacent but not interleaved. The other 6 frequencies are generated as follows:
106and a frequency of 1M. The clock description of the MCU is all in terms of frequency, where the characteristic frequency in the frame data is calculated. Two adjacent characteristic frequencies F1, F2. F1>F2 satisfied that F1 (1-Ferror) was greater than F2 (1+ Ferror). The obtained frequency is converted into a period (1/T), and the program processing adopts a period setting mode.
P _ min is the pulse period of the array memory, Feror is the tolerance of the communication frequency, and P _ center is the period of the data pulse.
The initial value of Fsrc is the maximum frequency in the communication line, depending on the field and application of use. The larger the Fsrc, the faster the communication rate, but the larger the power consumption, the closer the transmission distance. The error is the tolerance of the communication frequency, and according to the reference chip, the internal clock of the chip has an error of 5% under the extremely bad condition, and the software processing of the host and the slave also has an error. The value is set according to the actual situation, and the larger the Ferror is, the more compatible chips are, and the smaller the Ferror is, the faster the communication speed is. The P _ min array stores pulse periods, the unit is microsecond, and two adjacent pulse periods are used for representing the lower limit and the upper line of one data pulse period and are used for judging signals from a slave machine. P _ center is the period of the data burst for the host to send the burst signal. The host sends a pulse, the slave captures the pulse and searches in the group P _ min, if the pulse is greater than P _ min [ i ] and less than P _ min [ i +1], the data is considered as one, and the data is judged according to the value of i.
The data communication protocol is as follows:
a wake-up signal: the wake-up signal is not narrowly limited and may be omitted to wake-up the slave from a low power state. The period of this signal can be designed to be longer if wake-up is required.
Initial signals: the starting signal tells the slave to start transmitting data, and the signal can be continuously used for ensuring the stability of communication. The starting signal period P _ center [4], b ≧ 1 sent by the host.
Data signal: 1 byte uses 4 data pulse, one data frame can transmit n bytes, and n is changed flexibly according to field use condition. The larger n is, the faster the communication speed is, but the higher the average power consumption during communication is, and the poorer the interference resistance is. The host sends a burst period between P _ center [0] and P _ center [3 ].
The frame type signal is one of data signals. Exchange positions with the previous segment. The frame type signal is the content of the data frame format, fixed after the start signal. Placing it in a data signal does not embody the location information. There are four types of data signals, and the host sends a burst period between P _ center [0] and P _ center [3 ]. These 4 signals represent 4 frame types. 00B marks the initial data frame, which shows that the frame is the preamble data of a long data packet; 01B, marking a data ending frame, and showing the last frame data of a long data packet when the frame data is the last frame data; 10B middle data frame, which shows the middle data of a long data packet when the data frame; 11B complete frame, which shows that the frame data is a complete data packet.
An end signal: indicating the end of a data frame, starting to translate the received data pulse signal after the slave machine recognizes, and c ≧ 1.
Let wake-up signal period 600us, Fsrc initial value 5K, Ferror 8%, b 3, n 4, c 2. The communication rate of a data frame thus designed was actually measured to be about 4.5K/bit.
The duty ratio of each pulse signal is adjusted according to the actual communication condition, and the power consumption and the capacitive load condition need to be considered. The large duty ratio has good stability for the network, but weak capacitive load resistance. The low level time of the wake-up signal can be slightly larger than 100us, and the duty ratio of other pulses can be designed to be 80%. The practical effect of the design can realize the communication capability of the 1000m and 400 nodes.
The slave machine returns data and adopts a synchronous mode, and the master machine sends a pulse and responds a bit. The answer signal uses a current signal. The communication speed is controlled by the host, the slave returns data immediately after receiving the falling edge of the pulse signal, the current duration is 20us-100us, and the current duration can be dynamically adjusted. The communication rate depends on the pulse frequency of the master and the time of the slave return current.
It will be apparent to those skilled in the art that, for convenience and brevity of description, only the above-mentioned division of the functional units and modules is illustrated, and in practical applications, the above-mentioned function distribution may be performed by different functional units and modules according to needs, that is, the internal structure of the apparatus is divided into different functional units or modules to perform all or part of the above-mentioned functions. Each functional unit and module in the embodiments may be integrated in one processing unit, or each unit may exist alone physically, or two or more units are integrated in one unit, and the integrated unit may be implemented in a form of hardware, or in a form of software functional unit. In addition, specific names of the functional units and modules are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present application. The specific working processes of the units and modules in the system may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.
In the above embodiments, the descriptions of the respective embodiments have respective emphasis, and reference may be made to the related descriptions of other embodiments for parts that are not described or illustrated in a certain embodiment.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present invention, it should be understood that the disclosed apparatus/terminal device and method may be implemented in other ways. For example, the above-described embodiments of the apparatus/terminal device are merely illustrative, and for example, the division of the modules or units is only one logical division, and there may be other divisions when actually implemented, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated modules/units, if implemented in the form of software functional units and sold or used as separate products, may be stored in a computer readable storage medium. Based on such understanding, all or part of the flow of the method according to the embodiments of the present invention may also be implemented by a computer program, which may be stored in a computer-readable storage medium, and when the computer program is executed by a processor, the steps of the method embodiments may be implemented. Wherein the computer program comprises computer program code, which may be in the form of source code, object code, an executable file or some intermediate form, etc. The computer readable medium may comprise any entity or device capable of carrying the computer program code, a recording medium, a U disk, a removable hard disk, a magnetic disk, an optical disk, a computer Memory, a Read-Only Memory (ROM), a Random Access Memory (RAM), an electrical carrier signal, a telecommunications signal, a software distribution medium, etc.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Any person skilled in the art can modify or change the above-mentioned embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.
Claims (10)
1. A communication method for an electronic detonator, which is used for communication between a master and a slave, and is characterized in that the method comprises the following steps:
the master machine sends a voltage frequency modulation signal to the slave machine, and the slave machine returns a current signal to the master machine; the host machine and the slave machine are communicated in a bus mode, and the slave machine and the host machine are communicated in a synchronous communication mode.
2. The communication method for the electronic detonator according to claim 1, wherein the data transmitted from the master to the slave comprises: wake-up signal, data start signal, 4 data signals, and data end signal.
3. The communication method for the electronic detonator according to claim 2, wherein the frequency ranges of the wake-up signal, the data start signal, the 4 data signals and the data end signal are not crossed with each other.
4. The communication method for the electronic detonator according to claim 1, wherein the communication protocol for the communication between the master and the slave is:
5. a communication method for electronic detonators according to claim 2 wherein the data start signal, the 4 data signals and the data end signal are generated as follows:
therein, 106And a frequency of 1MThe rate, P _ min, is the pulse period of the array memory, the initial value of Fsrc is the maximum frequency in the communication line, Ferror is the tolerance of the communication frequency, and P _ center is the period of the data pulse.
6. A communication device for an electronic detonator, the device comprising:
a host;
the slave machine is communicated with the host machine in a bus mode, and the slave machine is communicated with the host machine in a synchronous communication mode;
the master machine sends a voltage frequency modulation signal to the slave machine, and the slave machine returns a current signal to the master machine.
7. The communication device for electronic detonators of claim 5 wherein the data sent by the master to the slave comprises: wake-up signal, data start signal, 4 data signals, and data end signal.
8. The communication device for electronic detonators of claim 6 wherein the data sent by the master to the slave comprises: the frequency ranges of the wake-up signal, the data start signal, the 4 data signals and the data end signal are not crossed with each other.
9. The communication device for electronic detonators of claim 5 wherein the data start signal, the 4 data signals and the data end signal are generated as follows:
therein, 106And a frequency of 1M, P _ min is the pulse period of the array memory, the initial value of Fsrc is the maximum frequency in the communication line, Ferror is the tolerance of the communication frequency, and P _ center is the period of the data pulse.
10. The communication device for the electronic detonator according to claim 6, wherein the communication protocol for the communication between the master and the slave is:
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Application publication date: 20200417 |