CN102012892B - Reconfigurable ternary optical processor - Google Patents
Reconfigurable ternary optical processor Download PDFInfo
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- CN102012892B CN102012892B CN2010105841293A CN201010584129A CN102012892B CN 102012892 B CN102012892 B CN 102012892B CN 2010105841293 A CN2010105841293 A CN 2010105841293A CN 201010584129 A CN201010584129 A CN 201010584129A CN 102012892 B CN102012892 B CN 102012892B
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Abstract
The invention relates to a reconfigurable ternary optical processor. The reconfigurable ternary optical processor comprises a ternary optical processor used as the core element of a ternary optical computer, wherein one output end of a rebuilder is linked with the control end of the ternary optical processor, the other output end of the rebuilder is linked with the control end of a main optical path encoder in the ternary optical computer; one input end of the rebuilder is linked with a control optical path encoder in the ternary optical computer, the other input end of the rebuilder is linked with the monitoring system of the ternary optical computer; and the input light of the ternary optical processor is from the main optical path encoder, and the output light is sent to a decoder in the ternary optical computer. The invention provides the ternary optical processor which can satisfy user needs in real time; and the physical state of a stream of optical signals is utilized to control the physical state of another stream of optical signals, and the units of the ternary optical processor can fast build a computing primitive or composite primitive which is required by the user.
Description
Technical field
The present invention relates to a kind of three value optical processors of three value optical computers, particularly a kind of reconfigurable three values
These reconfigurable three value optical processing are applicable to three value optical computers and similar other many-valued computing machines.This
Invention is a research/development platform with three value optical computers, realizes reconfiguring fast of three value optical processors.The present invention can be one group of logical-arithmetic unit that designating unit is configured to meet consumers' demand of three value optical processors, and when user's computing finishes, these unit can be reconfigured again.When the unit of zones of different was configured to different arithmetical unit, three value optical processors became the compound operation device on the whole.
Background technology
The present invention is a hardware platform with three value optical computers, is the basis with the depreciation design theory.Jin Yi teaches the theoretical two kinds of light polarization states (for example horizontal polarization light and orthogonal polarized light) with the polarization direction quadrature of the three value optical computers that proposed in 2000 and comes to represent respectively three different values with unglazed attitude, utilizes liquid crystal and polaroid to realize the conversion of these three kinds of states.Three value optical computer theory structure synoptic diagram are seen accompanying drawing 1.
Main modular in the accompanying drawing 1 has: (it comprises and uses H for light source, main optical path scrambler, three value optical processors
Three horizontal polarization sheets of expression, two vertical polarization sheets representing with V and the processor liquid crystal array that four subregions (HH district, HV district, VV district and VH district) arranged), demoder, control light path scrambler, reconstructor, supervisory system and user interface.Thin solid arrow line among the figure is represented natural light; Fine dotted line is represented ternary light signal; Wherein, the dotted line between main optical path scrambler and the three value optical processors is user's input optical signal A, and the dotted line between control light path scrambler and the reconstructor is user's input optical signal B; Fine dotted line between three value optical processors and demoder is the ternary light signal C of output; Thick arrow line is depicted as electric signal.Claim that the light path that main optical path scrambler, three value optical processors and demoder constitute is a main optical path; And the light path that control light path scrambler and reconstructor constitute is following for the course of work of control three value optical computers: light source continues to send stable natural light beam, and natural light vertical 2 passes main optical path scrambler and control light path scrambler; One of two paths of data that the main optical path scrambler is sent into according to the user (for example A circuit-switched data); Beam modulation is become to express the ternary light signal (light signal A) of user input data; And another circuit-switched data (being the B circuit-switched data) that control light path scrambler is sent into according to the user, with the ternary light signal (light signal B) of the corresponding input data of beam modulation one-tenth expression; The ternary light beam (light signal B) of input data B is injected reconstructor; Reconstructor is carried out automatic screening and guiding by current self structure to the ternary light signal that comes Self Control light path scrambler; Generation is to the actuating signal of three value optical processor liquid crystal arrays, and this " actuating signal " is exactly to import the effect of data B to input data A; The ternary light beam (light signal A) of input data A is injected three value optical processors; This moment, this processor reconstituted concrete arithmetical unit by reconstructor according to the calculation requirement that the user submits to; Restructuring procedure occurs in the user and submits to after the calculation requirement, and in the time period before the input computational data; Under " actuating signal " that reconstructor is sent here participated in, the polarization state that each pixel of liquid crystal array is passed light beam separately through change in the three value optical processors was accomplished computing; The light beam (light signal C) that is penetrated by three value optical processors is operation result, i.e. output data C; Demoder receives the ternary light beam of operation result, and converts light signal to corresponding electric signal, and the electric signal of result of calculation is passed back to the supervisory system of three value optical computers; Supervisory system feeds back to user interface to result of calculation again.
Reconfigurable three value optical processors according to the invention mainly are made up of three value optical processors and reconstructor among Fig. 1, relate to main optical path scrambler, control light path scrambler, demoder and supervisory system simultaneously and come cooperating.
The theoretical foundation of restructural three value optical processors is depreciation design theories that doctor Yan Junyong, Jin Yi professor and doctor Zuo Kaizhong propose.This theory is pointed out: any one in 19683 two input three-valued logic arithmetical unit can be constructed through no more than 6 of making up in 18 kinds of computing primitives.So, in a three-valued logic arithmetic system,, just can construct any three-valued logic arithmetical unit at any time by user's requirement as long as be ready to 18 kinds of computing primitives of sufficient amount.With this theory application to three value optical computer, drawing the typical structure of three value optical logic computing primitives---two polaroids press from both sides the main optical path of a liquid crystal pixel and to the control light path of liquid crystal pixel, we are referred to as three value optical processor typical structures.The typical structure that 2 or 3 computing primitives are combined is called composite elements, uses composite elements can effectively reduce the quantity that arithmetical unit uses typical structure.Before this, this team has confirmed theoretical correctness of above-mentioned restructural three value optical processors and technical feasibility with the software simulation mode, does not but provide hardware configuration, fails to make up practical reconfigurable three value optical processors.
Summary of the invention
The object of the invention: the defective to prior art exists, a kind of reconfigurable three value optical processors are provided,
Provide and to realize making up in real time the three value optics arithmetical unit that satisfy user's needs, promptly be built into computing primitive or the composite elements that the user needs to the unit of three value optical processors.
For achieving the above object, design of the present invention is:
1. respectively paste the V-V district module of V type polaroid formation three value optical processors liquid crystal array both sides; Respectively paste the H-H district module that a H type polaroid constitutes three value optical processors liquid crystal array both sides; Paste a V type polaroid a liquid crystal array front side, rear side pastes the V-H district module that a H type polaroid constitutes three value optical processors; Paste a H type polaroid a liquid crystal array front side, rear side pastes the H-V district module that a V type polaroid constitutes three value optical processors.These four modules constitute three value optical processors among the present invention together.
2. constitute reconstructor with following electricity component and optical element and connecting mode thereof: each output of reconstructor is connected to the control end of a pixel of computing liquid crystal; So each data bit of reconstructor corresponding to three value optical processors; This has determined each of reconstructor identical; So this instructions only specifies one in the reconstructor, i.e. the reconfiguration unit of a computing liquid crystal pixel.The detailed structure of reconfiguration unit and components and parts are seen frame of broken lines 6 among Fig. 2.It is characterized in that by three XOR gates---XOR gate a, XOR gate b and XOR gate c, three high resistant doors---high resistant door a, high resistant door b and high resistant door c, one or, one 8 reorganization order register, two photoelectric commutators---photoelectric commutator a and photoelectric commutator b, two polaroids---are formed by horizontal polarization sheet and vertical polarization sheet e and a stake resistance.Its connecting relation is: the 7th of restructuring directive register and the 1st of main optical path code registers are connected to one of input end of XOR gate a respectively, and the output terminal of XOR gate a is connected to the automatically controlled end of coding liquid crystal a; The 6th and the 0th input end that is connected to XOR gate b respectively of main optical path code registers of restructuring directive register, the output terminal of XOR gate b is connected to the automatically controlled end of coding liquid crystal b; Be connected to the input end of XOR gate c after the output terminal parallel connection of three high resistant doors, another input end of XOR gate c is connected to the 5th of restructuring directive register; The output terminal of XOR gate c is connected to the automatically controlled end of computing liquid crystal; The control end of high resistant door a is connected to the 4th of restructuring directive register; The control end of high resistant door b is connected to the 3rd of restructuring directive register; The control end of high resistant door c is connected to the 2nd of restructuring directive register; This instruction of content representation of the 1st of the restructuring directive register and the 0th to which subregion of 4 primitives of answering at three value optical processors; The output terminal of photoelectric commutator a is connected to the input end of high resistant door a; The output terminal of photoelectric commutator b is connected to the input end of high resistant door b; Or the input end of door is connected to the output terminal of photoelectric commutator a and photoelectric commutator b respectively; The horizontal polarization sheet places between photoelectric commutator a and the control light path scrambler; Vertical polarization sheet e places between photoelectric commutator b and the control light path scrambler; Or the output terminal of door is connected to the input end of high resistant door c; The output that stake resistance one terminates to high resistant door a, high resistant door b and high resistant door c is total to contact, other end ground connection.
According to the foregoing invention design, the present invention adopts following technical proposals:
A kind of reconfigurable three value optical processors; Comprise three value optical processors as three value optical computer core devices; It is characterized in that: have an output terminal of a reconstructor to be connected to the control end of said three value optical processors, another output terminal is connected to the control end of the main optical path scrambler in the said three value optical computers; An input end of reconstructor is from the control light path scrambler in the said three value optical computers, and another input end is from the supervisory system in the three value optical computers; The input light of three value optical processors is from the main optical path scrambler in the said three value optical computers, and its output light is sent into the demoder in the said three value optical computers.
Said reconstructor has N identical reconstruct primitive; N is the data bits that three value optical processors have, and the structure of each reconfiguration unit is: by three XOR gates---XOR gate a, XOR gate b and XOR gate c, three high resistant doors---high resistant door a, high resistant door b and high resistant door c, one or, one 8 reorganization order register, two photoelectric commutators---a photoelectric commutator a and a photoelectric commutator b, two polaroids---are formed by horizontal polarization sheet and vertical polarization sheet e and stake resistance.Its connecting relation is: the 7th of restructuring directive register and the 1st of main optical path code registers are connected to one of input end of XOR gate a respectively, and the output terminal of XOR gate a is connected to the automatically controlled end of coding liquid crystal a; The 6th and the 0th input end that is connected to XOR gate b respectively of main optical path code registers of restructuring directive register, the output terminal of XOR gate b is connected to the automatically controlled end of coding liquid crystal b; Be connected to the input end of XOR gate c after the output terminal parallel connection of high resistant door a, high resistant door b and high resistant door c, another input end of XOR gate c is connected to the 5th of restructuring directive register; The output terminal of XOR gate c is connected to the automatically controlled end of computing liquid crystal; The control end of high resistant door a is connected to the 4th of restructuring directive register; The control end of high resistant door b is connected to the 3rd of restructuring directive register; The control end of high resistant door c is connected to the 2nd of reconstruct 5 order registers; The 1st of restructuring directive register and the 0th content representation are somebody's turn to do which subregion of the pairing primitive of instruction at three value optical processors; The output terminal of photoelectric commutator a is connected to the input end of high resistant door a; The output terminal of photoelectric commutator b is connected to the input end of high resistant door b; Or the input end of door is connected to the output terminal of photoelectric commutator a and photoelectric commutator b respectively; The horizontal polarization sheet places between photoelectric commutator a and the control light path scrambler; Vertical polarization sheet e places between photoelectric commutator b and the control light path scrambler; Or the output terminal of door is connected to the input end of high resistant door c; The output that stake resistance one terminates to high resistant door a, high resistant door b and high resistant door c is total to contact, other end ground connection; When the resistance of stake resistance satisfied any output noble potential of three high resistant doors, its magnitude of voltage was not less than 4.5V, and three high resistant doors are when all closing, and the current potential of its common contact is not higher than 0.3V.
The structure of said three value optical processors is: adopt 4 subregions and each subregion to be the version of a liquid crystal array of two polaroids folder; The polarization direction configuration of the polaroid in 4 districts is different, and the optically-active control end of each pixel of liquid crystal receives the control of the said reconstructor of claim 2.The configuration mode of polaroid is: respectively paste the V-V district module that a V type polaroid constitutes reconfigurable three value optical processors liquid crystal array both sides; Respectively paste the H-H district module that a H type polaroid constitutes reconfigurable three value optical processors liquid crystal array both sides; Paste a V type polaroid a liquid crystal array front side, rear side pastes the V-H district module that a H type polaroid constitutes reconfigurable three value optical processors; Paste a H type polaroid a liquid crystal array front side, rear side pastes the H-V district module that a V type polaroid constitutes reconfigurable three value optical processors.These four modules constitute the reconfigurable three value optical processors among the present invention together.
Control light path and reconstructor jointly controlling to three value optical processor unit.Reconstructor forms according to the value in the restructuring directive register control signal of control light path output is selected and conversion automatically, and will select automatically and conversion after control signal give the control end of restructural three value optical processor liquid crystal.
The present invention has following conspicuous outstanding substantive distinguishing features and remarkable advantage compared with prior art:
The 1st, first hardware of depreciation design theory is specifically realized.
2 realize the reconstruct of optical processor with the compact way that in the restructuring directive register, writes corresponding restructuring directive
Process.
3 have realized the physical state with another bundle light signal of physical state control of a branch of light signal.
The reconstruct work of 4 three value optical processor unit is accomplished by hardware fully.
Description of drawings
Fig. 1 is three value optical computer theory structure synoptic diagram;
Fig. 2 is the detail of construction of a data bit of restructural three value optical processors;
Fig. 3 is the detail of construction of a data bit of three value optical computers.
Embodiment
The preferred embodiments of the present invention accompanying drawings is following:
Embodiment one: referring to Fig. 1; These reconfigurable three value optical processors comprise three value optical processors 3 as three value optical computer core devices; Have an input end of a reconstructor 6 to be connected to the control end of said three value optical processors 3, another output terminal is connected to the control end of the main optical path scrambler 2 in the said three value optical computers; An input end of reconstructor 6 connects the control light path scrambler 5 in the said three value optical computers, and another input end connects the supervisory system 8 in the said three value optical computers; The input light of said three value optical processors 3 is from the main optical path scrambler 2 in the said three value optical computers, and its output light is sent into the demoder 4 in the said three value optical computers.
Embodiment two: present embodiment and embodiment one are basic identical, and special feature is following: in main optical path, polaroid a 13 and polaroid b 15 all adopt V type polaroid, constitute the V-V district module of three value optical processors with a liquid crystal array 14; Polaroid a and polaroid b all adopt H type polaroid, constitute the H-H district module of three value optical processors with a liquid crystal array; Polaroid a adopts the V polaroid, and polaroid b adopts the H polaroid, constitutes the V-H district module of three value optical processors with a liquid crystal array; Polaroid a adopts the H polaroid, and polaroid b adopts the V polaroid, constitutes the H-V district module of three value optical processors with a liquid crystal array.In the control light path, vertical polarization sheet e 27 gets V type polaroid and photoelectric commutator b 25 constitutes the V type polarized light detector in the control light path together; Horizontal polarization sheet 26 gets H type polaroid and photoelectric commutator a 24 constitutes the H type polarized light detector in the control light path together.
Referring to Fig. 2; Said reconstructor 6 has N identical reconfiguration unit; N is the data bits that said three value optical processors 3 have, and each reconfiguration unit is made up of by the connection shown in the frame of broken lines among Fig. 26 reorganization order register 33, photoelectric commutator a 24, photoelectric commutator b 25, horizontal polarization sheet 26 and the vertical polarization sheet e 27 of 23,8 of XOR gate a 16, XOR gate b 17, XOR gate c 18, high resistant door a 19, high resistant door b 20, high resistant door c 22 or door 21, stake resistances.
Referring to Fig. 3; Connect between the electricity component in the present embodiment and with optical element between connect be: the 7th of restructuring directive register 33 with main optical path code registers 32 the 1st is connected to one of input end of XOR gate a 16 respectively, and the output terminal of XOR gate a is connected to the automatically controlled end of coding liquid crystal a 10; The 6th of restructuring directive register and the 0th of main optical path code registers are connected to one of input end of XOR gate b 17 respectively, and the output terminal of XOR gate b is connected to the automatically controlled end of coding liquid crystal b 12; Be connected to the input end of XOR gate c 18 after the output terminal parallel connection of high resistant door a 19, high resistant door b 20 and high resistant door c 22, another input end of XOR gate c is connected to the 5th of restructuring directive register; The output terminal of XOR gate c is connected to the automatically controlled end of computing liquid crystal 14; The control end of high resistant door a is connected to the 4th of restructuring directive register; The control end of high resistant door b is connected to the 3rd of restructuring directive register; The control end of high resistant door c is connected to the 2nd of restructuring directive register; The 1st of restructuring directive register and the 0th content representation are somebody's turn to do which subregion of the pairing primitive of instruction at three value optical processors; The output terminal of photoelectric commutator a 24 is connected to the input end of high resistant door a; The output terminal of photoelectric commutator b 25 is connected to the input end of high resistant door b; Or the input end of door 21 is connected to the output terminal of photoelectric commutator a and photoelectric commutator b respectively; Horizontal polarization sheet 26 places between photoelectric commutator a and the control light path scrambler; Vertical polarization sheet e 27 places between photoelectric commutator b and the control light path scrambler; Or the output terminal of door is connected to the input end of high resistant door c 22; The output that stake resistance 23 1 terminates to high resistant door a, high resistant door b and high resistant door c is total to contact, other end ground connection; When the resistance of stake resistance satisfied any output noble potential of three high resistant doors, its magnitude of voltage was not less than 4.5V, and three high resistant doors are when all closing, and the current potential of its common contact is not higher than 0.3V.
The principle of work of the reconfiguration unit of this reconstructor 6 is following: liquid crystal has the branch of Chang Xuanguang liquid crystal and normal optically inactive liquid crystal; Normal optically inactive liquid crystal is when its automatically controlled end is high level; Liquid crystal has the optically-active effect; The polarization direction of passing the light beam of liquid crystal this moment is rotated 90 degree, does not have the optically-active effect at its automatically controlled end during for low level, and the light beam that pass liquid crystal this moment does not change the polarization direction.Use normal optically inactive liquid crystal in the present embodiment.For the embodiment that uses the Chang Xuanguang liquid crystal; Because Chang Xuanguang liquid crystal duty is opposite with the duty of normal optically inactive liquid 8 crystalline substances; Therefore only need the content negate with each register in the present embodiment, other parts keep the identical operate as normal that gets final product with present embodiment, so no longer repeat to discuss.
The principle of work of scrambler (with the main optical path scrambler is example, and control light path scrambler is identical therewith): light source
Send stable natural light beam, pass vertical polarization sheet a after, only remaining vertical polarization light beam, the light beam of other polarization state is by filtering.This orthogonal polarized light beam liquid crystal a that goes into to encode, if this moment coding liquid crystal a automatically controlled terminal potential be high level, coding liquid crystal a optically-active, at this moment obtaining outgoing beam is the horizontal polarization light beam; Coding liquid crystal a is as if optically inactive, and the outgoing beam that then obtains is the vertical polarization light beam.When the outgoing beam of coding liquid crystal a was the horizontal polarization attitude, this light beam can not continue across vertical polarization sheet b, no matter encode whether optically-active of liquid crystal b like this, the output of main optical path scrambler (outgoing beam of the liquid crystal b that promptly encodes) is always unglazed attitude.When the outgoing beam of coding liquid crystal a was the vertical polarization attitude, this light beam passed vertical polarization sheet b, injected coding liquid crystal b.At this moment, if coding liquid crystal b optically-active, then the main optical path scrambler is output as horizontal polarization light, if coding liquid crystal b optically inactive, then the main optical path scrambler is output as orthogonal polarized light.Can know from above-mentioned cataloged procedure; If with " 1 " expression noble potential, with " 0 " expression electronegative potential, then when the automatically controlled end of coding liquid crystal a is " 1 "; The automatically controlled end of liquid crystal b of no matter encoding is " 1 " or " 0 ", and the output of main optical path scrambler is unglazed attitude; When the automatically controlled end of coding liquid crystal a and coding liquid crystal b was " 00 ", the main optical path scrambler was output as orthogonal polarized light; When the automatically controlled end of coding liquid crystal a and coding liquid crystal b was " 01 ", the main optical path scrambler was output as horizontal polarization light.
The main optical path code registers is identical with control light path code registers role, all is to be used for storing the user
The light state coding of input data (main optical path and control light path).If when the corresponding light state of data was unglazed attitude, the content of main optical path code registers (control light path code registers) was " 11 "; If when the corresponding light state of data was the vertical polarization attitude, the content of corresponding registers was " 00 "; If when the corresponding light state of data was the horizontal polarization attitude, the content of corresponding registers was " 01 ".
The effect of XOR gate a and XOR gate b is that the 7th and the 6th with the restructuring directive register cooperates, with
Reply when main optical path be that to require result of calculation be the situation that the light attitude is arranged to unglazed attitude.When the 7th and the 6th of restructuring directive register was " 0 ", XOR gate a and XOR gate b be effect not.When the 7th and the 6th of restructuring directive register is " 1 ", XOR gate a and XOR gate b will be respectively to signal negate from the 1st of main optical path code registers and the 0th.When structure is transformed into the computing primitive of light attitude to the unglazed attitude of main optical path; Give the 7th of the restructuring directive register to send into 1; So, when the 1st of main optical path code registers is " 1 ", originally make the main optical path scrambler export the control signal of the coding liquid crystal a of unglazed attitude; Can be become the control signal that makes the output of master's 9 light path scramblers that the coding liquid crystal a of light attitude arranged by XOR gate a, and this conversion process is transparent to the scrambler control program.Through the 6th assignment " 0 " or " 1 ", make the signal of XOR gate b control again from the 0th of register main optical path code registers to the restructuring directive register, thus control main optical path scrambler output horizontal polarization light or orthogonal polarized light.When the 7th in restructuring directive register is " 1 ", if the value of the 1st of main optical path code registers is " 0 ", behind XOR gate a, can make the main optical path scrambler see unglazed attitude off, this requirement with this type of computing primitive is consistent.
The 5th of XOR gate c and restructuring directive register cooperates, and control computing liquid crystal 14 is in the Chang Xuanguang state or is in normal optically inactive state.When the computing primitive that makes up when to require the computing liquid crystal be normal optically inactive liquid crystal, give the 5th of the restructuring directive register to send into " 0 ", then XOR gate c is inoperative, and the computing liquid crystal is in normal optically inactive state.When the computing primitive that makes up requires the computing liquid crystal to be the Chang Xuanguang liquid crystal; Give the 5th of the restructuring directive register to send into " 1 "; Then XOR gate c will be to being sent to the control signal negate of computing liquid crystal 14, so computing liquid crystal 14 is equivalent to the Chang Xuanguang liquid crystal on function.
Or door 21 effect be detect the control light path the light attitude arranged.When the control light path when the light attitude is arranged, no matter be orthogonal polarized light or horizontal polarization light, or 21 output all is high level.
Control high resistant door a, high resistant door b and height respectively for the 4th, the 3rd and the 2nd of the restructuring directive register
The opening and closing of resistance door c.When the 4th content of restructuring directive register is " 1 "; High resistant door a opens; This moment is if be horizontal polarization light in the control light path; Then the horizontal polarization light beam impinges upon photoelectric commutator a through the horizontal polarization sheet and goes up generation electric signal " 1 ", and this electric signal becomes the control signal to computing liquid crystal 14 through high resistant door a and XOR gate c; When being other light states in the control light path, can not produce control signal to the computing liquid crystal.When the 3rd content of restructuring directive register is " 1 "; High resistant door b opens; This moment is if be orthogonal polarized light in the control light path; Then the vertical polarization light beam impinges upon photoelectric commutator b through vertical polarization sheet e and goes up generation electric signal " 1 ", and this electric signal becomes the control signal to computing liquid crystal 14 through high resistant door b and XOR gate c; When being other light states in the control light path, can not produce control signal to the computing liquid crystal.When the 2nd content of restructuring directive register was " 1 ", high resistant door c opened, as long as control light path light is arranged this moment, or door 21 will export " 1 ", and this electric signal becomes the control signal to computing liquid crystal 14 through high resistant door c and XOR gate c; When being unglazed attitude in the control light path, can not produce control signal to the computing liquid crystal.It is to be noted especially: this circuit does not allow to open two or three simultaneously among high resistant door a, high resistant door b and the high resistant door c, so do not allow the 4th, the 3rd and the 2nd to restructuring directive register 33 to send into two or three 10 " 1 ".
The 1st of restructuring directive register 33 and the 0th value representation primitive are worth on which subregion of four subregions of optical processors three.Its value " 00 " expression primitive is at the VV subregion, and " 01 " expression primitive is at the VH subregion, and " 10 " expression primitive is at the HV subregion, and " 11 " expression primitive is at the HH subregion.The effect of photoelectric commutator a 24 is to convert the horizontal polarization light signal of controlling light path to high level, and is sent to the input end of high resistant door a.The effect of photoelectric commutator b 25 is that the orthogonal polarized light conversion of signals of controlling light path is become high level, and is sent to the input end of high resistant door b.
Claims (2)
1. reconfigurable three value optical processors comprise three value light as three value optical computer core devices
Learn processor (3); It is characterized in that: have an output terminal of a reconstructor (6) to be connected to the control end of said three value optical processors (3), another output terminal is connected to the control end of the main optical path scrambler (2) in the said three value optical computers; An input end of reconstructor (6) connects the control light path scrambler (5) in the said three value optical computers, and another input end connects the supervisory system (8) in the said three value optical computers; The input light of said three value optical processors (3) is from the main optical path scrambler (2) in the said three value optical computers, and its output light is sent into the demoder (4) in the said three value optical computers;
Said reconstructor (6) has N identical reconfiguration unit; N is the data bits that three value optical processors (3) have, and the structure of each reconfiguration unit is: by three XOR gates, and---photoelectric commutator a (24) and photoelectric commutator b (25), a horizontal polarization sheet (26), a vertical polarization sheet e (27) and a stake resistance (23) are formed for XOR gate a (16), XOR gate b (17) and XOR gate c (18), three high resistant doors---high resistant door a (19), high resistant door b (20) and high resistant door c (22), one or (21), one 8 reorganization order register (33), two photoelectric commutators---; Its connecting relation is: one of the 7th of said restructuring directive register (33) and the 1st input end that is connected to XOR gate a (16) respectively of a main optical path code registers (32), and the output terminal of XOR gate a is connected to the automatically controlled end of the coding liquid crystal a (10) in the said main optical path scrambler (2); The 6th and the 0th input end that is connected to XOR gate b (17) respectively of said main optical path code registers (32) of said restructuring directive register (33), the output terminal of XOR gate b (17) is connected to the automatically controlled end of the coding liquid crystal b (12) in the said main optical path scrambler (2); Be connected to the input end of said XOR gate c (18) after the output terminal parallel connection of said high resistant door a (19), high resistant door b (20) and high resistant door c (22), another input end of XOR gate c (18) is connected to the 5th of said restructuring directive register (32); The output terminal of said XOR gate c (18) is connected to the automatically controlled end of the computing liquid crystal (14) in the said three value optical processors (3); The control end of said high resistant door a (19) is connected to the 4th of said restructuring directive register (33); The control end of said high resistant door b (20) is connected to the 3rd of said restructuring directive register (33); The control end of said high resistant door c (22) is connected to the 2nd of said restructuring directive register (33); The 1st of said restructuring directive register (33) and the 0th content representation are somebody's turn to do which subregion of the pairing primitive of instruction at three value optical processors; The output terminal of said photoelectric commutator a (24) is connected to the input end of said high resistant door a (19); Output 2 ends of said photoelectric commutator b (25) are connected to the input end of said high resistant door b (20); Input end said or door (21) is connected to the output terminal of said photoelectric commutator a (24) and photoelectric commutator b (25) respectively; Said horizontal polarization sheet (26) places between said photoelectric commutator a (24) and the said control light path scrambler (5); Said vertical polarization sheet e (27) places between said photoelectric commutator b (25) and the control light path scrambler (5); Output terminal said or door (21) is connected to the input end of said high resistant door c (22); The output that said stake resistance (23) terminates to high resistant door a (19), high resistant door b (20) and high resistant door c (22) is total to contact, other end ground connection; When the resistance of this stake resistance (23) satisfied any output noble potential of three high resistant doors, its magnitude of voltage was not less than 4.5V, and three high resistant doors are when all closing, and the current potential of its common contact is not higher than 0.3V.
2. according to the described reconfigurable three value optical processors of claim 1; The structure that it is characterized in that said three value optical processors (3) is: 4 subregions are arranged; Each subregion is and connects a computing liquid crystal (14) between two polaroids (13,15); The polarization direction configuration of the polaroid in 4 districts (13,15) is different, and the optically-active control end of each pixel of computing liquid crystal (14) receives the control of an elementary cell of said reconstructor (6); The configuration mode of polaroid is: respectively paste the V-V district module that a V type polaroid constitutes reconfigurable three value optical processors in a computing liquid crystal (14) array both sides; Respectively paste the H-H district module that a H type polaroid constitutes reconfigurable three value optical processors computing liquid crystal array both sides; Paste a V type polaroid a computing liquid crystal array front side, rear side pastes the V-H district module that a H type polaroid constitutes reconfigurable three value optical processors; Paste a H type polaroid a computing liquid crystal array front side, rear side pastes the H-V district module that a V type polaroid constitutes reconfigurable three value optical processors; These four modules constitute the reconfigurable three value optical processors (3) among the present invention together.
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