CN101986277B - Decoder capable of automatically switching startup mode - Google Patents
Decoder capable of automatically switching startup mode Download PDFInfo
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- CN101986277B CN101986277B CN 201010523541 CN201010523541A CN101986277B CN 101986277 B CN101986277 B CN 101986277B CN 201010523541 CN201010523541 CN 201010523541 CN 201010523541 A CN201010523541 A CN 201010523541A CN 101986277 B CN101986277 B CN 101986277B
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Abstract
The invention relates to a decoder capable of automatically switching a startup mode, which comprises a processor unit, a memory unit and a peripheral component interconnect (PCI) connector, a bus switching unit and a memorizer unit, wherein the bus switching unit is connected with the processor unit through a bus asynchronous external memory interface (EMIFA) so as to realize communication, is connected with the memorizer unit through a Flash bus so as to realize communication, and is connected with the PCI connector through a PCI bus so as to realize communication; the PCI bus connector leads out a PCI signal detecting line which is connected with the bus switching unit so as to control the turn-on and turn-off of the communication for the bus switching unit with the memorizer unit and the PCI connector; and the PCI signal detecting line is provided with a high level end which is connected with a resistor. The decoder provided by the invention has the beneficial effects that under the condition of independent power supplying, the decoder can be started independently, and the debugging or software upgrading of the decoder can be independently carried out, so that the self problem of the decoder is solved.
Description
Technical field
The invention belongs to communication technical field, relate in particular to the decoder technique field.
Background technology
Demoder then comprises Video Decoder and audio decoder.At present; Common demoder; Generally the start-up routine with demoder leaves in the driver of PCI (Peripheral Component Interconnect, peripheral component interconnect interface standard) main frame, and is not used for the storer of the start-up routine backup of demoder in the demoder set inside.Like this, in case host pci breaks down or the PCI driver is destroyed, the start-up routine of demoder will be lost fully, and demoder can not be keeped in repair separately and debug.
Summary of the invention
The objective of the invention is in order to overcome the deficiency that existing decoder can not start separately the decoder device of the start-up mode that proposed to automatically switch.
Technical scheme of the present invention is: the decoder device of the start-up mode that can automatically switch; Comprise processor unit, internal storage location and PCI connector; It is characterized in that; Also comprise bus switch unit and memory cell; Said bus switch unit connects through EMIFA bus and processor unit to be realized communicating by letter, and connects through Flash bus and memory cell and realizes communicating by letter, and is connected with the PCI connector through pci bus and realizes communication; Said PCI connector leads to a pci signal detection line and is connected with the bus switch unit in order to control bus switch element and memory cell and cut-offs with the PCI connector is communicated by letter, and said pci signal detection line has the high level end that is connected with resistance.
Said bus switch unit has three control ends; Wherein two control ends are respectively high level and low level; A control end is connected with the PCI connector; PCI connector output low level when the PCI connector is connected with host pci, PCI connector output high level when PCI connector and host pci break off, thus cut-off with the PCI connector is communicated by letter in order to control bus switch element and memory cell.
The invention has the beneficial effects as follows: because demoder of the present invention self has the memory cell of start-up routine that can storage decoder; And has a pci signal detection line that cut-offs that control system bus switch unit and memory cell are communicated by letter with the PCI connector; Therefore demoder of the present invention can be selected to transfer driver or start through the driver of transferring self memory cell through host pci automatically, thereby makes demoder have a complete module of one's own, can start separately; Like this; In case host pci breaks down or the PCI driver is destroyed, just can take off demoder from host pci, under the situation of power supply separately, start demoder separately; Thereby can debug or software upgrading demoder separately, to get rid of the problem of demoder itself.
Description of drawings
Fig. 1 is the structure principle chart of specific embodiment of the present invention.
Fig. 2 is the structure principle chart when starting in the specific embodiment of the present invention.
Fig. 3 is the structure principle chart of practical implementation of the present invention exception when starting.
Fig. 4 is the structure principle chart of specific embodiment bus switch of the present invention unit.
Description of reference numerals: processor unit 1, internal storage location 2, bus switch unit 3, PCI connector 4, memory cell 5, power supply unit 6.
Embodiment
Below in conjunction with accompanying drawing and specific embodiment the present invention is done further explanation.Before again specific embodiment being described, do following basic definition earlier.
Start in the start-up mode of demoder is divided among the present invention and two kinds of patterns of outer startup; The driver of transferring the demoder of backup from the memory cell of himself when demoder is called as interior startup when starting separately, the driver of from host pci, transferring demoder through the PCI connector when demoder is called as outer startup when starting.
In addition; High level and low level definition are relative among the present invention; As to define high level be 5V, and low level is 0V, and this moment, high level and low level were equivalent to digital signal " 1 " and " 0 " in the control signal; Can certainly high level and low level concrete numerical value adjusted or the high level and the digital signal of low level correspondence are done opposite definition, these situation can not be regarded as the restriction to protection scope of the present invention.
As shown in Figure 1; The decoder device of the start-up mode that can automatically switch; Comprise processor unit, internal storage location, PCI connector, bus switch unit and memory cell; Said bus switch unit is through EMIFA bus (Asynchronous ExternalMemory Interface; Asynchronous peripheral storage interface) connects realization with processor unit and communicate by letter, connect through Flash bus and memory cell and realize communicating by letter, be connected with the PCI connector through pci bus and realize communication; Said PCI connector leads to a pci signal detection line and is connected with the bus switch unit in order to control bus switch element and memory cell and cut-offs with the PCI connector is communicated by letter, and said pci signal detection line has the high level end that is connected with resistance.
Processor unit among the figure can be to possess DDR (Double Data Rate SDRAM; The Double Data Rate synchronous DRAM) DSP of special purpose interface (Digital Signal Processor; Digital signal processor) or the specialized media processor, this processor unit also must possess the EMIFA EBI; Internal storage location can be DDR, DDR2, DDR3 etc.; The signal communication resistance of bus switch unit need be less than 5 Ω; And the port number of signal can not be lower than the signal data sum of PCI connector; The bus switch of model as SN74CBT16214 or SN74CBTLV16214 recommended to use in the bus switch unit; This bus switch has three paths to select control end, can switch the connection status of 8 groups of signals, but present embodiment only need switch the connection status of two groups of signals; Memory cell can be NOR (rejection gate FLASH storer) type, also can be NAND (Sheffer stroke gate FLASH storer) type.
Be illustrated in figure 4 as the structure principle chart of specific embodiment bus switch unit; Said bus switch unit has three control end S0, S1 and S2; Wherein two control end S0 and S1 are respectively high level and low level; A control end S2 is connected with the PCI connector; PCI connector output low level when the PCI connector is connected with host pci, PCI connector output high level when PCI connector and host pci break off, thus cut-off with the PCI connector is communicated by letter in order to control bus switch element and memory cell.
The power supply unit 6 that occurs among the figure can not be regarded as the ingredient of this decoder device; It is used for exporting various voltages to each component units of decoder device; The input end of power supply unit 6 inserts 5V voltage and 12V voltage respectively in the present embodiment; 1.2V, 1.8V, 3.3V or 5V voltage are exported in input end output respectively, and input 5V voltage when outer startups is imported 12V voltage during interior startup.
Owing to only need to switch the connection status of two groups of signals in the present embodiment; The control end S0 of processor unit drawn high to high level, the disconnected S1 of control drag down and be low level; Only use control end S2 one end just can realize either-or switch control; When [S0S1S2]=100, the EMIFA bus side is communicated with the PCI side; When [S0S1S2]=101, the EMIFA bus side is communicated with the Flash bus side.
The pci signal detection line is connected to an earth signal connecting pin of PCI connector.When demoder did not connect host pci, the effect of moving on the level of this connecting pin because of pull-up resistor (resistance value 1K Ω here) was rendered as high level, thereby made the control end S2 of processor unit also be high level; In addition, when demoder connected host pci, this connecting pin was low level because of PCI slot on the main frame makes its level move down with being connected to, is low level thereby make the control end S2 of processor unit.Owing to adopt above-mentioned principle; Make the level of the control end S2 of processor unit connect host pci along with demoder or do not connect host pci and high level takes place and low level be digital signaling zero, the logical changes between 1, thereby demoder has changed start-up mode automatically.
Be illustrated in figure 2 as the structure principle chart when starting in the embodiment; When demoder was not connected to host pci, the control end S2 of the processor unit that the pci signal detection line connects is high level also, at this moment; EMIFA bus and Flash bus are connected (simultaneously EMIFA bus and pci bus being broken off) in the bus switch unit; After power supply and other system control signal are stable, demoder will load the start-up routine of demoder, the operation of guiding master routine automatically from memory cell.
Structure principle chart when being illustrated in figure 3 as embodiment and starting outward; When demoder was connected to host pci, the control end S2 of the processor unit that the pci signal detection line connects was a low level, at this moment; The bus switch unit breaks off EMIFA bus and Flash bus (simultaneously EMIFA bus and pci bus being connected); After power supply and other system control signal are stable, demoder will load the start-up routine of demoder, the operation of guiding master routine automatically from host pci.
Those of ordinary skill in the art will appreciate that embodiment described here is in order to help reader understanding's principle of the present invention, should to be understood that protection scope of the present invention is not limited to such special statement and embodiment.Those of ordinary skill in the art can make various other various concrete distortion and combinations that do not break away from essence of the present invention according to these teachings disclosed by the invention, and these distortion and combination are still in protection scope of the present invention.
Claims (1)
1. the decoder device of the start-up mode that can automatically switch; Comprise processor unit, internal storage location and PCI connector; It is characterized in that, also comprise bus switch unit and memory cell, said bus switch unit connects through EMIFA bus and processor unit to be realized communicating by letter; Connecting realization through Flash bus and memory cell communicates by letter; Be connected with the PCI connector through pci bus and realize that communication, said PCI connector lead to a pci signal detection line and is connected with the bus switch unit in order to control bus switch element and memory cell and cut-offs with the PCI connector is communicated by letter, said pci signal detection line has the high level end that is connected with resistance; Said bus switch unit has three control ends; Wherein two control ends are respectively high level and low level; A control end is connected with the PCI connector; PCI connector output low level when the PCI connector is connected with host pci, PCI connector output high level when PCI connector and host pci break off, thus cut-off with the PCI connector is communicated by letter in order to control bus switch element and memory cell.
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| Application Number | Priority Date | Filing Date | Title |
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| CN 201010523541 CN101986277B (en) | 2010-10-29 | 2010-10-29 | Decoder capable of automatically switching startup mode |
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| CN 201010523541 CN101986277B (en) | 2010-10-29 | 2010-10-29 | Decoder capable of automatically switching startup mode |
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| CN101986277A CN101986277A (en) | 2011-03-16 |
| CN101986277B true CN101986277B (en) | 2012-11-28 |
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1523889A (en) * | 2003-02-17 | 2004-08-25 | ��ķɭ���ó��˾ | Method for initializing a digital decoder and decoder implementing such a method |
| CN101802782A (en) * | 2007-09-01 | 2010-08-11 | D2影音公司 | Be used on high definition audio bus, starting the system and method for the processor of coding decoder |
| CN201984310U (en) * | 2010-10-29 | 2011-09-21 | 成都九洲电子信息系统有限责任公司 | Decoder device capable of automatically switching start mode |
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2010
- 2010-10-29 CN CN 201010523541 patent/CN101986277B/en active Active
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1523889A (en) * | 2003-02-17 | 2004-08-25 | ��ķɭ���ó��˾ | Method for initializing a digital decoder and decoder implementing such a method |
| CN101802782A (en) * | 2007-09-01 | 2010-08-11 | D2影音公司 | Be used on high definition audio bus, starting the system and method for the processor of coding decoder |
| CN201984310U (en) * | 2010-10-29 | 2011-09-21 | 成都九洲电子信息系统有限责任公司 | Decoder device capable of automatically switching start mode |
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| CN101986277A (en) | 2011-03-16 |
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