CN101924169A - Package structure of optical chip and manufacturing method thereof - Google Patents
Package structure of optical chip and manufacturing method thereof Download PDFInfo
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- CN101924169A CN101924169A CN 200910150830 CN200910150830A CN101924169A CN 101924169 A CN101924169 A CN 101924169A CN 200910150830 CN200910150830 CN 200910150830 CN 200910150830 A CN200910150830 A CN 200910150830A CN 101924169 A CN101924169 A CN 101924169A
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- chip
- packaging structure
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- metal balls
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48257—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a die pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/49105—Connecting at different heights
- H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Abstract
The invention discloses a package structure of an optical chip and a manufacturing method thereof. The package structure comprises the optical chip and at least two conductive metal balls. The optical chip is provided with an optical surface, a rear face and at least two conductive through holes, wherein, the optical surface faces upwards and the rear face faces downwards; and the conductive through holes penetrate the optical chip, the first ends of the conductive through holes are electrically connected with the optical surface, and the second ends of the conductive through holes are connected to the rear surface. The conductive metal balls are electrically connected to the second ends of the conductive through holes.
Description
[technical field]
The present invention relates to a kind of packaging structure and manufacture method thereof of optical chip, particularly about a kind of packaging structure and manufacture method thereof with optical chip of conductive through hole.
[background technology]
Along with quality of the life improves and the environmental consciousness new line, the exploitation of green resource and use are more and more widely, a key project wherein is various light-emitting diodes (light emitting diode, LED) application in illumination, because light-emitting diode has advantages such as power saving and long-life, therefore the technology relevant with light-emitting diode constantly is developed and improves, to promote light taking-up efficient (light extraction efficiency), to improve radiating efficiency and increase the service life etc.Above-mentioned improvement is except relevant with the semi-conducting material of light-emitting diode chip for backlight unit itself, and also there is great correlation in the packaged type with light-emitting diode chip for backlight unit.
Please refer to shown in Fig. 1,2 and 3, it discloses the packaging structure of 3 kinds of existing light-emitting diode chip for backlight unit.
As shown in Figure 1, a kind of packaging structure of existing light-emitting diode chip for backlight unit comprises a substrate 11, a circuit layer 12, an adhesion layer 13, an optical chip 14, at least two leads 15 and a printing opacity encapsulating material 16.The front of described substrate 11 forms described circuit layer 12, and described optical chip 14 utilizes described adhesion layer 13 to be fixed on the described substrate 11.The optical surface of described optical chip 14 (that is light-emitting area) up and have weld pad (indicate), it utilizes described lead 15 to be electrically connected to described circuit layer 12.At last, utilize described printing opacity encapsulating material 16 to coat positions such as described optical chip 14 of protection and lead 15, can finish encapsulation procedure.
As shown in Figure 2, the packaging structure of another kind of existing light-emitting diode chip for backlight unit comprises one first pin 21, one second pin 22, an adhesion layer 23, an optical chip 24, at least two leads 25, a printing opacity encapsulating material 26 and a fluorescent packing material 27.The end face of described first pin 21 is recessed to form a cup-shaped recess 211, makes described optical chip 24 utilize described adhesion layer 23 to be fixed in the described cup-shaped recess 211.Its complementary space of described cup-shaped recess 211 then utilizes described fluorescent packing material 27 to be filled up.The optical surface of described optical chip 24 (that is light-emitting area) up and have weld pad (indicate), it utilizes described lead 25 to be electrically connected to described first pin 21 and second pin 22.At last, utilize described printing opacity encapsulating material 26 to coat positions such as protection described optical chip 24, lead 25 and fluorescent packing material 27, can finish encapsulation procedure.
As shown in Figure 3, the packaging structure of another existing light-emitting diode chip for backlight unit comprises a substrate 31, two conducting end 32, two projections 33 (bump), an optical chip 34, two electrodes 35 and a printing opacity encapsulating material 36.Two sides of described substrate 31 form described conducting end 32, the optical surface of described optical chip 34 (that is light-emitting area) down and have weld pad (indicate), it forms described electrode 35, and utilizes described projection 33 to be electrically connected to described conducting end 32.At last, utilize described printing opacity encapsulating material 36 to coat positions such as described optical chip 34 of protection and projection 33, can finish encapsulation procedure.
Yet, the packaging structure of the light-emitting diode chip for backlight unit of Fig. 1 to 3 still has following problems on reality is used, for example: Fig. 1 and 2 optical chip the 14, the 24th, utilize described lead 15,25 to import power supplys, but the part of described lead 15,25 is positioned at the two sides top of described optical chip 14,24, can stop the outside emission of light and influence light to take out efficient.Moreover, Fig. 1 and 2 optical chip the 14, the 24th utilize described adhesion layer 13,23 to be separately fixed on the described substrate 11 or first pin 21, but the heat-conducting effect of described adhesion layer 13,23 is relatively poor, can influence described optical chip 14,24 with the thermal energy transfer that the produces radiating efficiency to the described substrate 11 or first pin 21.When the heat energy that produces when described optical chip 14,24 can't effectively disperse, will influence the luminous efficiency of semi-conducting material of the optical surface of described optical chip 14,24.Therefore, consider the heat radiation factor, Fig. 1 and 2 packaging structure only are useful in the light-emitting diode chip for backlight unit of package power below 1 watt (w) usually.On the other hand, though the optical chip 34 of the chip upside-down mounting type of Fig. 3 is not provided with lead, and the heat energy that described optical chip 34 produces can be passed to described conducting end 32 and substrate 31 by described electrode 35 and projection 33, and has higher relatively radiating efficiency.But,,, then could reflect for several times and outwards penetrate so the light that the optical surface of described optical chip 34 produces must be projected to earlier on described electrode 35 or the substrate 31 because the optical surface of described optical chip 34 is down; Perhaps, light must upwards penetrate described optical chip 34, then could reflect for several times outwards to penetrate, so the chip upside-down mounting type packaging structure of Fig. 3 still can cause the light taking-up efficient of described optical chip 34 low relatively.
Die, be necessary to provide a kind of packaging structure and manufacture method thereof of optical chip, to solve the existing in prior technology problem.
[summary of the invention]
Main purpose of the present invention is to provide a kind of packaging structure and manufacture method thereof of optical chip, it is to utilize conductive through hole (via) to electrically connect the optical surface and the back side, it is luminous up to avoid influencing optical surface so that make the power circuit layout be positioned at the back side, and then promotes light taking-up efficient.
Secondary objective of the present invention is to provide a kind of packaging structure and manufacture method thereof of optical chip, it is to utilize conductive through hole to electrically connect the optical surface and the back side, so that the back side is derived heat energy rapidly, and then promote radiating efficiency down and by conductive metal balls, and increase the service life.
Another object of the present invention is to provide a kind of packaging structure and manufacture method thereof of optical chip, it is to utilize conductive through hole to electrically connect the optical surface and the back side, and transparent cover plate is used in collocation, make the size of overall package structure can narrow down to chip size packages (the wafer level chip scale package of wafer scale, and then help the microminiaturization (miniaturization) of packaging structure WLCSP).
For reaching above-mentioned purpose, the invention provides a kind of packaging structure of optical chip, it comprises an optical chip and at least two conductive metal balls.Described optical chip has an optical surface, a back side and at least two conductive through holes, described optical surface up, and the described back side is down.Described conductive through hole runs through described optical chip, and one first end of described conductive through hole electrically connects described optical surface, and one second end is connected to the described back side.Described conductive metal balls is electrically connected to second end of described conductive through hole.
In one embodiment of this invention, the described back side more comprises a redistributing layer (re-distribution layer, RDL), described redistributing layer electrically connects described second end and the described conductive metal balls of described conductive through hole.
In one embodiment of this invention, described optical chip utilizes described conductive metal balls to be incorporated on the substrate.Has a printing opacity encapsulating material on the described substrate, to coat described optical chip and conductive metal balls.
In one embodiment of this invention, be provided with a fluorescent encapsulant layer in addition on the described optical surface of described optical chip.Be provided with a transparent cover plate in addition on the described fluorescent encapsulant layer.Described transparent cover plate is selected from glass cover-plate.
In one embodiment of this invention, be provided with one on the described optical surface of described optical chip in addition and have the transparent cover plate of a depressed part, and insert a fluorescent packing material in the described depressed part.Described transparent cover plate is selected from glass cover-plate.
In one embodiment of this invention, described conductive metal balls is selected from tin projection (solder-containingbump), golden projection (gold-containing bump) or tin ball (solder ball).Described optical chip is a light-emitting diode chip for backlight unit.
On the other hand, the invention provides a kind of manufacture method of packaging structure of optical chip, it comprises step: an optics wafer is provided, comprises several optical chips, wherein said optical chip has an optical surface and a back side; On the described optical chip of described optics wafer, form at least two conductive through holes respectively, wherein said conductive through hole runs through described optical chip, described conductive through hole comprises first end that electrically connects described optical surface, and second end that is connected to the described back side; The described back side at each described optical chip of described optics wafer forms at least two conductive metal balls respectively, and described conductive metal balls is electrically connected to second end of described conductive through hole respectively; And the described optics wafer of cutting, to separate described optical chip.
In one embodiment of this invention, before forming described conductive metal balls, other forms a redistributing layer (re-distribution layer at the described back side of the described optical chip of described optics wafer, RDL), and described redistributing layer be described second end and the described conductive metal balls that electrically connects described conductive through hole.
In one embodiment of this invention, after separating described optical chip, utilize described conductive metal balls that described optical chip is fixedly arranged on a plurality of counterpart substrates.Described substrate has a printing opacity encapsulating material, to coat described optical chip and conductive metal balls.
In one embodiment of this invention, before forming described conductive metal balls, a fluorescent encapsulant layer and a transparent cover plate are set in regular turn on the described optical surface of described optical chip in addition.Described transparent cover plate is selected from glass cover-plate.
In one embodiment of this invention, before forming described conductive metal balls, a transparent cover plate with a depressed part is set on the described optical surface of described optical chip in addition, inserts a fluorescent packing material in the wherein said depressed part.Described transparent cover plate is selected from glass cover-plate.
In one embodiment of this invention, described conductive metal balls is selected from tin projection, golden projection or tin ball.Described optical chip is a light-emitting diode chip for backlight unit.
[description of drawings]
Fig. 1: the schematic diagram of the packaging structure of existing light-emitting diode chip for backlight unit.
Fig. 2: the schematic diagram of the packaging structure of another existing light-emitting diode chip for backlight unit.
Fig. 3: the schematic diagram of the packaging structure of an existing light-emitting diode chip for backlight unit again.
Fig. 4 A, 4B, 4C, 4D, 4E, 4F and 4G: the schematic diagram of the manufacture method of the packaging structure of the optical chip of first embodiment of the invention.
Fig. 5 A, 5B, 5C, 5D, 5E, 5F, 5G and 5H: the schematic diagram of the manufacture method of the packaging structure of the optical chip of second embodiment of the invention.
Fig. 6 A, 6B, 6C, 6D, 6E, 6F and 6G: the schematic diagram of the manufacture method of the packaging structure of the optical chip of third embodiment of the invention.
[embodiment]
For allowing above-mentioned purpose of the present invention, feature and advantage become apparent, preferred embodiment of the present invention cited below particularly, and conjunction with figs. are described in detail below:
Please refer to shown in Fig. 4 A, 4B, 4C, 4D, 4E, 4F and the 4G, the manufacture method of the packaging structure of the optical chip of first embodiment of the invention mainly comprises the following step: an optics wafer 4 is provided, it comprises several optical chips 40, and wherein said optical chip 40 has an optical surface 41 and a back side 42; Described optical chip 40 at described optics wafer 4 forms at least two conductive through holes 43 respectively, wherein said conductive through hole 43 runs through described optical chip 40, one first end of described conductive through hole 43 electrically connects described optical surface 41, and one second end is connected to the described back side 42; The back side 42 at each described optical chip 40 of described optics wafer 4 forms at least two conductive metal balls 44 respectively, and described conductive metal balls 44 is electrically connected to second end of described conductive through hole 43 respectively; And the described optics wafer 4 of cutting, to separate described optical chip 40.
Please refer to shown in Fig. 4 A, the manufacture method first step of the packaging structure of the optical chip of first embodiment of the invention is: an optics wafer 4 is provided, it comprises several optical chips 40, and wherein said optical chip 40 has an optical surface 41 and a back side 42 respectively.In this step, the optical chip 40 that described optics wafer 4 comprised preferably is selected from light-emitting diodes chip (LED chip), organic light-emitting diodes chip (OLED chip) or macromolecular LED two pole piece sheets optical chips such as (PLED chip).According to actual demand, the base material of described optics wafer 4 can be selected from silicon (Si), gallium nitride (GaN) or other semiconductor substrates.The optical surface 41 of described optical chip 40 is meant the surface that has the optical semiconductor material and can produce light reaction, it can be selected from the optical surface of single or multiple lift, and can produce at least a coloured light according to electroluminescence (electro-luminescent) or luminescence generated by light (photo-luminescent) principle.In the present invention, do not limit base material kind or the number of plies of described optical surface 41 and the color of generation coloured light thereof of described optics wafer 4.Moreover the described back side 42 is meant that described optical chip 40 do not have another surface of optical semiconductor material, the base materials of the described back side 42 usually exposed described optics wafers 4.
Please refer to shown in Fig. 4 B and the 4C, manufacture method second step of the packaging structure of the optical chip of first embodiment of the invention is: each the described optical chip 40 at described optics wafer 4 forms at least two conductive through holes 43 respectively, wherein said conductive through hole 43 runs through described optical chip 40, described conductive through hole 43 has first end that electrically connects described optical surface 41, and second end that is connected to the described back side 42.In this step, the present invention is that (wafer through hole, WTH) technology (also is called the silicon wafer through hole technology that runs through, through silicon via, TSV) each optical chip 40 of the described optics wafer 4 of processing with the wafer through hole in selection.Above-mentioned wafer through hole technology can select to utilize the first through holes that run through the described optical surface 41 and the back side 42 that form of mode such as laser drill, machine drilling or photoresist (photo-resist) collocation etching, then utilize plating (electroplating), electroless plating (electroless plating) or printing modes such as (printing) that copper or other conducting metals are inserted in the described through hole again, form described conductive through hole 43 (throughvia) by this.First end of described conductive through hole 43 electrically connects described optical surface 41, and second end is connected to the described back side 42, and is exposed to the described back side 42.
Shown in Fig. 4 C, after this step and before the third step, the back side 42 that the present invention preferably is chosen in the optical chip 40 of described optics wafer 4 is pre-formed a redistributing layer 420 (re-distributionlayer, RDL), described redistributing layer 420 comprises at least two weld pads, and can select to form an insulating barrier 421.The weld pad correspondence of described redistributing layer 420 is incorporated into second end of described conductive through hole 43, and 421 of described insulating barriers cover the periphery of described weld pad and other zones beyond the described weld pad 421.
Please refer to shown in Fig. 4 D, the manufacture method third step of the packaging structure of the optical chip of first embodiment of the invention is: the back side 42 at each described optical chip 40 of described optics wafer 4 forms at least two conductive metal balls 44 respectively, and described conductive metal balls 44 is electrically connected to second end of described conductive through hole 43 respectively.In this step, described conductive metal balls 44 can select to be electrically connected to indirectly by the weld pad of described redistributing layer 420 second end of described conductive through hole 43; Perhaps, if described redistributing layer 420,44 second ends that can directly be electrically connected to described conductive through hole 43 of described conductive metal balls are not set.Moreover, in this step, the optional golden projection (gold-containing bump) that contains tin projection (solder-containing bump), the tin ball (solder ball) of tin material or ashbury metal certainly or contain gold copper-base alloy or billon of described conductive metal balls.The present invention can utilize existing plating or printing process collocation Reflow Soldering (reflow) processing procedure, and directly forms described conductive metal balls 44 (that is tin projection) at the back side 42 of each optical chip 40 of described optics wafer 4; Perhaps, the mode of utilizing gold thread routing (wire bonding) and pulling apart directly forms described conductive metal balls 44 (that is containing golden projection) at the back side 42 of each optical chip 40 of described optics wafer 4; Perhaps, also can earlier prefabricated described conductive metal balls 44, again it is soldered to the back side 42 (that is tin ball) of each optical chip 40 of described optics wafer 4.When described conductive metal balls 44 is selected from tin projection, need be pre-formed at least one ball substrate layer (not illustrating) usually on the weld pad of described redistributing layer 420 or on second end of described conductive through hole 43, to increase bond strength.In the present embodiment, also may exist some conductive metal balls 44 not electrically connect with second end of described conductive through hole 43 in addition, more described conductive metal balls 44 still can be in order to support described optical chip 40 or to derive the heat energy of described optical chip 40 this moment.
Please refer to shown in Fig. 4 E and the 4F, manufacture method the 4th step of the packaging structure of the optical chip of first embodiment of the invention is: cut described optics wafer 4, to separate described optical chip 40.In this step, the present invention can select to utilize modes such as machine cuts, laser cutting or the cutting of water cutter to cut described optics wafer 4, to separate (singulating) described optical chip 40.After cutting, each described optical chip 40 all has described optical surface 41, the back side 42 and at least two conductive through holes 43, described optical surface 41 up, and the described back side 42 is down.Described conductive through hole 43 runs through described optical chip 40, and first end of described conductive through hole 43 electrically connects described optical surface 41, and second end is connected to the described back side 42.Described conductive metal balls 44 is electrically connected to second end of described conductive through hole 43.So, described conductive metal balls 44 can be directed to the optical surface 41 of each optical chip 40 by described conductive through hole 43 with an external power source, to produce light reaction (for example producing specific coloured light).
Please refer to shown in Fig. 4 G, after separating described optical chip 40, first embodiment of the invention can select further to utilize described conductive metal balls 44 that described optical chip 40 is fixedly arranged on respectively on a plurality of counterpart substrates 45.Described substrate 45 is package type printed circuit boards, and preferably is selected from a cup-shaped substrate, but is not limited to this.When described substrate 45 was selected from the cup-shaped substrate, described substrate 45 filled up a printing opacity encapsulating material 46, to coat described optical chip 40 of protection and conductive metal balls 44.In case of necessity, described printing opacity encapsulating material 46 can be selected the blending phosphor powder, to change the color of the coloured light that described optical chip 40 produces.So, promptly finish the encapsulation procedure of the optical chip 40 of present embodiment.When described substrate 45 and conductive metal balls 44 importings one external power source, external power source can be directed to the optical surface 41 of described optical chip 40 by described conductive through hole 43, to produce light reaction (for example producing specific coloured light).Simultaneously, producing the heat energy that causes during the light reaction, then can export to described substrate 45 by described conductive metal balls 44 (and conductive through hole 43).
Please refer to shown in Fig. 5 A, 5B, 5C, 5D, 5E, 5F and the 5G, the packaging structure of the optical chip of second embodiment of the invention and manufacture method thereof are similar in appearance to first embodiment of the invention, but the manufacture method of the packaging structure of the optical chip of described second embodiment is to comprise the following step: an optics wafer 5 is provided, it comprises several optical chips 50, and wherein said optical chip 50 has an optical surface 51 and a back side 52; Each described optical chip 50 at described optics wafer 5 forms at least two conductive through holes 53 respectively, wherein said conductive through hole 53 runs through described optical chip 50, described conductive through hole 53 has first end that electrically connects described optical surface 51, and second end that is connected to the described back side 52; An one fluorescent encapsulant layer 54 and a transparent cover plate 55 are set on the optical surface 51 of described optical chip 50 in regular turn; The back side 52 at each described optical chip 50 of described optics wafer 5 forms at least two conductive metal balls 56 respectively, and described conductive metal balls 56 is electrically connected to second end of described conductive through hole 53 respectively; And the described optics wafer 5 of cutting, to separate described optical chip 50.Moreover, shown in Fig. 5 C, after second step and before the third step, the back side 52 that the present invention preferably is chosen in the optical chip 50 of described optics wafer 5 is pre-formed a redistributing layer 520, it comprises at least two weld pads equally, and can select to form an insulating barrier 521.Shown in Fig. 5 D, described fluorescent encapsulant layer 54 is to be mixed by phosphor powder and adhesive agent, and the present invention does not limit its mixed proportion.Described fluorescent encapsulant layer 54 is in order to the color of the coloured light that changes described optical chip 50 and produce.Shown in Fig. 5 E, described transparent cover plate 55 preferably is selected from glass cover-plate.
Please refer to shown in Fig. 5 G, after separating described optical chip 50, all have described fluorescent encapsulant layer 54 and transparent cover plate 55 on the optical surface 51 of each optical chip 50, described transparent cover plate 55 has protective effect, therefore can replace the printing opacity encapsulating material.At this moment, finished the encapsulation procedure of the optical chip 50 of present embodiment.Moreover shown in Fig. 5 H, when assembling, second embodiment of the invention can directly utilize described conductive metal balls 56 that described optical chip 50 is fixedly arranged on several corresponding circuits plates 57.When described circuit board 57 and conductive metal balls 56 importings one external power source, external power source can be directed to the optical surface 51 of described optical chip 50 by described conductive through hole 53, to produce light reaction (for example producing specific coloured light).Simultaneously, producing the heat energy that causes during the light reaction, then can export to described circuit board 57 by described conductive metal balls 56 (and conductive through hole 53).
Please refer to shown in Fig. 6 A, 6B, 6C, 6D, 6E, 6F and the 6G, the packaging structure of the optical chip of third embodiment of the invention and manufacture method thereof are similar in appearance to the present invention first and two embodiment, but the manufacture method of the packaging structure of the optical chip of described the 3rd embodiment is to comprise the following step: an optics wafer 6 is provided, it comprises several optical chips 60, and wherein said optical chip 60 has an optical surface 61 and a back side 62; Each described optical chip 60 at described optics wafer 6 forms at least two conductive through holes 63 respectively, wherein said conductive through hole 63 runs through described optical chip 60, described conductive through hole 63 has first end that electrically connects described optical surface 61, and second end that is connected to the described back side 62; One transparent cover plate 64 is set on the optical surface 61 of described optical chip 60, and it has a depressed part 641, has a fluorescent packing material 65 in the described depressed part 641; The back side 62 at each described optical chip 60 of described optics wafer 6 forms at least two conductive metal balls 66 respectively, and described conductive metal balls 66 is electrically connected to second end of described conductive through hole 63 respectively; And the described optics wafer 6 of cutting, to separate described optical chip 60.Moreover, shown in Fig. 6 C, after second step and before the third step, the back side 62 that the present invention preferably is chosen in the optical chip 60 of described optics wafer 6 is pre-formed a redistributing layer 620, it comprises at least two weld pads equally, and can select to form an insulating barrier 621.Shown in Fig. 6 D, described transparent cover plate 64 preferably is selected from glass cover-plate, and described transparent cover plate 64 preferably utilizes an adhesion layer (not illustrating) to be combined on the described optical surface 61.Described depressed part 641 is to form various formation, for example rectangle, circle, arc or other geometries.Described fluorescent packing material 65 is to be mixed by phosphor powder and adhesive agent, and the present invention does not limit its mixed proportion.Described fluorescent encapsulant layer 65 is in order to the color of the coloured light that changes described optical chip 60 and produce.
Please refer to shown in Fig. 6 F, after separating described optical chip 60, all have described fluorescent packing material 65 and transparent cover plate 64 on the optical surface 61 of each optical chip 60, described transparent cover plate 64 has protective effect, therefore can replace the printing opacity encapsulating material.At this moment, finished the encapsulation procedure of the optical chip 60 of present embodiment.Moreover shown in Fig. 6 G, when assembling, third embodiment of the invention can directly utilize described conductive metal balls 66 that described optical chip 60 is fixedly arranged on several corresponding circuits plates 67.When described circuit board 67 and conductive metal balls 66 importings one external power source, external power source can be directed to the optical surface 61 of described optical chip 60 by described conductive through hole 63, to produce light reaction (for example producing specific coloured light).Simultaneously, producing the heat energy that causes during the light reaction, then can export to described circuit board 67 by described conductive metal balls 66 (and conductive through hole 63).
As mentioned above, packaging structure compared to existing light-emitting diode chip for backlight unit often takes out efficient because of lead being set or influencing light with the flip chip encapsulation, perhaps, adhesion layer influences shortcomings such as radiating efficiency because of being set, the present invention of Fig. 4 to 6 utilizes described conductive through hole 43,53,63 to electrically connect the described optical surface 41,51,61 and the back side 42,52,62, effectively avoid influencing described optical surface 41,51,61 so that make the power circuit layout be positioned at the described back side 42,52,62 luminous up, takes out efficient so help promoting light.Moreover, because the back side 42,52,62 of described optical chip 40,50,60 is down, therefore can conveniently utilize described conductive metal balls 44,56,66 that heat energy is derived rapidly, thus help promoting radiating efficiency, and can increase the service life.Because the present invention has higher radiating efficiency, therefore not only be useful in the light-emitting diode chip for backlight unit of package power below 1 watt (w), and also be useful in the light-emitting diode chip for backlight unit of package power more than 1 watt (w).In addition, when described transparent cover plate 55,64 is used in 40,50,60 collocation of described optical chip, described transparent cover plate 55,64 can replace the printing opacity encapsulating material, therefore make the size of overall package structure can narrow down to chip size packages (the wafer level chipscale package of wafer scale, and then help the microminiaturization (miniaturization) of packaging structure WLCSP).
The present invention is described by above-mentioned related embodiment, yet the foregoing description is only for implementing example of the present invention.Must be pointed out that disclosed embodiment does not limit the scope of the invention.On the contrary, being contained in the spirit of claims and the modification and impartial setting of scope is included in the scope of the present invention.
Claims (12)
1. the packaging structure of an optical chip, it is characterized in that: the packaging structure of described optical chip comprises:
One optical chip has an optical surface, a back side and at least two conductive through holes, and wherein said conductive through hole runs through described optical chip, and one first end of described conductive through hole electrically connects described optical surface; And
At least two conductive metal balls are electrically connected to one second end of described conductive through hole.
2. the packaging structure of optical chip as claimed in claim 1, it is characterized in that: the described back side more comprises a redistributing layer, and described redistributing layer electrically connects described second end and the described conductive metal balls of described conductive through hole.
3. the packaging structure of optical chip as claimed in claim 1, it is characterized in that: described optical chip utilizes described conductive metal balls to be incorporated on the substrate, has a printing opacity encapsulating material on the described substrate, to coat described optical chip and described conductive metal balls.
4. the packaging structure of optical chip as claimed in claim 1 is characterized in that: be provided with a fluorescent encapsulant layer on the described optical surface of described optical chip in addition, be provided with a transparent cover plate in addition on the described fluorescent encapsulant layer.
5. the packaging structure of optical chip as claimed in claim 1 is characterized in that: be provided with one on the described optical surface of described optical chip in addition and have the transparent cover plate of a depressed part, and insert a fluorescent packing material in the described depressed part.
6. the packaging structure of optical chip as claimed in claim 1, it is characterized in that: described optical chip is a light-emitting diode chip for backlight unit.
7. the manufacture method of the packaging structure of an optical chip, it is characterized in that: the manufacture method of the packaging structure of described optical chip comprises:
One optics wafer is provided, comprises several optical chips, wherein said optical chip has an optical surface and a back side;
On the described optical chip of described optics wafer, form at least two conductive through holes respectively, wherein said conductive through hole runs through described optical chip, and described conductive through hole comprises first end that electrically connects described optical surface, and second end that is connected to the described back side;
The described back side at each described optical chip of described optics wafer forms at least two conductive metal balls respectively, and described conductive metal balls is electrically connected to described second end of described conductive through hole respectively; And
Cut described optics wafer, to separate described optical chip.
8. the manufacture method of the packaging structure of optical chip as claimed in claim 7, it is characterized in that: before forming described conductive metal balls, other forms a redistributing layer at the described back side of the described optical chip of described optics wafer, and described redistributing layer is described second end and the described conductive metal balls that electrically connects described conductive through hole.
9. the manufacture method of the packaging structure of optical chip as claimed in claim 7, it is characterized in that: after separating described optical chip, utilize described conductive metal balls that described optical chip is fixedly arranged on a plurality of counterpart substrates, described substrate has a printing opacity encapsulating material, to coat described optical chip and conductive metal balls.
10. the manufacture method of the packaging structure of optical chip as claimed in claim 7, it is characterized in that: before forming described conductive metal balls, in addition a fluorescent encapsulant layer is set on the described optical surface of described optical chip, on the described fluorescent encapsulant layer transparent cover plate is set in addition.
11. the manufacture method of the packaging structure of optical chip as claimed in claim 7, it is characterized in that: before forming described conductive metal balls, one transparent cover plate with a depressed part is set on the described optical surface of described optical chip in addition, inserts a fluorescent packing material in the wherein said depressed part.
12. the manufacture method of the packaging structure of optical chip as claimed in claim 7 is characterized in that: described optical chip is a light-emitting diode chip for backlight unit.
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102593313A (en) * | 2011-01-14 | 2012-07-18 | 旭德科技股份有限公司 | Package carrier and method for manufacturing the same |
| CN107452769A (en) * | 2017-05-22 | 2017-12-08 | 茆胜 | A kind of OLED minitype displayer and its pad bonding method |
| WO2018072050A1 (en) * | 2016-10-19 | 2018-04-26 | 璩泽明 | Chip packaging structure |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20050044518A (en) * | 2001-11-19 | 2005-05-12 | 산요덴키가부시키가이샤 | Compound semiconductor light emitting device and its manufacturing method |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102593313A (en) * | 2011-01-14 | 2012-07-18 | 旭德科技股份有限公司 | Package carrier and method for manufacturing the same |
| WO2018072050A1 (en) * | 2016-10-19 | 2018-04-26 | 璩泽明 | Chip packaging structure |
| CN107452769A (en) * | 2017-05-22 | 2017-12-08 | 茆胜 | A kind of OLED minitype displayer and its pad bonding method |
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| CN101924169B (en) | 2012-07-18 |
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