CN101895767B - Method for storing and updating AVS inter-frame predicated reference pixel - Google Patents
Method for storing and updating AVS inter-frame predicated reference pixel Download PDFInfo
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Abstract
The invention discloses a method for storing and updating an AVS inter-frame predicated reference pixel, belonging to the technical field of video coding and decoding and aiming at solving the technical problem of storing and updating reference pixels. Reference pixels required for inter-frame predication are respectively stored in an upper macro block row memory, a left macro block memory and a bottom right corner register, and both the memories and registers are from inside of a chip. The method comprises processing in the order from zero to three of the sub-block number as for one macro block; the processing of obtaining the reference pixel of each sub-block comprises two parts of predication preprocessing and predication post-processing; the method ensures that the 33 pixels required for AVS inter-frame predication are smartly stored and updated, thereby saving the memory resources, preventing reading data from an off-chip data memory in the inter-frame predication and reconstruction process, greatly improving the efficiency of the whole inter-frame predication, and reducing the influence on the inter-frame predication performance caused by in-chip and off-chip frequency data access.
Description
Technical field
The present invention relates to video coding and decoding technology, particularly relate to a kind of digital video decoding infra-prediction techniques of AVS standard.
Background technology
AVS (Audio Video Coding Standard) is by the autonomous digital audio/video encoding and decoding technique standard of formulating of China.The video section of this technical standard is promulgated to be State Standard of the People's Republic of China, enforcement in 1 day March in 2006 on February 22nd, 2006.The AVS video standard improves the code efficiency of inter-coded macroblocks with infra-prediction techniques, use during infra-frame prediction the left side piece, lower-left piece, top piece, upper right of current sub-block and upper left the lower right corner 1 pixel value totally 33 pixel values as the reference pixel of current sub-block prediction (lower-left and upper right respectively 8 pixel values can be when it is unavailable be obtained by the pixel-expansion of left and top piece, but directly use in its time spent).In the design and realization of AVS hardware video decoder, the required bandwidth of memory interface is one of key factor of system for restricting performance and cost.The data volume of intra-framed prediction module and amount of calculation are very large, take more memory interface bandwidth, are one of bottlenecks of whole system operation.Intra-framed prediction module is to memory interface the bus time that takies and the data volume that reads, has vital meaning for reducing the memory interface bandwidth and improving systematic function, 33 pixel values that need when how to design succinct data structure and coming each sub-block prediction store, and are key issues of infra-frame prediction.
Summary of the invention
For the defective that exists in the above-mentioned prior art, technical problem to be solved by this invention provides a kind of AVS inter-frame predicated reference pixel method for storing and updating that can improve whole infra-frame prediction storage update efficient.
In order to solve the problems of the technologies described above, a kind of AVS inter-frame predicated reference pixel method for storing and updating provided by the present invention, it is characterized in that, described method makes the required reference pixel of infra-frame prediction be stored in respectively macro-block line memory, left macro block memory, lower right corner register; Wherein:
Upper macro-block line memory comprises the U memory, and its size is the resolution width of this video sequence; Required 16 reference pixels in top of each sub-block infra-frame prediction will obtain from the U memory;
Left macro block memory comprises the L memory, and its size is 16 bytes; Required 16 reference pixels of left of each sub-block infra-frame prediction will obtain from the L memory;
Lower right corner register comprises R0 register, R1 register, R2 register, R3 register, and its size is respectively 1 byte; The required lower right corner reference pixel of the 0th sub-block infra-frame prediction will obtain from the R0 register, the required lower right corner reference pixel of the first sub-block infra-frame prediction will obtain from the R1 register, the required lower right corner reference pixel of the second sub-block infra-frame prediction will obtain from the R2 register, and the required lower right corner reference pixel of the 3rd sub-block infra-frame prediction will obtain from the R3 register;
Described method is: for a macro block, it processes the order according to sub-block number the from the 0th to the 3rd, and the processing that each sub-block reference pixel obtains comprises prediction pre-treatment and pre-two parts of after logging process; Described method specifically may further comprise the steps:
Step 1: the 0th sub-block pre-treatment:
Step 1.1 is got the reference pixel in the required lower right corner of prediction from the R0 register;
Step 1.2 is got the required upside reference pixel of prediction from the U memory, and the lower right corner pixel of the second sub-block of the corresponding lastrow macro block of current macro taken out from the U memory is kept at the R1 register, the first sub-block reference of confession current macro;
Step 1.3 is got the required left side reference pixel of prediction from the L memory, and the lower right corner pixel of the first sub-block of the corresponding upper macro block of current macro taken out from the L memory is kept at the R2 register, the second sub-block reference of confession current macro;
Step 2: the 0th sub-block reprocessing:
Upgrade the U memory, upgrade the L memory;
Step 3: the first sub-block pre-treatment:
Step 3.1 is got the reference pixel in the required lower right corner of prediction from the R1 register;
Step 3.2 is got the required upside reference pixel of prediction from the U memory, and the lower right corner pixel of the 3rd sub-block of the corresponding lastrow macro block of current macro taken out from the U memory be kept at the R0 register, for the 0th sub-block reference of the corresponding next macro block of current macro;
Step 3.3 is got the required left side reference pixel of prediction from the L memory, and the lower right corner pixel of the 0th sub-block of current macro taken out from the L memory is kept at the R3 register, the 3rd sub-block reference of confession current macro;
Step 4: the first sub-block reprocessing:
Upgrade the U memory, upgrade the L memory;
Step 5: the second sub-block pre-treatment:
Step 5.1 is got the reference pixel in the required lower right corner of prediction from the R2 register;
Step 5.2 is got the required upside reference pixel of prediction from the U memory;
Step 5.3 is got the required left side reference pixel of prediction from the L memory;
Step 6: the second sub-block reprocessing:
Upgrade the U memory, upgrade the L memory;
Step 7: the 3rd sub-block pre-treatment:
Step 7.1 is got the reference pixel in the required lower right corner of prediction from the R3 register:
Step 7.2 is got the required upside reference pixel of prediction from the U memory;
Step 7.3 is got the required left side reference pixel of prediction from the L memory;
Step 8: the 3rd sub-block reprocessing:
Upgrade the U memory, upgrade the L memory;
Wherein, described renewal U memory refer to this sub-block that after each sub-block is rebuild, will obtain this sub-block of data cover of last column at the horizontal correspondence position of U memory: the 0th sub-block, the second sub-block cover the memory cell of U memory directly over its correspondence; The first sub-block, the 3rd sub-block cover the memory cell of U memory directly over its correspondence;
Described renewal L memory refers to that this sub-block of data cover of last row of this sub-block that will obtain is at vertical correspondence position of L memory after each sub-block is rebuild: the 0th sub-block, the first sub-block cover the memory cell of its corresponding left L memory; The second sub-block, the 3rd sub-block cover the memory cell of its corresponding left L memory.
AVS inter-frame predicated reference pixel method for storing and updating provided by the invention is stored in respectively in memory and the register by the reference pixel that infra-frame prediction is required, storage update mechanism reasonable in design, not only saved memory resource, and in infra-frame prediction and process of reconstruction, do not need outside sheet reading out data the frame data memory, thereby greatly improved the efficient of whole infra-frame prediction, reduced in the sheet, the outer frequent access data of sheet are on the impact of infra-frame prediction performance.
Description of drawings
Fig. 1 is that the reference pixel of AVS infra-frame prediction shows distribution schematic diagram;
Fig. 2 is AVS infra-frame prediction of the present invention lower right corner register-stored schematic diagram;
Fig. 3 is the update method of AVS infra-frame prediction U memory of the present invention;
Fig. 4 is the update method of AVS infra-frame prediction L memory of the present invention.
Embodiment
Below in conjunction with description of drawings embodiments of the invention are described in further detail, but the present embodiment is not limited to the present invention, every employing similarity method of the present invention and similar variation thereof all should be listed protection scope of the present invention in.
For a better understanding of the present invention, Fig. 1 has drawn out AVS inter-frame predicated reference pixel distribution schematic diagram.Next image block may need the reference pixel used in infra-frame prediction, namely rightmost one row of each piece and the bottom pixel of delegation.Use for some piece that each macro block only has the sample point of last column may be positioned at its below, and other sample points that may use in fact just use in a macro block in the macro block, are perhaps used by adjacent macro block.
Based on above-mentioned analysis, the present invention's reference pixel that infra-frame prediction is required is stored in respectively upper macro-block line memory, left macro block memory, lower right corner register.Wherein:
Upper macro-block line memory comprises the U memory, and its size is the resolution width of this video sequence.Required 16 reference pixels in top of each sub-block infra-frame prediction will obtain from the U memory.
Left macro block memory comprises the L memory, and its size is 16 bytes.Required 16 reference pixels of left of each sub-block infra-frame prediction will obtain from the L memory.
Lower right corner register comprises R0 register, R1 register, R2 register, R3 register, and its size is respectively 1 byte.The required lower right corner reference pixel of the 0th sub-block infra-frame prediction will obtain from the R0 register, the required lower right corner reference pixel of the first sub-block infra-frame prediction will obtain from the R1 register, the required lower right corner reference pixel of the second sub-block infra-frame prediction will obtain from the R2 register, and the required lower right corner reference pixel of the 3rd sub-block infra-frame prediction will obtain from the R3 register.
Fig. 2 has provided R0, R1, R2, four register-stored the 0th sub-blocks of R3---the schematic diagram of the lower right corner reference pixel of the 3rd sub-block.As shown in Figure 2, the present invention only needs 4 registers just can realize the storage of infra-frame prediction lower right corner reference pixel.
AVS inter-frame predicated reference pixel method for storing and updating of the present invention, for a macro block, it processes the order according to sub-block number the from the 0th to the 3rd, and the processing that each sub-block reference pixel obtains comprises prediction pre-treatment and pre-two parts of after logging process.Described method specifically may further comprise the steps:
Step 1: the 0th sub-block pre-treatment:
Step 1.1 is got the reference pixel in the required lower right corner of prediction from the R0 register;
Step 1.2 is got the required upside reference pixel of prediction from the U memory, and the lower right corner pixel of the second sub-block of the corresponding lastrow macro block of current macro taken out from the U memory is kept at the R1 register, the first sub-block reference of confession current macro;
Step 1.3 is got the required left side reference pixel of prediction from the L memory, and the lower right corner pixel of the first sub-block of the corresponding upper macro block of current macro taken out from the L memory is kept at the R2 register, the second sub-block reference of confession current macro;
Step 2: the 0th sub-block reprocessing:
Upgrade the U memory, upgrade the L memory;
Step 3: the first sub-block pre-treatment:
Step 3.1 is got the reference pixel in the required lower right corner of prediction from the R1 register;
Step 3.2 is got the required upside reference pixel of prediction from the U memory, and the lower right corner pixel of the 3rd sub-block of the corresponding lastrow macro block of current macro taken out from the U memory be kept at the R0 register, for the 0th sub-block reference of the corresponding next macro block of current macro;
Step 3.3 is got the required left side reference pixel of prediction from the L memory, and the lower right corner pixel of the 0th sub-block of current macro taken out from the L memory is kept at the R3 register, the 3rd sub-block reference of confession current macro;
Step 4: the first sub-block reprocessing:
Upgrade the U memory, upgrade the L memory;
Step 5: the second sub-block pre-treatment:
Step 5.1 is got the reference pixel in the required lower right corner of prediction from the R2 register;
Step 5.2 is got the required upside reference pixel of prediction from the U memory;
Step 5.3 is got the required left side reference pixel of prediction from the L memory;
Step 6: the second sub-block reprocessing:
Upgrade the U memory, upgrade the L memory;
Step 7: the 3rd sub-block pre-treatment:
Step 7.1 is got the reference pixel in the required lower right corner of prediction from the R3 register:
Step 7.2 is got the required upside reference pixel of prediction from the U memory;
Step 7.3 is got the required left side reference pixel of prediction from the L memory;
Step 8: the 3rd sub-block reprocessing:
Upgrade the U memory, upgrade the L memory.
Described step 2, in 4,6,8, the update method of U memory as shown in Figure 3: this sub-block of data cover of last column of this sub-block that will obtain after each sub-block is rebuild is at the horizontal correspondence position of U memory; Be specially: the 0th sub-block, the second sub-block cover the memory cell of U memory directly over its correspondence, and the first sub-block, the 3rd sub-block cover the memory cell of U memory directly over its correspondence.
Described step 2, in 4,6,8, the update method of L memory as shown in Figure 4: this sub-block of data cover of last row of this sub-block that will obtain after each sub-block is rebuild is at vertical correspondence position of L memory; Be specially: the 0th sub-block, the first sub-block cover the memory cell of its corresponding left L memory, and the second sub-block, the 3rd sub-block cover the memory cell of its corresponding left L memory.
The present invention is stored in respectively in memory and the register by the reference pixel that infra-frame prediction is required, storage update mechanism reasonable in design, not only saved the resource of memory, and in infra-frame prediction and process of reconstruction, do not need outside sheet reading out data the frame data memory, thereby greatly improved the efficient of whole infra-frame prediction, reduced in the sheet, the outer frequent access data of sheet are on the impact of infra-frame prediction performance.
Claims (1)
1. an AVS inter-frame predicated reference pixel method for storing and updating is characterized in that, described method makes the required reference pixel of infra-frame prediction be stored in respectively macro-block line memory, left macro block memory, lower right corner register; Wherein:
Upper macro-block line memory comprises the U memory, and its size is the resolution width of this video sequence; Required 16 reference pixels in top of each sub-block infra-frame prediction will obtain from the U memory;
Left macro block memory comprises the L memory, and its size is 16 bytes; Required 16 reference pixels of left of each sub-block infra-frame prediction will obtain from the L memory;
Lower right corner register comprises R0 register, R1 register, R2 register, R3 register, and its size is respectively 1 byte; The required lower right corner reference pixel of the 0th sub-block infra-frame prediction will obtain from the R0 register, the required lower right corner reference pixel of the first sub-block infra-frame prediction will obtain from the R1 register, the required lower right corner reference pixel of the second sub-block infra-frame prediction will obtain from the R2 register, and the required lower right corner reference pixel of the 3rd sub-block infra-frame prediction will obtain from the R3 register;
Described method is: for a macro block, it processes the order according to sub-block number the from the 0th to the 3rd, and the processing that each sub-block reference pixel obtains comprises prediction pre-treatment and pre-two parts of after logging process; Described method specifically may further comprise the steps:
Step 1: the 0th sub-block pre-treatment:
Step 1.1 is got the reference pixel in the required lower right corner of prediction from the R0 register;
Step 1.2 is got the required upside reference pixel of prediction from the U memory, and the lower right corner pixel of the second sub-block of the corresponding lastrow macro block of current macro taken out from the U memory is kept at the R1 register, the first sub-block reference of confession current macro;
Step 1.3 is got the required left side reference pixel of prediction from the L memory, and the lower right corner pixel of the first sub-block of the corresponding upper macro block of current macro taken out from the L memory is kept at the R2 register, the second sub-block reference of confession current macro;
Step 2: the 0th sub-block reprocessing:
Upgrade the U memory, upgrade the L memory;
Step 3: the first sub-block pre-treatment:
Step 3.1 is got the reference pixel in the required lower right corner of prediction from the R1 register;
Step 3.2 is got the required upside reference pixel of prediction from the U memory, and the lower right corner pixel of the 3rd sub-block of the corresponding lastrow macro block of current macro taken out from the U memory be kept at the R0 register, for the 0th sub-block reference of the corresponding next macro block of current macro;
Step 3.3 is got the required left side reference pixel of prediction from the L memory, and the lower right corner pixel of the 0th sub-block of current macro taken out from the L memory is kept at the R3 register, the 3rd sub-block reference of confession current macro;
Step 4: the first sub-block reprocessing:
Upgrade the U memory, upgrade the L memory;
Step 5: the second sub-block pre-treatment:
Step 5.1 is got the reference pixel in the required lower right corner of prediction from the R2 register;
Step 5.2 is got the required upside reference pixel of prediction from the U memory;
Step 5.3 is got the required left side reference pixel of prediction from the L memory;
Step 6: the second sub-block reprocessing:
Upgrade the U memory, upgrade the L memory;
Step 7: the 3rd sub-block pre-treatment:
Step 7.1 is got the reference pixel in the required lower right corner of prediction from the R3 register:
Step 7.2 is got the required upside reference pixel of prediction from the U memory;
Step 7.3 is got the required left side reference pixel of prediction from the L memory;
Step 8: the 3rd sub-block reprocessing:
Upgrade the U memory, upgrade the L memory;
Wherein, described renewal U memory refer to this sub-block that after each sub-block is rebuild, will obtain this sub-block of data cover of last column at the horizontal correspondence position of U memory: the 0th sub-block, the second sub-block cover the memory cell of U memory directly over its correspondence; The first sub-block, the 3rd sub-block cover the memory cell of U memory directly over its correspondence;
Described renewal L memory refers to that this sub-block of data cover of last row of this sub-block that will obtain is at vertical correspondence position of L memory after each sub-block is rebuild: the 0th sub-block, the first sub-block cover the memory cell of its corresponding left L memory; The second sub-block, the 3rd sub-block cover the memory cell of its corresponding left L memory.
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