CN101888299A - Method and device for implementing display mode switching by low-frequency clock - Google Patents
Method and device for implementing display mode switching by low-frequency clock Download PDFInfo
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- CN101888299A CN101888299A CN2010102075822A CN201010207582A CN101888299A CN 101888299 A CN101888299 A CN 101888299A CN 2010102075822 A CN2010102075822 A CN 2010102075822A CN 201010207582 A CN201010207582 A CN 201010207582A CN 101888299 A CN101888299 A CN 101888299A
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- display mode
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- frequency clock
- epld
- switch
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G5/00—Control arrangements or circuits for visual indicators common to cathode-ray tube indicators and other visual indicators
Abstract
The invention discloses a method and a device for implementing display mode switching by a low-frequency clock. The method comprises the following steps: a physical layer chip of communication equipment outputs a low-frequency clock signal to an erasable programmable logic device (EPLD) of the communication equipment; while a display mode requires to be switched, the EPLD times by the low-frequency clock signal output by the physical layer chip; and when the time reaches a preset time value TIME 1, a processor of the communication equipment is informed to switch the display mode. By adopting the method and the device for implementing display mode switching by the low-frequency clock of the invention, the display mode can be switched by virtue of less EPLD resources.
Description
Technical field
The present invention relates to the communications field, specially refer to a kind of low-frequency clock that utilizes and realize the method and apparatus that display mode switches.
Background technology
Communication equipment is Ethernet switch for example, and FPDP such as 8 mouthfuls, 16 mouthfuls, 24 mouthfuls or 48 mouthfuls are generally arranged, and each port is with the operating state of 2 monochromatic burners or 1 bi-colour light indication port.The operating state that needs to show comprises connection LINK, speed SPEED, the duplexing DUPLICATION of each port and transfer of data ACTIVITY etc. is arranged, and uses switching key to switch the pattern that shows usually.
Communication equipment adopts programmable logic device (Erasable Programmable Logic Device, EPLD) state of pilot signal, after EPLD detects switching key and is pressed, report once to processor every the regular hour and to interrupt, till switching key is released.Processor is had no progeny in receiving, with the display mode of equipment by a kind of mode switch to another kind of pattern, as from the LINK mode switch to the SPEED pattern.
The switching of display mode need be carried out timing to the time span that the user presses switching key, and EPLD needs clock signal and makes the time statistics.At same timing time, if clock signal is a high frequency clock signal, then EPLD needs more register, for example need timing 500ms, under the high frequency clock signal of 25MHz, need 25 digit counters, the low-frequency clock signal of 8Hz then only needs 2 bit registers.Communication equipment adopts the high frequency clock signal of crystal oscillator or clock buffer output to carry out timing at present, and the defective that causes is the more EPLD resource of waste.
Summary of the invention
Main purpose of the present invention realizes the method and apparatus that display mode switches for a kind of low-frequency clock that utilizes is provided, and utilizes less EPLD resource to carry out the switching of display mode.
The present invention proposes a kind of low-frequency clock that utilizes and realizes the method that display mode switches, and comprises step:
The physical chip output low frequency clock signal of communication equipment is to the programmable logic device EPLD of described communication equipment;
When needs switched display mode, described EPLD carried out timing by the low-frequency clock signal of described physical chip output;
When described timing reaches Preset Time value TIME1, notify the processor of described communication equipment to switch display mode.
Preferably, described when timing reaches Preset Time value TIME1, the processor of notifying communication equipment switches after the display mode, also comprises:
When described timing surpasses described TIME1,, notify described processor to switch display mode every Preset Time value TIME2.
Preferably, described when timing reaches Preset Time value TIME1, the processor of notifying communication equipment switches display mode and comprises:
When described timing reached TIME1, described EPLD reported described processor once to interrupt.
Preferably, the low-frequency clock signal that described EPLD exports by physical chip carries out also comprising before the timing:
Whether described EPLD detects display mode needs to switch.
Preferably, whether described EPLD detection switching key is pressed and is specially:
Whether described EPLD needs to switch by the low-frequency clock signal rim detection display mode of described physical chip output.
The present invention also proposes a kind of low-frequency clock that utilizes and realizes the display mode device for switching, is connected with the processor of communication equipment, comprises programmable logic device EPLD and physical chip, wherein,
Described physical chip is used for the output low frequency clock signal to described EPLD;
Described EPLD comprises timing unit, be used for when needs switch display mode, the low-frequency clock signal of exporting by described physical chip carries out timing, first switch unit, be used for when described timing reaches Preset Time value TIME1, notify described processor to switch display mode.
Preferably, described EPLD also comprises second switch unit, is used for when described timing surpasses described TIME1, every Preset Time value TIME2, notifies described processor to switch display mode.
Preferably, described first switch unit specifically is used for reporting described processor once to interrupt when described timing reaches Preset Time value TIME1.
Preferably, described EPLD also comprises detecting unit, and whether be used to detect display mode needs to switch.
Preferably, whether described detecting unit specifically is used for needing to switch by the low-frequency clock signal rim detection display mode of described physical chip output.
The low-frequency clock that utilizes that the present invention proposes is realized the method and apparatus that display mode switches, the pin of physical chip is configured makes physical chip output low frequency signal, EPLD utilizes the low frequency signal of physical chip output that the time span that the user presses switching key is carried out timing, finishes the switching of display mode with less EPLD resource.
Description of drawings
Fig. 1 realizes the schematic flow sheet of method one embodiment that display mode switches for the present invention utilizes low-frequency clock;
Fig. 2 realizes the schematic flow sheet of the another embodiment of method that display mode switches for the present invention utilizes low-frequency clock;
Fig. 3 realizes the structural representation of display mode device for switching one embodiment for the present invention utilizes low-frequency clock;
Fig. 4 realizes the structural representation of the EPLD of display mode device for switching one embodiment for the present invention utilizes low-frequency clock.
The realization of the object of the invention, functional characteristics and advantage will be in conjunction with the embodiments, are described further with reference to accompanying drawing.
Embodiment
The low-frequency clock that utilizes that the present invention proposes is realized the method and apparatus that display mode switches, the pin of physical chip is configured makes physical chip output low frequency signal, EPLD utilizes the low frequency signal of physical chip output that the time span that the user presses switching key is carried out timing, finishes the switching of display mode with less EPLD resource.
With reference to Fig. 1, propose the present invention and utilize low-frequency clock to realize method one embodiment that display mode switches, comprising:
When timing reached Preset Time value TIME1, EPLD reported processor once to interrupt.
With reference to Fig. 2, propose the present invention and utilize low-frequency clock to realize the another embodiment of method that display mode switches, in the above-described embodiments, after the step 103, also comprise:
Step 104, when timing surpassed TIME1, every Preset Time value TIME2, notification processor switched display mode;
Also comprise before the step 102:
Step 1011, whether EPLD detects display mode needs to switch.
Step 1011 is specially:
Whether EPLD needs to switch by the low-frequency clock signal rim detection display mode of physical chip output.
Describe the operation principle that low-frequency clock of the present invention is realized the method embodiment that display mode switches below in detail.
After the communication equipment operate as normal, processor configures physical layer chip internal register, an indicator light holding wire output low frequency clock signal that makes physical chip is to EPLD;
Whether whether EPLD detects display mode needs to switch, can be switching key in the present embodiment and be pressed;
When switching key is pressed, the time span that EPLD utilizes low-frequency clock signal timing switching key to be pressed;
Reach default time value TIME1 if switching key is pressed, EPLD reports once to processor and interrupts, and by the mode switch of processor processing indicator light;
EPLD continues the time span of utilizing low-frequency clock signal timing switching key to be pressed;
Surpass default time value TIME1 if switching key is pressed, then every default time value TIME2, EPLD reports once to processor and interrupts, and by the mode switch of processor processing indicator light, TIME2 can greater than, be equal to or less than TIME1;
Whenever, as long as switching key is in the state that unclamps, whether flow process turns back to EPLD detection switching key and is pressed.
The low-frequency clock that utilizes that the present invention proposes is realized the method that display mode switches, the pin of physical chip is configured makes physical chip output low frequency signal, EPLD utilizes the low frequency signal of physical chip output that the time span that the user presses switching key is carried out timing, finishes the switching of display mode with less EPLD resource.
With reference to Fig. 3, propose the present invention and utilize low-frequency clock to realize display mode device for switching 40 1 embodiment, be connected with the processor 10 of communication equipment, comprise EPLD30 and physical chip 20, wherein,
With reference to Fig. 4, EPLD30 comprises timing unit 32, is used for when needs switch display mode, low-frequency clock signal by physical chip 20 outputs carries out timing, first switch unit 33 is used for when timing reaches Preset Time value TIME1, and notification processor 10 switches display mode.
Other proposes the present invention and utilizes low-frequency clock to realize display mode device for switching 40 1 embodiment, and in the above-described embodiments, EPLD30 also comprises:
Detecting unit 31, whether be used to detect display mode needs to switch;
Whether detecting unit 31 specifically is used for needing to switch by the low-frequency clock signal rim detection display mode of physical chip 20 outputs.
Describing the present invention below in detail utilizes low-frequency clock to realize the operation principle of display mode device for switching 40 embodiment.
After the communication equipment operate as normal, processor 10 configures physical layer chip 20 internal registers, an indicator light holding wire output low frequency clock signal that makes physical chip 20 is to EPLD30;
Whether whether the detecting unit 31 of EPLD30 detects display mode and switches, can be switching key in the present embodiment and be pressed;
When switching key is pressed, the time span that timing unit 32 utilizes low-frequency clock signal timing switching key to be pressed;
Reach default time value TIME1 if switching key is pressed, first switch unit 33 reports once interruption for processor 10, and is handled the mode switch of indicator lights by processor 10;
Timing unit 32 continues the time span of utilizing low-frequency clock signal timing switching key to be pressed;
If being pressed, switching key surpasses default time value TIME1, then every default time value TIME2, second switch unit 34 reports once for processor 10 to interrupt, and handles the mode switch of indicator lights by processor 10, TIME2 can greater than, be equal to or less than TIME1;
Whenever, as long as switching key is in the state that unclamps, timing unit 32 restarts timing.
The low-frequency clock that utilizes that the present invention proposes is realized display mode device for switching 40, the pin of physical chip 20 is configured makes physical chip 20 output low frequency signals, EPLD30 utilizes the low frequency signal of physical chip 20 outputs that the time span that the user presses switching key is carried out timing, finishes the switching of display mode with less EPLD30 resource.
The above only is the preferred embodiments of the present invention; be not so limit claim of the present invention; every equivalent structure or equivalent flow process conversion that utilizes specification of the present invention and accompanying drawing content to be done; or directly or indirectly be used in other relevant technical fields, all in like manner be included in the scope of patent protection of the present invention.
Claims (10)
1. one kind is utilized low-frequency clock to realize the method that display mode switches, and it is characterized in that, comprises step:
The physical chip output low frequency clock signal of communication equipment is to the programmable logic device EPLD of described communication equipment;
When needs switched display mode, described EPLD carried out timing by the low-frequency clock signal of described physical chip output;
When described timing reaches Preset Time value TIME1, notify the processor of described communication equipment to switch display mode.
2. the low-frequency clock that utilizes as claimed in claim 1 is realized the method that display mode switches, and it is characterized in that, described when timing reaches Preset Time value TIME1, the processor of notifying communication equipment switches after the display mode, also comprises:
When described timing surpasses described TIME1,, notify described processor to switch display mode every Preset Time value TIME2.
3. the low-frequency clock that utilizes as claimed in claim 1 or 2 is realized the method that display mode switches, and it is characterized in that, and is described when timing reaches Preset Time value TIME1, and the processor of notifying communication equipment switches display mode and comprises:
When described timing reached TIME1, described EPLD reported described processor once to interrupt.
4. the low-frequency clock that utilizes as claimed in claim 1 or 2 is realized the method that display mode switches, and it is characterized in that, the low-frequency clock signal that described EPLD exports by physical chip carries out also comprising before the timing:
Whether described EPLD detects display mode needs to switch.
5. the low-frequency clock that utilizes as claimed in claim 4 is realized the method that display mode switches, and it is characterized in that, whether described EPLD detection switching key is pressed and be specially:
Whether described EPLD needs to switch by the low-frequency clock signal rim detection display mode of described physical chip output.
6. one kind is utilized low-frequency clock to realize the display mode device for switching, is connected with the processor of communication equipment, it is characterized in that, comprises programmable logic device EPLD and physical chip, wherein,
Described physical chip is used for the output low frequency clock signal to described EPLD;
Described EPLD comprises timing unit, is used for when needs switch display mode, and the low-frequency clock signal of exporting by described physical chip carries out timing; First switch unit is used for when described timing reaches Preset Time value TIME1, notifies described processor to switch display mode.
7. the low-frequency clock that utilizes as claimed in claim 6 is realized the display mode device for switching, it is characterized in that described EPLD also comprises second switch unit, be used for when described timing surpasses described TIME1, every Preset Time value TIME2, notify described processor to switch display mode.
8. realize the display mode device for switching as claim 6 or the 7 described low-frequency clocks that utilize, it is characterized in that described first switch unit specifically is used for reporting described processor once to interrupt when described timing reaches Preset Time value TIME1.
9. whether realize the display mode device for switching as claim 6 or the 7 described low-frequency clocks that utilize, it is characterized in that described EPLD also comprises detecting unit, being used to detect display mode needs to switch.
10. the low-frequency clock that utilizes as claimed in claim 9 is realized the display mode device for switching, it is characterized in that, whether described detecting unit specifically is used for needing to switch by the low-frequency clock signal rim detection display mode of described physical chip output.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010102075822A CN101888299A (en) | 2010-06-22 | 2010-06-22 | Method and device for implementing display mode switching by low-frequency clock |
| PCT/CN2011/071175 WO2011160461A1 (en) | 2010-06-22 | 2011-02-22 | Method and device for switching display mode by using low-frequency clock |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
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| CN2010102075822A CN101888299A (en) | 2010-06-22 | 2010-06-22 | Method and device for implementing display mode switching by low-frequency clock |
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| CN101888299A true CN101888299A (en) | 2010-11-17 |
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| CN2010102075822A Pending CN101888299A (en) | 2010-06-22 | 2010-06-22 | Method and device for implementing display mode switching by low-frequency clock |
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Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011160461A1 (en) * | 2010-06-22 | 2011-12-29 | 中兴通讯股份有限公司 | Method and device for switching display mode by using low-frequency clock |
| CN105786421A (en) * | 2014-12-25 | 2016-07-20 | 中兴通讯股份有限公司 | Server display method and device |
| CN111443628A (en) * | 2020-04-01 | 2020-07-24 | 沈阳天眼智云信息科技有限公司 | Operation and test dual-mode automatic switching method for intelligent monitoring terminal and intelligent monitoring terminal |
Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050091551A1 (en) * | 2003-10-24 | 2005-04-28 | Tien-Hsin Chang | Operation mode switching method and apparatus for ensuring ultra low power consumption |
| CN1642010A (en) * | 2004-01-01 | 2005-07-20 | 华为技术有限公司 | Clock-locked frequency deviation detecting device |
| CN1725629A (en) * | 2005-03-22 | 2006-01-25 | 杭州华为三康技术有限公司 | Low frequency clock signal generating method and low frequency cloc ksignal generator |
| US20060120296A1 (en) * | 2004-12-02 | 2006-06-08 | Goh Ban H | Auto mode detection for a switch |
| CN101132489A (en) * | 2006-08-19 | 2008-02-27 | 乐金电子（沈阳）有限公司 | Channel switching mechanism and method thereof |
| CN101262364A (en) * | 2008-02-28 | 2008-09-10 | 福建星网锐捷网络有限公司 | A device status and information display method and device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101888299A (en) * | 2010-06-22 | 2010-11-17 | 中兴通讯股份有限公司 | Method and device for implementing display mode switching by low-frequency clock |
-
2010
- 2010-06-22 CN CN2010102075822A patent/CN101888299A/en active Pending
-
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- 2011-02-22 WO PCT/CN2011/071175 patent/WO2011160461A1/en active Application Filing
Patent Citations (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20050091551A1 (en) * | 2003-10-24 | 2005-04-28 | Tien-Hsin Chang | Operation mode switching method and apparatus for ensuring ultra low power consumption |
| CN1642010A (en) * | 2004-01-01 | 2005-07-20 | 华为技术有限公司 | Clock-locked frequency deviation detecting device |
| US20060120296A1 (en) * | 2004-12-02 | 2006-06-08 | Goh Ban H | Auto mode detection for a switch |
| CN1725629A (en) * | 2005-03-22 | 2006-01-25 | 杭州华为三康技术有限公司 | Low frequency clock signal generating method and low frequency cloc ksignal generator |
| CN101132489A (en) * | 2006-08-19 | 2008-02-27 | 乐金电子（沈阳）有限公司 | Channel switching mechanism and method thereof |
| CN101262364A (en) * | 2008-02-28 | 2008-09-10 | 福建星网锐捷网络有限公司 | A device status and information display method and device |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2011160461A1 (en) * | 2010-06-22 | 2011-12-29 | 中兴通讯股份有限公司 | Method and device for switching display mode by using low-frequency clock |
| CN105786421A (en) * | 2014-12-25 | 2016-07-20 | 中兴通讯股份有限公司 | Server display method and device |
| CN105786421B (en) * | 2014-12-25 | 2020-11-03 | 中兴通讯股份有限公司 | Server display method and device |
| CN111443628A (en) * | 2020-04-01 | 2020-07-24 | 沈阳天眼智云信息科技有限公司 | Operation and test dual-mode automatic switching method for intelligent monitoring terminal and intelligent monitoring terminal |
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| Publication number | Publication date |
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| WO2011160461A1 (en) | 2011-12-29 |
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Application publication date: 20101117 |