CN101764664B - PCM signal monitoring device with error detection alarming function and error detection alarming method thereof - Google Patents

PCM signal monitoring device with error detection alarming function and error detection alarming method thereof Download PDF

Info

Publication number
CN101764664B
CN101764664B CN 201010300944 CN201010300944A CN101764664B CN 101764664 B CN101764664 B CN 101764664B CN 201010300944 CN201010300944 CN 201010300944 CN 201010300944 A CN201010300944 A CN 201010300944A CN 101764664 B CN101764664 B CN 101764664B
Authority
CN
China
Prior art keywords
signal
module
error
error detection
remote
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN 201010300944
Other languages
Chinese (zh)
Other versions
CN101764664A (en
Inventor
赵光权
刘兆庆
李化义
李冬柏
徐犇
彭喜元
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Harbin Institute of Technology
Original Assignee
Harbin Institute of Technology
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Harbin Institute of Technology filed Critical Harbin Institute of Technology
Priority to CN 201010300944 priority Critical patent/CN101764664B/en
Publication of CN101764664A publication Critical patent/CN101764664A/en
Application granted granted Critical
Publication of CN101764664B publication Critical patent/CN101764664B/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Abstract

The invention provides a PCM signal monitoring device with error detection alarming function and an error detection alarming method thereof and relates to a PCM signal monitoring device and an error detection alarming method; the invention solves the disadvantages that the existing device can not decode a PCM signal and can not carry out detection alarming to errors that a gating signal is lagged by a clock signal, the clock signal is lagged by a data signal, and the duty ratio of the clock signal is unbalanced possibly; after an external remote measuring or remote control detection signal is converted by a signal isolation and level conversion module, the signal is transmitted to a remote measuring or remote control detection signal input end of a signal decoding and error detection alarming module through a remote measuring or remote control detection signal output end, and the signal decoding and error detection alarming module carries out detection alarming through a logic state machine which aims at errors that the gating signal is lagged by the clock signal, the clock signal is lagged by the data signal, and the duty ratio of the clock signal is unbalanced and is arranged in the signal decoding and error detection alarming module in a setting way; the invention can be widely applied to various occasions for data monitoring and error detecting to the PCM signal.

Description

Have the PCM signal monitoring device of error detection alarming function and the method for error detection alarming thereof
Technical field
The present invention relates to the method for a kind of PCM signal monitoring device and error detection alarming thereof.
Background technology
PCM (pulse code modulation) signal is adopted in telemetry and telecommand instruction between satellite central computer and the ground observing and controlling terminal, as shown in Figure 1; And one group of complete PCM signal is made of jointly these three signals of gate, clock and data.Existing market has numerous PCM signal processing apparatus, and some devices can realize the coding of PCM data or decoding, and some devices can carry out PCM frame synchronization and detect; But also do not have a kind of device can realize and to decode to the PCM signal, can carry out to the clock signal hysteresis gate-control signal that may occur in its transmission course, data-signal hysteresis clock signal, mistake that clock signal duty cycle is unbalance again simultaneously the function of detection alarm.
Summary of the invention
The present invention can not finish simultaneously the PCM signal is decoded in order to solve existing apparatus, again the clock signal hysteresis gate-control signal that may occur in its transmission course, data-signal hysteresis clock signal, mistake that clock signal duty cycle is unbalance are carried out the defective of detection alarm, and the PCM signal monitoring device with error detection alarming function that proposes and the method for error detection alarming thereof.
PCM signal monitoring device with error detection alarming function, it comprises signal decoding and error detection alarming module, telemetered signal isolation and level switch module, remote signal isolation and level switch module, LVDS signal sending assembly and LVDS signal receiving assembly; Described telemetered signal isolation is all identical with the 26S Proteasome Structure and Function of level switch module with the remote signal isolation with level switch module; The telemetered signal isolation is used for receiving outside telemetered signal with the telemetered signal input of level switch module, and described telemetered signal isolation links to each other with the telemetered signal input of signal decoding and error detection alarming module with the telemetered signal output of level switch module; The remote signal isolation is used for receiving the external remote control signal with the remote signal input of level switch module; Described remote signal isolation links to each other with the remote signal input of signal decoding and error detection alarming module with the remote signal output of level switch module; The data-signal output of signal decoding and error detection alarming module links to each other with the data-signal input of LVDS signal sending assembly, and the data-signal input of signal decoding and error detection alarming module links to each other with the data-signal output of LVDS signal receiving assembly; The data-signal output of LVDS signal sending assembly is used for sending data-signal to external control devices, and the data-signal input of LVDS signal receiving assembly is used for receiving the data-signal that external control devices sends.
Method based on the error detection alarming of the PCM signal monitoring device with error detection alarming function, the first telemetered signal decoder module in signal decoding and the error detection alarming module is used for the telemetered signal that receives is decoded, and decoded telemetered signal is sent to a LVDS signal framing module carries out framing and process; The second remote signal decoder module in signal decoding and the error detection alarming module is used for the remote signal that receives is decoded, and decoded remote signal is sent to the 2nd LVDS signal framing module carries out framing and process; Also be solidified with the first clock signal hysteresis gate signal error in described signal decoding and the error detection alarming module and detect logic state machine, second clock signal lag gate-control signal error detection logic state machine, the first data-signal hysteresis clock signal error detection logic state machine, the second data-signal hysteresis clock signal error detection logic state machine, the first clock signal duty cycle error detection logic state machine and second clock signal dutyfactor error detection logic state machine; Described the first clock signal hysteresis gate signal error detects logic state machine, the remote measurement detection signal that receives is carried out the error detection of clock signal hysteresis gate-control signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to a LVDS signal framing module and carry out framing and process; Described second clock signal lag gate-control signal error detection logic state machine, the remote control detection signal that receives is carried out the error detection of clock signal hysteresis gate-control signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to the 2nd LVDS signal framing module and carry out framing and process; Described the first data-signal hysteresis clock signal error detection logic state machine, the remote measurement detection signal that receives is carried out the error detection of data-signal hysteresis clock signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to a LVDS signal framing module and carry out framing and process; Described the second data-signal hysteresis clock signal error detection logic state machine, the remote control detection signal that receives is carried out the error detection of data-signal hysteresis clock signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to the 2nd LVDS signal framing module and carry out framing and process; The first clock signal duty cycle error detection logic state machine, the remote measurement detection signal that receives is carried out the error detection of clock signal duty cycle, and according to the generation information that reports an error, also the described information of reporting an error is sent to a LVDS signal framing module and carry out framing and process; Second clock signal dutyfactor error detection logic state machine, the remote control detection signal that receives is carried out the error detection of clock signal duty cycle, and generate the information that reports an error according to testing result, also the described information of reporting an error is sent to the 2nd LVDS signal framing module and carry out the framing processing, the warning that a described LVDS signal framing module and the 2nd LVDS signal framing module will receive or the signal framing that reports an error send to the LVDS signal transmitting module after processing, and the warning that the LVDS signal transmitting module will receive or the signal that reports an error send to LVDS signal sending assembly.
The present invention can finish the PCM signal decoded in, the clock signal hysteresis gate-control signal that may occur in its transmission course, data-signal hysteresis clock signal, mistake that clock signal duty cycle is unbalance are carried out detection alarm; By setting different threshold values, realize reporting to the police and the two kinds of warning modes that report an error; LVDS signal sending assembly 4 adopts the LVDS high-speed transmission interface, monitoring the data obtained and error message can be uploaded fast, LVDS (differential signal of the low-voltage amplitude of oscillation) can make signal can be at difference PCB line or on to balanced cable with the speed rates of hundreds of Mbps, have the characteristics such as high-speed, high anti-noise, the low-voltage amplitude of oscillation, low-power consumption.
Description of drawings
Fig. 1 is existing satellite and ground control centre communication system schematic diagram; Fig. 2 is the modular structure schematic diagram of embodiment one; Fig. 3 is the modular structure schematic diagram of signal decoding and error detection alarming module 1; Fig. 4 is the circuit theory diagrams of signal isolation and level switch module 2; Fig. 5 is the circuit theory diagrams of LVDS signal sending assembly 4; Fig. 6 is the circuit theory diagrams of LVDS signal receiving assembly 5; Fig. 7 is the operation principle schematic diagram that clock signal hysteresis gate signal error detects logic state machine; Fig. 8 is the operation principle schematic diagram of data-signal hysteresis clock signal error detection logic state machine; Fig. 9 is the operation principle schematic diagram of clock signal duty cycle error detection logic state machine.
Embodiment
Embodiment one: in conjunction with Fig. 2 present embodiment is described, present embodiment comprises signal decoding and error detection alarming module 1, telemetered signal isolation and level switch module 2, remote signal isolation and level switch module 3, LVDS signal sending assembly 4 and LVDS signal receiving assembly 5; Described telemetered signal isolation is all identical with the 26S Proteasome Structure and Function of level switch module 3 with the remote signal isolation with level switch module 2; The telemetered signal isolation is used for receiving outside telemetered signal with the telemetered signal input of level switch module 2, and described telemetered signal isolation links to each other with the telemetered signal input of signal decoding and error detection alarming module 1 with the telemetered signal output of level switch module 2; The remote signal isolation is used for receiving the external remote control signal with the remote signal input of level switch module 3; Described remote signal isolation links to each other with the remote signal input of signal decoding and error detection alarming module 1 with the remote signal output of level switch module 3; The data-signal output of signal decoding and error detection alarming module 1 links to each other with the data-signal input of LVDS signal sending assembly 4, and the data-signal input of signal decoding and error detection alarming module 1 links to each other with the data-signal output of LVDS signal receiving assembly 5; The data-signal output of LVDS signal sending assembly 4 is used for sending data-signal to external control devices, and the data-signal input of LVDS signal receiving assembly 5 is used for receiving the data-signal that external control devices sends.
Embodiment two: in conjunction with Fig. 3 present embodiment is described, present embodiment and embodiment one difference are that described signal decoding and error detection alarming module 1 are by the first telemetered signal decoder module 1-1, the first clock signal hysteresis gate signal error detection alarm module 1-2, the first data-signal hysteresis clock signal error detection alarming module 1-3, the first clock signal duty cycle error detection module 1-4 that reports an error, the one LVDS signal framing module 1-5, system clock and data reception module 1-6, the second remote signal decoder module 1-7, second clock signal lag gate-control signal error detection alarming module 1-8, the second data-signal hysteresis clock signal error detection alarming module 1-9, the second clock signal dutyfactor error detection module 1-10 that reports an error, the 2nd LVDS signal framing module 1-11 and LVDS signal transmitting module 1-12 form; The telemetered signal output of telemetered signal isolation and level switch module 2 links to each other with the report an error telemetered signal input of module 1-4 of telemetered signal input and the first clock signal duty cycle error detection of the telemetered signal input of the telemetered signal input of the first telemetered signal decoder module 1-1, the first clock signal hysteresis gate signal error detection alarm module 1-2, the first data-signal hysteresis clock signal error detection alarming module 1-3 simultaneously; The remote measurement decoded signal output of the first telemetered signal decoder module 1-1, the remote measurement detection alarm signal output part of the first clock signal hysteresis gate signal error detection alarm module 1-2, the remote measurement detection alarm signal output part of the first data-signal hysteresis clock signal error detection alarming module 1-3, the first clock signal duty cycle error detection report an error the remote measurement of module 1-4 detect report an error signal output part respectively with the first remote measurement decoded signal input of a LVDS signal framing module 1-5, the second remote measurement detection alarm signal input part, the 3rd remote measurement detection alarm signal input part detects the signal input part that reports an error with the 4th remote measurement and links to each other; The LVDS signal output part of the one LVDS signal framing module 1-5 links to each other with the LVDS signal input part of LVDS signal transmitting module 1-12; The remote signal output of remote signal isolation and level switch module 3 links to each other with the report an error remote signal input of module 1-10 of remote signal input and the second clock signal dutyfactor error detection of the remote signal input of the remote signal input of the second remote signal decoder module 1-7, second clock signal lag gate-control signal error detection alarming module 1-8, the second data-signal hysteresis clock signal error detection alarming module 1-9 simultaneously; The remote control decoding signal output part of the second remote signal decoder module 1-7, the remote control detection alarm signal output part of second clock signal lag gate-control signal error detection alarming module 1-8, the remote control detection alarm signal output part of the second data-signal hysteresis clock signal error detection alarming module 1-9, second clock signal dutyfactor error detection report an error the remote control of module 1-10 detect report an error signal output part respectively with the first remote control decoding signal input part of the 2nd LVDS signal framing module 1-11, the second remote control detection alarm signal input part, the 3rd remote control detection alarm signal input part detects the signal input part that reports an error with the 4th remote control and links to each other; The LVDS signal output part of the 2nd LVDS signal framing module 1-11 links to each other with the 2nd LVDS signal input part of LVDS signal transmitting module 1-12, the data-signal output of LVDS signal transmitting module 1-12 links to each other with the data-signal input of LVDS signal sending assembly 4, and the data-signal output of LVDS signal transmitting module 1-12 is the data-signal output of signal decoding and error detection alarming module 1; The data-signal input of system clock and data reception module 1-6 links to each other with the data-signal output of LVDS signal receiving assembly 5, and the data-signal input of system clock and data reception module 1-6 is the data-signal input of signal decoding and error detection alarming module 1.Other composition is identical with embodiment one with connected mode.
The course of work of present embodiment:
At first, the telemetered signal isolation is carried out level conversion with level switch module 3 with telemetered signal or remote signal that the outside sends with level switch module 2 or remote signal isolation, the PCM signal of RS-422 level is converted to Transistor-Transistor Logic level, signal after will changing simultaneously sends to signal decoding and error detection alarming module 1, the first telemetered signal decoder module 1-1 in signal decoding and the error detection alarming module 1 and the second remote signal decoder module 1-7 are used for the telemetered signal or the remote signal that receive are decoded, and with decoded telemetered signal or remote signal sends to a LVDS signal framing module 1-5 or the 2nd LVDS signal framing module 1-11 carries out sending to LVDS signal transmitting module 1-12 after framing is processed; LVDS signal transmitting module 1-12 sends to LVDS signal sending assembly 4 with the data-signal that receives;
First and second clock signal hysteresis gate signal error detection alarm module, first and second data-signal hysteresis clock signal error detection alarming module and first and second clock signal duty cycle error detection alarming module detect counting to remote measurement or the remote signal that receives, to detect simultaneously count results and pre-set threshold, type and time of origin with the misjudgment generation, according to the difference of setting threshold, it can send reports to the police and the two kinds of alarms that report an error; Concrete alert threshold is with reference to following table:
Measuring ability Setting threshold Testing result
The mistake of clock signal hysteresis gate-control signal 7μs≤t 1<10μs Report to the police
t 1≥10μs Report an error
The mistake of data-signal hysteresis clock signal 20μs≤t 2<30μs Report to the police
t 2≥30μs Report an error
The mistake of clock signal duty cycle τ≤45% Super lower limit reports an error
τ≥55% The super upper limit reports an error
LVDS signal sending assembly 4 is uploaded to external control devices with the error detection result; LVDS signal receiving assembly 5 can inject this device with the system time of external control devices.
Embodiment three: in conjunction with Fig. 4 present embodiment is described, present embodiment and embodiment one difference are that it is the integrated circuit of IL422 that the telemetered signal isolation is all adopted the model of NVE company with level switch module 2 and remote signal isolation with level switch module 3.Other composition is identical with embodiment one with connected mode.
Embodiment four: in conjunction with Fig. 5 present embodiment is described, present embodiment and embodiment one difference are that it is the integrated circuit of DS90LV011 that LVDS signal sending assembly 4 adopts the model of NS company.Other composition is identical with embodiment one with connected mode.
Embodiment five: in conjunction with Fig. 6 present embodiment is described, present embodiment and embodiment one difference are that it is the integrated circuit of DS90LV012 that LVDS signal receiving assembly 5 adopts the model of NS company.Other composition is identical with embodiment one with connected mode.
Embodiment six: the method for the error detection alarming of the described PCM signal monitoring device based on having error detection alarming function of present embodiment;
The first telemetered signal decoder module 1-1 in signal decoding and the error detection alarming module 1 is used for the telemetered signal that receives is decoded, and decoded telemetered signal is sent to a LVDS signal framing module 1-5 carries out framing and process; The second remote signal decoder module 1-7 in signal decoding and the error detection alarming module 1 is used for the remote signal that receives is decoded, and decoded remote signal is sent to the 2nd LVDS signal framing module 1-11 carries out framing and process; Also be solidified with the first clock signal hysteresis gate signal error in described signal decoding and the error detection alarming module 1 and detect logic state machine, second clock signal lag gate-control signal error detection logic state machine, the first data-signal hysteresis clock signal error detection logic state machine, the second data-signal hysteresis clock signal error detection logic state machine, the first clock signal duty cycle error detection logic state machine and second clock signal dutyfactor error detection logic state machine; Described the first clock signal hysteresis gate signal error detects logic state machine, the remote measurement detection signal that receives is carried out the error detection of clock signal hysteresis gate-control signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to a LVDS signal framing module 1-5 and carry out framing and process; Described second clock signal lag gate-control signal error detection logic state machine, the remote control detection signal that receives is carried out the error detection of clock signal hysteresis gate-control signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to the 2nd LVDS signal framing module 1-11 and carry out framing and process; Described the first data-signal hysteresis clock signal error detection logic state machine, the remote measurement detection signal that receives is carried out the error detection of data-signal hysteresis clock signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to a LVDS signal framing module 1-5 and carry out framing and process; Described the second data-signal hysteresis clock signal error detection logic state machine, the remote control detection signal that receives is carried out the error detection of data-signal hysteresis clock signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to the 2nd LVDS signal framing module 1-11 and carry out framing and process; The first clock signal duty cycle error detection logic state machine, the remote measurement detection signal that receives is carried out the error detection of clock signal duty cycle, and generate the information that reports an error according to testing result, also the described information of reporting an error is sent to a LVDS signal framing module 1-5 and carry out the framing processing; Second clock signal dutyfactor error detection logic state machine, the remote control detection signal that receives is carried out the error detection of clock signal duty cycle, and generate the information that reports an error according to testing result, also the described information of reporting an error is sent to the 2nd LVDS signal framing module 1-11 and carry out the framing processing, the warning that a described LVDS signal framing module 1-5 and the 2nd LVDS signal framing module 1-11 will receive or the signal framing that reports an error send to LVDS signal transmitting module 1-12 after processing, and the warning that LVDS signal transmitting module 1-12 will receive or the signal that reports an error send to LVDS signal sending assembly 4.
Embodiment seven: present embodiment is described in conjunction with Fig. 7, it is identical that present embodiment and embodiment six differences are that the first clock signal hysteresis gate signal error detects the course of work of logic state machine and second clock signal lag gate-control signal error detection logic state machine, and they include one of four states: system's idle condition, begin count status, stop count status and system mode is judged state; In system's idle condition, wait telemetered signal isolation to be detected and level switch module 2 or remote signal to isolate remote measurement detection signal or the remote control detection signal that sends with level switch module 3; If receive the rising edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into the beginning count status; At the beginning count status, system counter adds 1 in the count results of each clock cycle; If detect the rising edge of the clock signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into and stops count status; Stopping count status, the detection count results of system counter is being latched, then be transformed into system mode and judge state; Judge state in system mode, count results compared with setting threshold that misjudgment occurrence type and time of origin generate warning or the information that reports an error according to preseting different threshold values, and send described warning or the information that reports an error; If receive the trailing edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into system's idle condition.Other composition is identical with embodiment six with connected mode.
Embodiment eight: present embodiment is described in conjunction with Fig. 8, present embodiment is that with embodiment six differences the course of work of the first data-signal hysteresis clock signal error detection logic state machine and the second data-signal hysteresis clock signal error detection logic state machine is identical, and they include five states: system's idle condition, system's ready state, begin count status, stop count status and system mode and judge state; In system's idle condition, wait telemetered signal isolation to be detected and level switch module 2 or remote signal to isolate remote measurement detection signal or the remote control detection signal that sends with level switch module 3; If receive the rising edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into system's ready state; In system's ready state, wait for remote measurement detection signal or remote control detection signal that detection signal isolation and level switch module 2 send, if receive the trailing edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, described state machine is transformed into system's idle condition; If receive the rising edge of the clock signal in remote measurement detection signal or the remote control detection signal, described state machine is transformed into the beginning count status; At the beginning count status, system counter adds 1 in the count results of each clock cycle; If receive trailing edge and the data-signal of the clock signal in remote measurement detection signal or the remote control detection signal saltus step does not occur, then described state machine is transformed into system's ready state; If receive the data-signal generation saltus step in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into and stops count status; Stopping count status, the detection count results of system counter is being latched, then be transformed into system mode and judge state; Judge state in system mode, count results compared with setting threshold that misjudgment occurrence type and time of origin produce warning or the information that reports an error according to preseting different threshold values, and send described warning or the information that reports an error; Described state machine is transformed into system's ready state.Other composition is identical with embodiment six with connected mode.
Embodiment nine: present embodiment is described in conjunction with Fig. 9, present embodiment is that with embodiment six differences the course of work of the first clock signal duty cycle error detection logic state machine and second clock signal dutyfactor error detection logic state machine is identical, and they include five states: system's idle condition, system's ready state, begin count status, stop count status and system mode and judge state; In system's idle condition, wait telemetered signal isolation to be detected and level switch module 2 or remote signal to isolate remote measurement detection signal or the remote control detection signal that sends with level switch module 3; If receive the rising edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into system's ready state; In system's ready state, wait for remote measurement detection signal or remote control detection signal that detection signal isolation and level switch module 2 send, if receive the trailing edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, described state machine is transformed into system's idle condition; If receive the rising edge of the clock signal in remote measurement detection signal or the remote control detection signal, described state machine is transformed into the beginning count status; At the beginning count status, system counter adds 1 in the count results of each clock cycle; If receive the trailing edge of the clock signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into and stops count status; Stopping count status, the detection count results of system counter is being latched, then be transformed into system mode and judge state; Judge state in system mode, count results compared with setting threshold that misjudgment occurrence type and time of origin produce the information that reports an error according to preseting different threshold values, and send the described information that reports an error; Described state machine is transformed into system's ready state.Other composition is identical with embodiment six with connected mode.

Claims (8)

1. the PCM signal monitoring device that has error detection alarming function is characterized in that it comprises signal decoding and error detection alarming module (1), telemetered signal isolation and level switch module (2), remote signal isolation and level switch module (3), LVDS signal sending assembly (4) and LVDS signal receiving assembly (5); Described telemetered signal isolation is all identical with the 26S Proteasome Structure and Function of level switch module (3) with the remote signal isolation with level switch module (2); The telemetered signal isolation is used for receiving outside telemetered signal with the telemetered signal input of level switch module (2), and described telemetered signal isolation links to each other with the telemetered signal input of signal decoding and error detection alarming module (1) with the telemetered signal output of level switch module (2); The remote signal isolation is used for receiving the external remote control signal with the remote signal input of level switch module (3); Described remote signal isolation links to each other with the remote signal input of signal decoding and error detection alarming module (1) with the remote signal output of level switch module (3); The data-signal output of signal decoding and error detection alarming module (1) links to each other with the data-signal input of LVDS signal sending assembly (4), and the data-signal input of signal decoding and error detection alarming module (1) links to each other with the data-signal output of LVDS signal receiving assembly (5); The data-signal output of LVDS signal sending assembly (4) is used for sending data-signal to external control devices, and the data-signal input of LVDS signal receiving assembly (5) is used for receiving the data-signal that external control devices sends; Described signal decoding and error detection alarming module (1) are by the first telemetered signal decoder module (1-1), the first clock signal hysteresis gate signal error detection alarm module (1-2), the first data-signal hysteresis clock signal error detection alarming module (1-3), the first clock signal duty cycle error detection module (1-4) that reports an error, the one LVDS signal framing module (1-5), system clock and data reception module (1-6), the second remote signal decoder module (1-7), second clock signal lag gate-control signal error detection alarming module (1-8), the second data-signal hysteresis clock signal error detection alarming module (1-9), the second clock signal dutyfactor error detection module (1-10) that reports an error, the 2nd LVDS signal framing module (1-11) and LVDS signal transmitting module (1-12) form; Telemetered signal isolation and the telemetered signal output while of level switch module (2) and the telemetered signal input of the first telemetered signal decoder module (1-1), the telemetered signal input of the first clock signal hysteresis gate signal error detection alarm module (1-2), the report an error telemetered signal input of module (1-4) of the telemetered signal input of the first data-signal hysteresis clock signal error detection alarming module (1-3) and the first clock signal duty cycle error detection links to each other; The remote measurement decoded signal output of the first telemetered signal decoder module (1-1), the remote measurement detection alarm signal output part of the first clock signal hysteresis gate signal error detection alarm module (1-2), the remote measurement detection alarm signal output part of the first data-signal hysteresis clock signal error detection alarming module (1-3), the first clock signal duty cycle error detection report an error the remote measurement of module (1-4) detect report an error signal output part respectively with the first remote measurement decoded signal input of a LVDS signal framing module (1-5), the second remote measurement detection alarm signal input part, the 3rd remote measurement detection alarm signal input part detects the signal input part that reports an error with the 4th remote measurement and links to each other; The LVDS signal output part of the one LVDS signal framing module (1-5) links to each other with a LVDS signal input part of LVDS signal transmitting module (1-12); Remote signal isolation and the remote signal output while of level switch module (3) and the remote signal input of the second remote signal decoder module (1-7), the remote signal input of second clock signal lag gate-control signal error detection alarming module (1-8), the report an error remote signal input of module (1-10) of the remote signal input of the second data-signal hysteresis clock signal error detection alarming module (1-9) and second clock signal dutyfactor error detection links to each other; The remote control decoding signal output part of the second remote signal decoder module (1-7), the remote control detection alarm signal output part of second clock signal lag gate-control signal error detection alarming module (1-8), the remote control detection alarm signal output part of the second data-signal hysteresis clock signal error detection alarming module (1-9), second clock signal dutyfactor error detection report an error the remote control of module (1-10) detect report an error signal output part respectively with the first remote control decoding signal input part of the 2nd LVDS signal framing module (1-11), the second remote control detection alarm signal input part, the 3rd remote control detection alarm signal input part detects the signal input part that reports an error with the 4th remote control and links to each other; The LVDS signal output part of the 2nd LVDS signal framing module (1-11) links to each other with the 2nd LVDS signal input part of LVDS signal transmitting module (1-12), the data-signal output of LVDS signal transmitting module (1-12) links to each other with the data-signal input of LVDS signal sending assembly (4), and the data-signal output of LVDS signal transmitting module (1-12) is the data-signal output of signal decoding and error detection alarming module (1); The data-signal input of system clock and data reception module (1-6) links to each other with the data-signal output of LVDS signal receiving assembly (5), and the data-signal input of system clock and data reception module (1-6) is the data-signal input of signal decoding and error detection alarming module (1).
2. the PCM signal monitoring device with error detection alarming function according to claim 1 is characterized in that it is the integrated circuit of IL422 that the telemetered signal isolation is all adopted the model of NVE company with level switch module (2) and remote signal isolation with level switch module (3).
3. the PCM signal monitoring device with error detection alarming function according to claim 1 is characterized in that it is the integrated circuit of DS90LV011 that LVDS signal sending assembly (4) adopts the model of NS company.
4. the PCM signal monitoring device with error detection alarming function according to claim 1 is characterized in that it is the integrated circuit of DS90LV012 that LVDS signal receiving assembly (5) adopts the model of NS company.
5. based on the method for the error detection alarming of the PCM signal monitoring device with error detection alarming function claimed in claim 1, the first telemetered signal decoder module (1-1) in signal decoding and the error detection alarming module (1) is used for the telemetered signal that receives is decoded, and decoded telemetered signal is sent to a LVDS signal framing module (1-5) carries out framing and process; The second remote signal decoder module (1-7) in signal decoding and the error detection alarming module (1) is used for the remote signal that receives is decoded, and decoded remote signal is sent to the 2nd LVDS signal framing module (1-11) carries out framing and process; It is characterized in that also being solidified with in described signal decoding and the error detection alarming module (1) the first clock signal hysteresis gate signal error and detect logic state machine, second clock signal lag gate-control signal error detection logic state machine, the first data-signal hysteresis clock signal error detection logic state machine, the second data-signal hysteresis clock signal error detection logic state machine, the first clock signal duty cycle error detection logic state machine and second clock signal dutyfactor error detection logic state machine; Described the first clock signal hysteresis gate signal error detects logic state machine, the remote measurement detection signal that receives is carried out the error detection of clock signal hysteresis gate-control signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to a LVDS signal framing module (1-5) and carry out framing and process; Described second clock signal lag gate-control signal error detection logic state machine, the remote control detection signal that receives is carried out the error detection of clock signal hysteresis gate-control signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to the 2nd LVDS signal framing module (1-11) and carry out framing and process; Described the first data-signal hysteresis clock signal error detection logic state machine, the remote measurement detection signal that receives is carried out the error detection of data-signal hysteresis clock signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to a LVDS signal framing module (1-5) and carry out framing and process; Described the second data-signal hysteresis clock signal error detection logic state machine, the remote control detection signal that receives is carried out the error detection of data-signal hysteresis clock signal, and generate to report to the police or the information that reports an error according to testing result, also described warning or the information of reporting an error are sent to the 2nd LVDS signal framing module (1-11) and carry out framing and process; The first clock signal duty cycle error detection logic state machine, the remote measurement detection signal that receives is carried out the error detection of clock signal duty cycle, and generate the information that reports an error according to testing result, also the described information of reporting an error is sent to a LVDS signal framing module (1-5) and carry out the framing processing; Second clock signal dutyfactor error detection logic state machine, the remote control detection signal that receives is carried out the error detection of clock signal duty cycle, and generate the information that reports an error according to testing result, also the described information of reporting an error is sent to the 2nd LVDS signal framing module (1-11) and carry out the framing processing, the warning that a described LVDS signal framing module (1-5) and the 2nd LVDS signal framing module (1-11) will receive or the signal framing that reports an error send to LVDS signal transmitting module (1-12) after processing, and the warning that LVDS signal transmitting module (1-12) will receive or the signal that reports an error send to LVDS signal sending assembly (4).
6. the method for the error detection alarming of the PCM signal monitoring device with error detection alarming function according to claim 5, it is characterized in that the first clock signal hysteresis gate signal error detects logic state machine identical with the course of work of second clock signal lag gate-control signal error detection logic state machine, they include one of four states: system's idle condition, begin count status, stop count status and system mode is judged state; In system's idle condition, wait for remote measurement detection signal or remote control detection signal that telemetered signal isolation and level switch module (2) or remote signal isolation and level switch module (3) send; If receive the rising edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into the beginning count status; At the beginning count status, system counter adds 1 in the count results of each clock cycle; If detect the rising edge of the clock signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into and stops count status; Stopping count status, the detection count results of system counter is being latched, then be transformed into system mode and judge state; Judge state in system mode, count results compared with setting threshold that misjudgment occurrence type and time of origin generate warning or the information that reports an error according to predefined threshold value, and send described warning or the information that reports an error; If receive the trailing edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into system's idle condition.
7. the method for the error detection alarming of the PCM signal monitoring device with error detection alarming function according to claim 5, it is characterized in that the first data-signal hysteresis clock signal error detection logic state machine is identical with the course of work of the second data-signal hysteresis clock signal error detection logic state machine, they include five states: system's idle condition, system's ready state, begin count status, stop count status and system mode and judge state; In system's idle condition, wait for remote measurement detection signal or remote control detection signal that telemetered signal isolation and level switch module (2) or remote signal isolation and level switch module (3) send; If receive the rising edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into system's ready state; In system's ready state, wait for remote measurement detection signal or remote control detection signal that detection signal isolation and level switch module send, if receive the trailing edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, described state machine is transformed into system's idle condition; If receive the rising edge of the clock signal in remote measurement detection signal or the remote control detection signal, described state machine is transformed into the beginning count status; At the beginning count status, system counter adds 1 in the count results of each clock cycle; If receive trailing edge and the data-signal of the clock signal in remote measurement detection signal or the remote control detection signal saltus step does not occur, then described state machine is transformed into system's ready state; If receive the data-signal generation saltus step in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into and stops count status; Stopping count status, the detection count results of system counter is being latched, then be transformed into system mode and judge state; Judge state in system mode, count results compared with setting threshold that misjudgment occurrence type and time of origin produce warning or the information that reports an error according to preseting different threshold values, and send described warning or the information that reports an error; Described state machine is transformed into system's ready state.
8. the method for the error detection alarming of the PCM signal monitoring device with error detection alarming function according to claim 5, it is characterized in that the first clock signal duty cycle error detection logic state machine is identical with the course of work of second clock signal dutyfactor error detection logic state machine, they include five states: system's idle condition, system's ready state, begin count status, stop count status and system mode and judge state; In system's idle condition, wait for remote measurement detection signal or remote control detection signal that telemetered signal isolation and level switch module (2) or remote signal isolation and level switch module (3) send; If receive the rising edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into system's ready state; In system's ready state, wait for remote measurement detection signal or remote control detection signal that detection signal isolation and level switch module send, if receive the trailing edge of the gate-control signal in remote measurement detection signal or the remote control detection signal, described state machine is transformed into system's idle condition; If receive the rising edge of the clock signal in remote measurement detection signal or the remote control detection signal, described state machine is transformed into the beginning count status; At the beginning count status, system counter adds 1 in the count results of each clock cycle; If receive the trailing edge of the clock signal in remote measurement detection signal or the remote control detection signal, then described state machine is transformed into and stops count status; Stopping count status, the detection count results of system counter is being latched, then be transformed into system mode and judge state; Judge state in system mode, count results compared with setting threshold that misjudgment occurrence type and time of origin produce the information that reports an error according to preseting different threshold values, and send the described information that reports an error; Described state machine is transformed into system's ready state.
CN 201010300944 2010-01-29 2010-01-29 PCM signal monitoring device with error detection alarming function and error detection alarming method thereof Expired - Fee Related CN101764664B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN 201010300944 CN101764664B (en) 2010-01-29 2010-01-29 PCM signal monitoring device with error detection alarming function and error detection alarming method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN 201010300944 CN101764664B (en) 2010-01-29 2010-01-29 PCM signal monitoring device with error detection alarming function and error detection alarming method thereof

Publications (2)

Publication Number Publication Date
CN101764664A CN101764664A (en) 2010-06-30
CN101764664B true CN101764664B (en) 2013-01-16

Family

ID=42495662

Family Applications (1)

Application Number Title Priority Date Filing Date
CN 201010300944 Expired - Fee Related CN101764664B (en) 2010-01-29 2010-01-29 PCM signal monitoring device with error detection alarming function and error detection alarming method thereof

Country Status (1)

Country Link
CN (1) CN101764664B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112145370B (en) * 2020-09-04 2021-11-02 上海电气风电集团股份有限公司 Communication quality detection method, system and readable storage medium
CN113098587B (en) * 2021-03-31 2022-06-24 中国电子信息产业集团有限公司第六研究所 Satellite-ground link communication system and data processing method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3564147A (en) * 1968-04-05 1971-02-16 Communications Satellite Corp Local routing channel sharing system and method for communications via a satellite relay
CN2582288Y (en) * 2002-11-05 2003-10-22 宋云峰 Equipment for tracing moving object (target) by utilizing public land mobile communication net
CN101505184A (en) * 2009-02-27 2009-08-12 中国电子科技集团公司第五十四研究所 Concealed satellite communication terminal

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3564147A (en) * 1968-04-05 1971-02-16 Communications Satellite Corp Local routing channel sharing system and method for communications via a satellite relay
CN2582288Y (en) * 2002-11-05 2003-10-22 宋云峰 Equipment for tracing moving object (target) by utilizing public land mobile communication net
CN101505184A (en) * 2009-02-27 2009-08-12 中国电子科技集团公司第五十四研究所 Concealed satellite communication terminal

Also Published As

Publication number Publication date
CN101764664A (en) 2010-06-30

Similar Documents

Publication Publication Date Title
Fang et al. Design and simulation of UART serial communication module based on VHDL
CN103077575B (en) A kind of sensor access bus protocol
CN104008078B (en) Method for high-speed transmission between data transmission boards based on FPGA
CN201820348U (en) Performance tester of infrared remote controller
CN101764664B (en) PCM signal monitoring device with error detection alarming function and error detection alarming method thereof
CN201413376Y (en) Detecting circuit of signal outputting port
EP2823404A1 (en) Collision detection in eia-485 bus systems
CN104090511B (en) Circuit and method for achieving non-polar 485 communication
CN109995347A (en) Signal isolation circuit
CN104218777A (en) Monitoring system of cascaded multilevel high-voltage inverter power unit
CN102546215B (en) Method and device for protecting data link, and equipment with device
CN204425343U (en) A kind of microsatellite multi-functional data test macro
CN202916647U (en) Diode measurement steering magnet control system
CN202974355U (en) Ultrasonic flow measurement device
CN103063942B (en) The periodicity detection methods of HB6096 EBIs
CN202600892U (en) Digital fire-fighting detection and evaluation system
CN104376703A (en) Sound-light alarm device with wireless hop-transmitting function
CN103217635A (en) Ultraviolet detection equipment with partial discharge function
CN108375708A (en) A kind of flexible direct current power transmission system power module functional test board
CN103517307A (en) Remote debugging system based on TD-SCDMA
CN202404067U (en) Ultrasound signal channel automatic switching device
CN206833683U (en) Engineering calling system and production line
CN107665572A (en) A kind of warning information analysis method and device
CN202889362U (en) Multilink data transmitting device, multilink data receiving device and multilink data transmitting and receiving system comprising multilink data transmitting device and multilink data receiving device
CN216596245U (en) Serial port transceiving troubleshooting circuit

Legal Events

Date Code Title Description
C06 Publication
PB01 Publication
C10 Entry into substantive examination
SE01 Entry into force of request for substantive examination
C14 Grant of patent or utility model
GR01 Patent grant
C17 Cessation of patent right
CF01 Termination of patent right due to non-payment of annual fee

Granted publication date: 20130116

Termination date: 20140129