CN101882192B - Circuit protecting device, method and layer - Google Patents
Circuit protecting device, method and layer Download PDFInfo
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- CN101882192B CN101882192B CN2009101364555A CN200910136455A CN101882192B CN 101882192 B CN101882192 B CN 101882192B CN 2009101364555 A CN2009101364555 A CN 2009101364555A CN 200910136455 A CN200910136455 A CN 200910136455A CN 101882192 B CN101882192 B CN 101882192B
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Abstract
The invention discloses circuit protecting device, method and layer, which can effectively realize that a region to be protected in a circuit on a chip can be prevented from being cracked to ensure that the region to be protected in the circuit on the chip can be protected before cracked or damaged. The circuit protecting device comprises a selecting module, a wiring module, a processing module and a control module. The selecting module is used for selecting a wiring drawing for each minimum wiring region in a plurality of preset wiring drawings and generating an input signal. The wiring module is used for generating wiring with selected wiring drawings on the region to be protected to form a circuit protecting layer. The wiring receives the input signal and generates an output signal. The processing module is used for decoding the output signal into a reducing signal and comparing the reducing signal with the input signal to generate a comparison result. The control module is used for selectively enabling the chip to be in a failure state according to the comparison result.
Description
Technical field
The present invention relates to circuit protection, refer to a kind of circuit protection device, circuit protection method and circuit protecting layer that can prevent that the desire protection zone in the circuit on the chip from being cracked especially.
Background technology
Along with electronics technology constantly develops, the function that electronic product miscellaneous possessed on the market is more and more variation also.Therefore, the circuit design on chip also certainly will more and more be innovated and be complicated, just is enough to satisfy the user's of electronic product actual demand.
Yet,, cause many important circuit layout designs on the chip to be faced with to be had the inclination the risk that the personage cracks also because it is more and more flourishing to carry out the technology of reverse engineering (reversing engineering) to the circuit layout of chip.For example, the cracker can use nitric acid to remove the epoxy resin of parcel chip earlier and accomplish cleaning with acetone/deionized water/isopropyl alcohol; Then, further use hydrofluorite to remove each layer metal of chip again.After removing Chip Packaging; As long as the cracker can understand the wiring of its internal signal; Can pass through FIB (focused ion beam; FIB) technology is successively removed obtaining the required information of reconfigurable chip layout design, even the surface that also can interested signal be linked chip is for further observation.The result causes being positioned at the very crucial and important circuit layout design in some zone on the chip probably; Be subjected to intentionally cracking of personage; Even be applied on the illegal purposes; This not only has very big injury for the deviser's of this circuit layout rights and interests, has more seriously violated the relevant regulations of law.
Therefore, main category of the present invention is to provide a kind of circuit protection device, circuit protection method and circuit protecting layer, to address the above problem.
Summary of the invention
Technical matters to be solved by this invention provides a kind of circuit protection device, circuit protection method and circuit protecting layer; Can realize effectively preventing that the desire protection zone in the circuit on the chip from being cracked; Make the desire protection zone in the circuit on the chip before being subjected to as yet to crack or destroy, can not obtain protection, stolen to avoid important circuit layout design.
In order to solve above technical matters, the invention provides following technical scheme:
The invention provides a kind of circuit protection device.This circuit protection device system is applied to the desire protection zone on the chip, and is to be used to this top, desire protection zone to form a circuit protecting layer.This desire protection zone comprises a plurality of minimum wiring region.This circuit protection device comprises chooses module, interconnect module, processing module and control module.Wherein interconnect module system is coupled to and chooses module and circuit protecting layer; Processing module system is coupled to and chooses module and circuit protecting layer; Control module system is coupled to processing module.
In the first embodiment of the present invention, choose module system in order in a plurality of preset wiring patterns, to choose a wiring pattern respectively for each minimum wiring region.Interconnect module system is used to this top, desires protection zone and utilizes those wiring patterns of choosing to produce one to connect up to form this circuit protecting layer, and wherein this cloth linear system and a plurality of duplicator and this are chosen module and coupled.
In practical application, these minimum wiring region systems cut apart the area of desiring the protection zone continuously through the prime factor decomposition method and get.It should be noted that to be divided into a plurality ofly during when the area of desiring the protection zone that each regional wiring starting point all can be determined with the wiring terminal point than small size regional at every turn.Therefore, when the area of desiring the protection zone finally was divided into a plurality of minimum wiring region, the wiring starting point of each minimum wiring region also all can be determined with the wiring terminal point.
Then; Choosing module can be according to the wiring starting point and wiring terminal point of each minimum wiring region; In the stored a plurality of preset wiring pattern of a database in the wiring pattern of all wiring starting points that meet each minimum wiring region and wiring terminal point; Be each minimum wiring region difference picked at random one wiring pattern, and see through interconnect module in desiring to utilize those wiring patterns of choosing to produce a wiring above the protection zone.Accomplish the random interconnecting program of all minimum wiring region in regular turn when interconnect module after, can form the circuit protecting layer of desiring the top, protection zone.
In practical application, this cloth linear system and a plurality of duplicator couple and this wiring receives an input signal and produces an output signal.In fact, because after this input signal inputed to this wiring, the loss of transmitting owing to circuit probably caused the weakened of this input signal, so whenever at a distance from a segment length duplicator is set promptly in this wiring, avoids its intensity to weaken to repeat this input signal.
When processing module after this wiring receives output signal, processing module promptly can with this output signal be decoded as a reduction signal and relatively this reduction signal and this input signal to produce a comparative result.Then, control module can optionally make this chip failure according to this comparative result.
In practical application, these minimum wiring region systems cut apart the area of desiring the protection zone continuously through the prime factor decomposition method and get.When comparative result for this reduction signal and this input signal not simultaneously, represent circuit protecting layer probably just being subjected to the action that cracks or destroy, so this control module will make chip failure at once.By this, circuit protection device can prevent effectively that promptly the desire protection zone in the circuit from being cracked or destroying.
The present invention provides a kind of circuit protection method in addition.This circuit protection method system is applied to the desire protection zone on the chip.At first, this method will be desired the protection zone and be divided into a plurality of minimum wiring region, and in a plurality of preset wiring patterns, choose a wiring pattern respectively for each minimum wiring region.Then, this method utilizes those wiring patterns of choosing to produce a wiring to form a circuit protecting layer in this top, desire protection zone.In practical application, when this wiring received an input signal and produces an output signal, this method was decoded as this output signal one reduction signal and judges whether this reduction signal is identical optionally to make this chip failure with this input signal.
The present invention also provides a kind of circuit protecting layer.These circuit protection series of strata are formed at the top, desire protection zone on the chip by circuit protection device.This circuit protecting layer comprises the wiring with a plurality of preset wiring patterns.In a third embodiment in accordance with the invention, the wiring starting point of this wiring and wiring terminal point system are positioned at the edge of this wiring pattern.This cloth linear system and a plurality of duplicator couple.In practical application, this wiring receives an input signal and produces an output signal via the effect of duplicator from circuit protection device.After circuit protection device received this output signal and this output signal is decoded as a reduction signal, this relatively reduced signal and this input signal optionally to make this chip failure this circuit protection device.
The circuit protection device that the present invention adopted, circuit protection method and circuit protecting layer; Can on the circuit protecting layer above the desire protection zone of chip, be covered with a wiring at random with complicated wiring pattern; And increase the number and the complexity thereof of this wiring through the duplicator of component layer that is positioned at the below, cause the mode that is difficult to through FIB and so on that reverse engineering is carried out in the circuit layout design of this chip.
Moreover; In case this circuit protection device detects output signal of being exported by this circuit protecting layer and the input signal of importing this circuit protecting layer not simultaneously; Represent this circuit protecting layer probably just being subjected to the action that cracks or destroy; In order to protect the desire protection zone of below, this circuit protection device will make this chip failure at once, to prevent that desiring the protection zone is cracked or destroy.
Can further be understood by following embodiment and institute's accompanying drawing explanation about advantage of the present invention and spirit.
Description of drawings
Fig. 1 (a) is divided into the example of minimum wiring region continuously through the prime factor decomposition method for the area that will desire the protection zone.
Fig. 1 (b) for through the order opposite with Fig. 1 (a) with the mode of Query Database for each minimum wiring region respectively picked at random one corresponding wiring pattern with the example of the wired program of accomplishing whole desire protection zone.
Fig. 2 is the functional block diagram according to the circuit protection device of first specific embodiment of the present invention.
Fig. 3 (a) is for being stored in the synoptic diagram of the wiring pattern with 1 * 1 pattern in the database.
Fig. 3 (b) is for being stored in the synoptic diagram of the wiring pattern with 2 * 2 patterns in the database.
Fig. 3 (c) has 2 * 2 patterns but the synoptic diagram of the zone wiring pattern that can't connect up wherein for being stored in the database.
Fig. 4 is positioned at the wiring on the circuit protecting layer and is arranged at the synoptic diagram that the duplicator on the component layer couples.
Fig. 5 is the process flow diagram according to the circuit protection method of second specific embodiment of the present invention.
Fig. 6 is the synoptic diagram according to the circuit protecting layer of the 3rd specific embodiment of the present invention.
[primary clustering symbol description]
Process step S10～S17
Wiring 20,41 wiring starting points 201
Desire protection zone 3 subregions 4
Zonule 5 minimum wiring region 6
Desire protection zone layer 43 component layer 44
Embodiment
Fundamental purpose of the present invention is to propose a kind of circuit protection device, circuit protection method and circuit protecting layer.By this, make that the desire protection zone in the circuit on the chip can not obtain protection before being subjected to as yet to crack or destroy, stolen to avoid important circuit layout design.
First specific embodiment according to the present invention is a kind of circuit protection device.In this embodiment, this circuit protection device system is applied to be arranged on the desire protection zone in the circuit on the chip, and is to be used to desire the top, protection zone to form circuit protecting layer.This desire protection zone comprises a plurality of minimum wiring region.In fact, this circuit protection device can also be a multilayer in desiring not only one deck of the formed circuit protecting layer in top, protection zone.These minimum wiring region can be to get through the area that the prime factor decomposition method is cut apart this desire protection zone continuously, but not as limit.
Please with reference to Fig. 1 (a) and Fig. 1 (b), Fig. 1 (a) is for be divided into the area of whole desire protection zone through prime factor decomposition method for several times one example of minimum wiring region continuously.Fig. 1 (b) is all minimum wiring region picked at random one corresponding wiring patterns respectively through the order opposite with Fig. 1 (a) with the mode of Query Database; When the wired program of whole desire protection zone is all accomplished, can form the circuit protecting layer of the corresponding desire of protection protection zone smoothly.
Shown in Fig. 1 (a), the area of supposing originally to desire protection zone 3 is A, and after carrying out cutting apart first time through the prime factor decomposition method, desire protection zone 3 will be divided into 2 * 3 totally 6 sub regions 4, and the area of each subregion 4 is (1/6) A.It should be noted that when desire protection zone 3 is divided into 6 sub regions 4 the wiring starting point of each subregion 4 and wiring terminal point all can be determined.
Then; After each subregion 4 carried out cutting apart the second time through the prime factor decomposition method again, each subregion 4 was divided into 5 * 2 totally 10 zonules 5 again, at this moment; Desire protection zone 3 and be divided into 60 zonules 5 altogether, and the area of each zonule 5 is (1/60) A.Likewise, the wiring starting point of each zonule 5 and wiring terminal point all can be determined.
Then, after each zonule 5 again can be again carry out being cut apart for the third time through the prime factor decomposition method, each zonule 5 can be divided into 2 * 3 totally 6 many smaller area territories again, up to desiring till the protection zone is divided into minimum wiring region 6.At this moment, desire protection zone 3 and be divided into 360 minimum wiring region 6 altogether.Certainly, the wiring starting point of these 360 minimum wiring region 6 and wiring terminal point all can be determined too.
Hold example; 360 minimum wiring region 6 have been divided into when desiring protection zone 3; And the wiring starting point of each minimum wiring region 6 and wiring terminal point will carry out the random interconnecting program with Fig. 1 (a) reversed in order to all minimum wiring region 6, shown in Fig. 1 (b) all by after the decision.
In this embodiment, because the wiring starting point of each minimum wiring region 6 all determined with the wiring terminal point, and a database storage has a plurality of preset wiring patterns.So the time can inquire about this database and in the wiring pattern of all wiring starting points that meet this minimum wiring region and wiring terminal point picked at random one wiring pattern, and on this minimum wiring region, form and have a minimum wiring of this wiring pattern.
For example, after the minimum wiring of six minimum wiring region 6 among Fig. 1 (b) is all accomplished, promptly accomplished the random interconnecting program of a zonule 5.Then, after the wiring of the zonule of ten zonules 5 is all accomplished, promptly accomplished the random interconnecting program of a sub regions 4.In like manner, after the subregion wiring of six sub regions 4 was all accomplished, the random interconnecting program of whole desire protection zone 3 was promptly accomplished, that is was formed at desire 3 tops, protection zone smoothly corresponding to the circuit protecting layer of desiring protection zone 3.
After random interconnecting program proposed by the invention has been described, then, will introduce with regard to circuit protection device of the present invention.Please with reference to Fig. 2, Fig. 2 is the functional block diagram of this circuit protection device.As shown in Figure 2, circuit protection device 1 comprises chooses module 10, interconnect module 12, processing module 14 and control module 16.Wherein interconnect module 12 is to be coupled to choose module 10 and circuit protecting layer 8; Processing module 14 is to be coupled to choose module 10 and circuit protecting layer 8; Control module 16 is to be coupled to processing module 14.Next, with carrying out detailed introduction with regard to each module and the function thereof of circuit protection device 1 respectively.
In this embodiment, circuit protection device 1 will desire to form a circuit protecting layer 8 above the protection zone, and this circuit protecting layer 8 has the wiring of the very dense that forms at random and complicated wiring pattern.In order to accomplish this wiring smoothly, choose module 10 and in a plurality of preset wiring patterns, choose a wiring pattern respectively for each these minimum wiring region.In fact; These preset wiring patterns can be stored in database (not being shown among the figure); When elected delivery piece 10 desired to choose action, choosing module 10 promptly can be by selecting at random respectively for each these minimum wiring region in stored all the preset wiring patterns of database and the wiring starting point and the corresponding wiring pattern of wiring terminal point of minimum wiring region.
In practical application, this wiring can be combined according to a wiring standard by a plurality of wiring patterns, and these wiring patterns are corresponding to these minimum wiring region.In addition, the wiring starting point and the wiring terminal point that are formed at the whole wiring of circuit protecting layer 8 all can be positioned at the edge of this whole wiring pattern; Also can be positioned at the edge of wiring pattern as for the wiring starting point of each wiring pattern and wiring terminal point.
Please with reference to Fig. 3 (a) to Fig. 3 (c).Fig. 3 (a) is for being stored in the synoptic diagram of the wiring pattern with 1 * 1 pattern in the database.For example, suppose that wiring starting point system is positioned at the left side of minimum wiring region and the right side that wiring terminal point system is positioned at minimum wiring region, then chooses the wiring pattern that module 10 promptly can be chosen Fig. 3 (a) upper left corner; Suppose that wiring starting point system is positioned at the below of minimum wiring region and the right side that wiring terminal point system is positioned at minimum wiring region, then choose the wiring pattern that module 10 promptly can be chosen Fig. 3 (a) lower right corner, all the other all by that analogy.
Fig. 3 (b) is for being stored in the synoptic diagram of the wiring pattern with 2 * 2 patterns in the database.For example, suppose that the wiring starting point system of certain minimum wiring region is positioned at (1,1) of minimum wiring region, because wiring must pile warp own (1; 1), (1,2), (2,1) and four zones such as (2,2); So the wiring terminal point of this minimum wiring region only can come across (1,2) or (2,1); Can not appear at (2,2), so eight kinds of possible wiring patterns shown in total total Fig. 3 (b) first row.The wiring starting point system of supposing this minimum wiring region is positioned at (1; 1) left side and wiring terminal point system are positioned at (1; 2) top is then chosen module 10 and promptly can be chosen the wiring pattern of the last a kind of wiring pattern of first row as this minimum wiring region, and all the other all by that analogy.
As for Fig. 3 (c) then for be stored in the database have 2 * 2 patterns but wherein the synoptic diagram of wiring pattern of (for example this zone is a hole (via), but not as limit) can't connect up in a zone.In Fig. 3 (c), last of each line chart appearance of arranging drawn the impossible situation that takes place of pattern system of X.With first row is example, if the wiring starting point of minimum wiring region system is positioned at (1,1), because wiring must all three zone can connecting up of pile warp and can not be repeated to connect up, can not be the zone of can't connecting up so be positioned at (2,2) at (1,1) diagonal angle.
For example, suppose that the wiring starting point system of certain minimum wiring region is positioned at (1,1), then possibly be selected eight kinds of wiring patterns that wiring pattern that module 10 chooses is first row of Fig. 3 (c).The zone system of supposing to connect up is positioned at (2,1), and the wiring starting point of this minimum wiring region system is positioned at the below of (1,1), and wiring terminal point system is positioned at the right side of (2,2), then chooses first kind of wiring pattern in the left side that module 10 will be chosen first row.
In another example, suppose that wiring starting point system is positioned at (2,2), then possibly be selected eight kinds of wiring patterns that wiring pattern that module 10 chooses is the 4th row of Fig. 3 (c).Suppose that the zone system that can't connect up is positioned at (1,2), and wiring starting point system is positioned at (2; 2) top; Wiring terminal point system is positioned at the left side of (1,1), then chooses module 10 and will choose the wiring pattern of first kind of wiring pattern in the left side of the 4th row as this minimum wiring region.All the other all by that analogy, so do not give unnecessary details separately.
It should be noted that above-mentioned segmentation result and wiring pattern are an example, actual segmentation result and wiring pattern have very multiple different variation situation.For example; The shape of one wiring pattern can be rectangle, square, as shape (the oblique line part can be the position in hole) or other shape of Fig. 3 (c); The size of minimum wiring region also can be decided according to the actual requirements, so all do not have certain restriction and do not exceed with above-mentioned.
After elected delivery piece 10 was selected these wiring patterns, interconnect module 12 can form the wiring with these wiring patterns that are selected on circuit protecting layer.In fact, this cloth linear system and a plurality of duplicator and choose module 10 and couple, this wiring will free delivery piece 10 receives input signals and through producing an output signal after the effect of duplicator.
Because the suitable length of physical length of this wiring; After this input signal is input to this wiring; Loss owing to the circuit transmission causes the intensity of this input signal to die down gradually probably; So this wiring whenever promptly can be coupled to a duplicator at a distance from a segment length, avoid its intensity to weaken to repeat this input signal.
On the other hand, to also have another important function be to increase the number of wiring to increase the complexity of overall routing to these duplicators.For example; Suppose that interconnect module 12 is 8 according to the wiring number that wiring comprised that these wiring pattern that is selected institute desires form originally; Effect through duplicator; The number that can will connect up increases to several times originally, and for example number increases to originally 10 times if duplicator system will connect up, and the number that then connects up has just become 80 by originally 8.By this, the wiring that is formed on the circuit protecting layer will become more complicated and changeable, can significantly increase the difficulty that cracks.
In addition, though these duplicators couple with this wiring, they are not to be arranged on the circuit protecting layer, but are arranged on the component layer of circuit protecting layer below.In fact, as shown in Figure 4, the wiring 41 that is positioned at circuit protecting layer 42 be through hole 46 extend to component layer 44 and with component layer 44 on after certain duplicator 45 couples, extend telegram in reply road protective seams 42 to continue to accomplish wiring 41 through hole 46 again.The purpose of this special practice promptly is to increase the degree of difficulty that cracks wire laying mode; Even the cracker reaches circuit protecting layer smoothly through FIB; But because quite a few places all can be around to being positioned on the good component layer outside which floor in below in the middle of being routed on the circuit protecting layer, it is high that the cracker wants to crack the difficulty of this wire laying mode.
In practical application, these duplicators can be impact damper (buffer), reverser (inverter), same or assemblies such as logic gate (XNOR) assembly, exclusive or logic gate (XOR) assembly, but do not exceed with above-mentioned.It should be noted that in order more to increase the difficulty that cracks wire laying mode, in these duplicators, also can comprise false duplicator, to reach the effect of obscuring the cracker with repeat function.
Next, processing module 14 promptly can receive this output signal and free delivery piece 10 these input signals of reception from this wiring.Because this output signal is that this input signal is through the result after many duplicator effects, so after processing module 14 can be decoded as a reduction signal with this output signal earlier, relatively be somebody's turn to do reduction signal and this input signal again to produce comparative result.
Then, control module 16 promptly can optionally make this chip failure according to the comparative result of processing module 14.If the comparative result of processing module 14 is identical with this input signal for this reduction signal; Represent the wiring of present circuit protecting layer not to be subjected to the action that cracks as yet; So control module 16 will be judged current chip and be under the state of safety, and keep the normal operation of this chip.
On the contrary; If the comparative result of processing module 14 is different with this input signal for this reduction signal; The action of representing the wiring of present circuit protecting layer just being cracked or destroying probably; So control module 16 promptly can make this chip failure at once, cracked or destroyed with the desire protection zone of avoiding being positioned at the circuit protecting layer below.
Second specific embodiment according to the present invention is a kind of circuit protection method.This circuit protection method ties up to and forms a circuit protecting layer on the desire protection zone in the circuit on the chip, should desire the protection zone with protection.Please with reference to Fig. 5, Fig. 5 is the process flow diagram of this circuit protection method.
As shown in Figure 5, at first, this method execution in step S10 will desire the protection zone and be divided into a plurality of minimum wiring region.In fact, these minimum wiring region can be cut apart the area of desiring the protection zone continuously through the prime factor decomposition method and get, but not as limit.As for desiring the practical situation that the protection zone is divided into minimum wiring region,, repeat no more at this please with reference to Fig. 1.
Then, this method execution in step S11 is for each minimum wiring region is chosen a wiring pattern in a plurality of preset wiring patterns.In fact, this wiring can be combined according to the wiring standard by a plurality of wiring patterns, and these wiring pattern systems are corresponding to these minimum wiring region.That is to say; Be divided into many minimum wiring region owing to desire the protection zone; So this method can be through looking for the wiring pattern corresponding to these minimum wiring region from database, and these wiring patterns that are selected are made up in order can accomplish wired program.
Then, this method execution in step S12 utilizes those wiring patterns that are selected to produce a wiring to form a circuit protecting layer in this top, desire protection zone.In next step S13, this wiring receives an input signal and produces an output signal.It should be noted that the wiring starting point of this wiring and the edge that the wiring terminal point all can be positioned at these wiring patterns.In addition; Because the suitable length of physical length of this wiring; After this input signal is input to this wiring; Loss owing to the circuit transmission causes the intensity of this input signal to die down gradually probably, so this wiring whenever promptly can be coupled to a duplicator at a distance from a segment length, avoids its intensity to weaken to repeat this input signal.
On the other hand, these duplicators also can increase the complexity of the number of wiring with the increase overall routing, significantly to reduce the probability that circuit is cracked.In addition, though these duplicators couple with this wiring, they are not to be arranged on the circuit protecting layer, but are arranged on the component layer of circuit protecting layer below.In fact, the cloth linear system that is positioned at circuit protecting layer see through the hole extend to component layer and with component layer on after certain duplicator couples, extend telegram in reply road protective seam to continue to accomplish this wiring through drawing the hole again.By this, even the cracker can reach circuit protecting layer through FIB, but because quite a few places all can be around to being positioned on the good component layer outside which floor in below in the middle of being routed on the circuit protecting layer, it is high that the cracker wants to crack the difficulty of this wire laying mode.
Then and since this output signal be this input signal through the result after many duplicator effects, so this method will first execution in step S14, this output signal is decoded as one reduces signal.Afterwards, this method is execution in step S15 again, judges whether this reduction signal is identical with this input signal.
Next, will possibly judged result inquire into regard to two kinds of step S15.If the judged result of step S15 is for denying; That is this reduction signal and this input signal and inequality; The action of representing present circuit protecting layer probably just being cracked or destroying; So this method will execution in step S16, makes this chip failure at once, is cracked or destroys to avoid the desire protection zone in the circuit.
On the contrary; If the judged result of step S15 is for being; That is should the reduction signal identical with this input signal, the action of representing the wiring of present circuit protecting layer to be cracked as yet or destroy, that is current chip should be in safety and not have under the state of deceiving; So this method will execution in step S17, keeps the normal operation of chip.
The 3rd specific embodiment according to the present invention is a kind of circuit protecting layer.These circuit protection series of strata are formed at the top, desire protection zone in the circuit on the chip by a circuit protection device.In this embodiment; Circuit protecting layer 2 comprises the wiring 20 with a plurality of wiring patterns 22; And 20 wiring starting point 201 of connecting up and wiring terminal point 202 are the edge that is positioned at these wiring patterns 22, wherein connect up 20 whenever promptly duplicator can be set at a distance from a segment length, and be as shown in Figure 6.As for the mode of choosing of these wiring patterns 22 and how on circuit protecting layer 2, to form wiring 20, please, repeat no more at this with reference to the explanation of first and second specific embodiment with these wiring patterns that are selected 22.
In this embodiment, this cloth linear system and a plurality of duplicator couple, and are in order to receive an input signal from circuit protection device and to produce an output signal via the effect of duplicator.In fact, this wiring whenever promptly can be coupled to a duplicator at a distance from a segment length, avoids its intensity to weaken to repeat this input signal.In addition, these duplicators also can increase the complexity of the number of wiring with the increase overall routing, significantly to reduce the probability that circuit is cracked.
It should be noted that; Because these duplicators are arranged on the component layer of circuit protecting layer below; So wiring promptly need to see through earlier the hole extend to component layer and with component layer on after certain duplicator couples, see through again the hole extend telegram in reply road protective seam should wiring to continue to accomplish.By this, even the cracker can reach circuit protecting layer through FIB, but because the quite a few places, centre that are routed on the circuit protecting layer all can be around getting well on the component layer outside which floor to being positioned at the below, the cracker still is difficult to crack this wire laying mode.
When circuit protection device after this wiring receives this output signal and this output signal is decoded as a reduction signal, this circuit protection device relatively this reduction signal and this input signal optionally to make this chip failure.For example, if the resulting comparative result of circuit protection device is different with this input signal for this reduction signal, represent present circuit protecting layer probably just to be cracked or destroy, so circuit protection device will make chip failure at once; If the resulting comparative result of circuit protection device is identical with this input signal for this reduction signal, represent present circuit protecting layer not cracked or destroy, so circuit protection device will be kept the normal operation of chip.
In sum; Because protective device and circuit protection method can be covered with the wiring with complicated wiring pattern at random on the circuit protecting layer above the desire protection zone of chip in a circuit according to the invention; And increase the number and the complexity thereof of this wiring through the duplicator of component layer that is positioned at the below, cause that to carry out the difficulty of reverse engineering through FIB high.Moreover; In case this circuit protection device detects an output signal of being exported by this circuit protecting layer and an input signal of importing this circuit protecting layer not simultaneously; Represent this circuit protecting layer probably just being subjected to the action that cracks; In order to protect the desire protection zone of below, this circuit protection device will make this chip failure at once, to prevent that desiring the protection zone is cracked.
By the detailed description of above preferred embodiment, be that hope can be known the characteristic and spirit of describing the present invention more, and be not to come category of the present invention is limited with the above-mentioned preferred embodiment that is disclosed.On the contrary, its objective is that hope can contain in the category of claim of being arranged in of various changes and tool equality institute of the present invention desire application.
Claims (20)
1. a circuit protection device is applied to the desire protection zone on the chip, and this desire protection zone comprises a plurality of minimum wiring region, it is characterized in that, this circuit protection device comprises:
One chooses module, chooses a wiring pattern in order in a plurality of preset wiring patterns, to be respectively this minimum wiring region; And
One interconnect module is coupled to this and chooses module, is used to top, this desire protection zone and utilizes these wiring patterns of choosing to produce a wiring to form a circuit protecting layer, and wherein this cloth linear system and a plurality of duplicator and this are chosen module and coupled.
2. circuit protection device as claimed in claim 1 is characterized in that, further comprises:
One processing module and a control module; Wherein this processing module is coupled to this and chooses module, this wiring and this control module; This wiring is chosen module from this and is received an input signal and produce an output signal; After this processing module received this input signal and this output signal and this output signal is decoded as a reduction signal, relatively this reduction signal and this input signal were to produce a comparative result for this processing module, and this control module optionally makes this chip failure according to this comparative result.
3. circuit protection device as claimed in claim 2 is characterized in that, when this comparative result for this reduction signal and this input signal not simultaneously, this control module promptly can make this chip failure.
4. circuit protection device as claimed in claim 2 is characterized in that, when this comparative result is this reduction signal when identical with this input signal, this control module is kept this chip normal operation.
5. circuit protection device as claimed in claim 1 is characterized in that, this cloth linear system is combined according to a wiring standard by these wiring patterns corresponding to these minimum wiring region.
6. circuit protection device as claimed in claim 1 is characterized in that, a wiring starting point of this wiring and a wiring terminal point all are the edge that is positioned at these wiring patterns.
7. circuit protection device as claimed in claim 1 is characterized in that, these duplicators system is selected from an impact damper, a reverser, an XOR door assembly and at least a together or in the logic gate assembly.
8. circuit protection device as claimed in claim 1; It is characterized in that; These duplicator systems are arranged at a component layer of this circuit protecting layer below; After this cloth linear system sees through by this circuit protecting layer that a hole extends to this component layer and couples with these duplicators, see through this hole again and extends back this circuit protecting layer and connect up to continue to accomplish to be somebody's turn to do.
9. circuit protection device as claimed in claim 1 is characterized in that wherein these duplicators include false duplicator.
10. circuit protection device as claimed in claim 1; It is characterized in that; Wherein these minimum wiring region systems get through the continuous area of cutting apart this desire protection zone for several times of a prime factor decomposition method; The wiring starting point of resulting a plurality of less surface areas and wiring terminal point all can be determined after cutting apart each time; This choose module system according to the wiring starting point of cutting apart resulting these minimum wiring region for the last time and wiring terminal point in stored these the preset wiring patterns of a database, for each minimum wiring region is chosen a corresponding wiring pattern respectively.
11. a circuit protection method is applied to the desire protection zone on the chip, it is characterized in that this circuit protection method comprises the following step:
Should desire the protection zone and be divided into a plurality of minimum wiring region;
For each minimum wiring region is chosen a wiring pattern respectively in a plurality of preset wiring patterns; And
Utilize these wiring patterns of choosing to produce a wiring to form a circuit protecting layer in this top, desire protection zone.
12. circuit protection method as claimed in claim 11 is characterized in that, further comprises the following step:
This wiring receives an input signal and produces an output signal;
This output signal is decoded as a reduction signal; And
Judge whether this reduction signal is identical optionally to make this chip failure with this input signal.
13. circuit protection method as claimed in claim 12 is characterized in that, wherein if this judged result of judging the step that this reduction signal and this input signal be whether identical is to deny, this chip promptly can lose efficacy.
14. circuit protection method as claimed in claim 12 is characterized in that, wherein if this judged result of judging the step that this reduction signal and this input signal be whether identical is for being that this chip is kept normal operation.
15. circuit protection method as claimed in claim 11 is characterized in that, wherein this cloth linear system is combined according to a wiring standard by these wiring patterns corresponding to these minimum wiring region.
16. circuit protection method as claimed in claim 11; It is characterized in that; Wherein be divided in a plurality of minimum wiring region steps in desiring the protection zone; The area that this desire protection zone is cut apart for several times continuously through a prime factor decomposition method in these minimum wiring region systems gets; The wiring starting point of resulting a plurality of less surface areas and wiring terminal point all can be determined after cutting apart each time, and the above-mentioned step system basis of choosing this wiring pattern is cut apart the wiring starting point of resulting a plurality of minimum wiring region for the last time and connected up terminal point in these preset wiring patterns, for each minimum wiring region is chosen a corresponding wiring pattern respectively.
17. a circuit protecting layer is to be formed at the top, a desire protection zone on the chip by a circuit protection device, it is characterized in that this circuit protecting layer comprises:
One wiring comprises a plurality of preset wiring patterns, and a wiring starting point of this wiring and a wiring terminal point system are positioned at the edge of this desire protection zone, and this wiring and a plurality of duplicator couple.
18. circuit protecting layer as claimed in claim 17; It is characterized in that; This wiring from this circuit protection device receive an input signal and via these duplicators to produce an output signal; After this circuit protection device receives this output signal and this output signal is decoded as a reduction signal, this circuit protection device relatively this reduction signal and this input signal optionally to make this chip failure.
19. circuit protecting layer as claimed in claim 18 is characterized in that, when this reduction signal and this input signal not simultaneously, this circuit protection device makes this chip failure.
20. circuit protecting layer as claimed in claim 18 is characterized in that, wherein when this reduction signal was identical with this input signal, this circuit protection device was kept this chip normal operation.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009101364555A CN101882192B (en) | 2009-05-08 | 2009-05-08 | Circuit protecting device, method and layer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2009101364555A CN101882192B (en) | 2009-05-08 | 2009-05-08 | Circuit protecting device, method and layer |
Publications (2)
| Publication Number | Publication Date |
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| CN101882192A CN101882192A (en) | 2010-11-10 |
| CN101882192B true CN101882192B (en) | 2012-08-22 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN2009101364555A Expired - Fee Related CN101882192B (en) | 2009-05-08 | 2009-05-08 | Circuit protecting device, method and layer |
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Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102184270A (en) * | 2010-11-24 | 2011-09-14 | 天津蓝海微科技有限公司 | Automatic generation method for layout protection circuit of safety chip |
| CN104573270B (en) * | 2015-01-27 | 2018-01-19 | 聚辰半导体(上海)有限公司 | A kind of design method of the active metal defence layer of restructural |
| CN105243343B (en) * | 2015-10-21 | 2018-05-01 | 北京华大信安科技有限公司 | A kind of metal-shielded wire protection circuit, equivalent circuit and detection method |
| CN105574241A (en) * | 2015-12-10 | 2016-05-11 | 天津蓝海微科技有限公司 | Wiring method for active shielded wire |
| CN106650894A (en) * | 2016-12-20 | 2017-05-10 | 珠海晶通科技有限公司 | Chip anti-cracking method |
| CN107193709A (en) * | 2017-05-23 | 2017-09-22 | 郑州云海信息技术有限公司 | Monitoring and method, device and the positioning chip of positioning running state of single plate |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1332526C (en) * | 2003-09-29 | 2007-08-15 | 智慧第一公司 | Method and apparatus for performing microprocessor block cipher coding decoding |
| CN101040474A (en) * | 2004-08-12 | 2007-09-19 | Cmla有限公司 | Permutation data transform to enhance security |
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Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1332526C (en) * | 2003-09-29 | 2007-08-15 | 智慧第一公司 | Method and apparatus for performing microprocessor block cipher coding decoding |
| CN101040474A (en) * | 2004-08-12 | 2007-09-19 | Cmla有限公司 | Permutation data transform to enhance security |
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| CN101882192A (en) | 2010-11-10 |
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