CN101876925B - Internal storage mirroring method, device and system - Google Patents
Internal storage mirroring method, device and system Download PDFInfo
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- CN101876925B CN101876925B CN2009102256755A CN200910225675A CN101876925B CN 101876925 B CN101876925 B CN 101876925B CN 2009102256755 A CN2009102256755 A CN 2009102256755A CN 200910225675 A CN200910225675 A CN 200910225675A CN 101876925 B CN101876925 B CN 101876925B
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- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/202—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant
- G06F11/2038—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements where processing functionality is redundant with a single idle spare processing component
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F11/00—Error detection; Error correction; Monitoring
- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
- G06F11/16—Error detection or correction of the data by redundancy in hardware
- G06F11/20—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
- G06F11/2097—Error detection or correction of the data by redundancy in hardware using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements maintaining the standby controller/processing unit updated
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- G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
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Abstract
The embodiment of the invention provides an internal storage mirroring method, device and system. The method comprises the following steps: a standard internal storage interface provided by an internal storage interface module is used to receive the data to be written in a write request command; and if the write request command is an external request accessing a controller on the opposite terminal, a communication interface module is used to transmit the data which are required to copy in the data to be written to the internal storage mirroring device on the opposite terminal so that the internal storage mirroring device of the controller on the opposite terminal performs backup and processing to the data required to copy. In the embodiment of the invention, the burden of operation of the CPU is low and the delay of data storage is low as well.
Description
Technical field
The present invention relates to technical field of memory, relate in particular to a kind of internal storage mirroring method, device and system.
Background technology
For optimization of system performance, memory controller is buffer memory (Cache) with the memory setting of a constant volume, accomplishes response with feeding back to main frame after data storage is in Cache, thereby is reducing the delay of host access.But internal memory is a volatile storage medium, and easy obliterated data when power down or memory controller break down can't guarantee to store the reliability of data when individual memory controller.
In order to address this problem, can comprise two or more controllers in the memory controller of prior art, can adopt the mirror image link connection that is used to transmit mirror image data between these controllers.When writing data among the Cache of this side controller in this memory controller; CPU (Central Processing Unit; Hereinafter to be referred as: CPU) can data be write the spatial cache among the Cache of this side controller; And then copy data to the Cache the pairing storage space of actual physical address from this buffer memory storage space; And CPU can control this side controller to connected to side controller application Cache space, and with copying data to the application the Cache space in, then side controller is copied data to actual physical address pairing storage space again from this Cache space and backs up.When the power down of this side controller or when breaking down, it is to also preserving data in the Cache of side controller, thereby can prevent loss of data.In the prior art, CPU needs to handle communication details in the process of control data mirror image, and the CPU operational load is bigger; And data need be carried out repeatedly copy function in writing this side controller and being mirrored to the process of side controller, thereby have increased the time delay of data storage.
Summary of the invention
The embodiment of the invention provides a kind of internal storage mirroring method, device and system.
The embodiment of the invention provides a kind of memory mirror treating apparatus, comprising:
The memory interface module is used for receiving data to be written through standard memory interface, and sends access request to the mirror image processing module;
Said mirror image processing module is used to receive the access request that said memory interface module is sent, and in said access request for visit during to the external request of side controller, with needing backed up data to send to communication interface modules in the said data to be written;
Said communication interface modules; Be used to receive the said backed up data that needs that said mirror image processing module is sent; The said backed up data that needs is sent to the memory mirror treating apparatus to side controller, so that said memory mirror treating apparatus to side controller carries out back-up processing to the said backed up data that needs.
The embodiment of the invention provides a kind of memory mirror disposal system, comprises interconnective at least two controllers, and each controller comprises CPU, memory mirror treating apparatus and as the physical memory of buffer memory, said memory mirror treating apparatus comprises:
The memory interface module is used under said central processing unit controls, receiving data to be written through standard memory interface, and sends access request to the mirror image processing module;
Said mirror image processing module is used to receive the access request that said memory interface module is sent, and in said access request for visit during to the external request of side controller, with needing backed up data to send to communication interface modules in the said data to be written;
Said communication interface modules; Be used to receive the said backed up data that needs that said mirror image processing module is sent; The said backed up data that needs is sent to the memory mirror treating apparatus to side controller, so that said memory mirror treating apparatus to side controller carries out back-up processing to the said backed up data that needs;
The internal memory control module; Be connected with said physical memory with said mirror image processing module; Be used to receive the data said to be written that said mirror image processing module is sent when said access request is the internal request of this side controller of visit, and said data to be written are write in the said physical memory.
The embodiment of the invention provides a kind of internal storage mirroring method, comprising:
The data to be written in the request command are write in standard memory interface reception through the memory interface module provides;
If the said request command of writing is the external request of visit to side controller; Then through communication interface modules with needing backed up data to send to memory mirror treating apparatus in the said data to be written, so that said memory mirror treating apparatus to side controller carries out back-up processing to the said backed up data that needs to side controller.
The embodiment of the invention; Because in the process that data to be written are stored; Employing can provide these hardware of memory interface module, communication interface modules and mirror image processing module of standard memory interface to realize; Therefore CPU only need carry out macro-control to the data mirrored procedure, and concrete communication interaction can be accomplished by these hardware, thereby has reduced the operation burden of CPU; And in the data image process, the mirror image processing module can be stored data in the physical memory of this side controller, also can be in to side controller Backup Data, thereby reduced the number of times that data to be written are copied, reduced the time delay of data storage.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art; To do one to the accompanying drawing of required use in embodiment or the description of the Prior Art below introduces simply; Obviously, the accompanying drawing in describing below is some embodiments of the present invention, for those of ordinary skills; Under the prerequisite of not paying creative work property, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the structural representation of an embodiment of memory mirror treating apparatus of the present invention;
Fig. 2 is the structural representation of another embodiment of memory mirror treating apparatus of the present invention;
Fig. 3 is the structural representation of an embodiment of memory mirror disposal system of the present invention;
Fig. 4 is the structural representation of another embodiment of memory mirror disposal system of the present invention;
Fig. 5 is the structural representation of another embodiment of memory mirror disposal system of the present invention;
Fig. 6 is the structural representation of another embodiment of memory mirror disposal system of the present invention;
Fig. 7 is the process flow diagram of an embodiment of internal storage mirroring method of the present invention;
Fig. 8 is the process flow diagram of another embodiment of internal storage mirroring method of the present invention.
Embodiment
For the purpose, technical scheme and the advantage that make the embodiment of the invention clearer; To combine the accompanying drawing in the embodiment of the invention below; Technical scheme in the embodiment of the invention is carried out clear, intactly description; Obviously, described embodiment is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills are not making the every other embodiment that is obtained under the creative work prerequisite, all belong to the scope of the present invention's protection.
Fig. 1 is the structural representation of an embodiment of memory mirror treating apparatus of the present invention; As shown in Figure 1; The device of present embodiment comprises: memory interface module 11, communication interface modules 13 and mirror image processing module 14; Wherein, memory interface module 11 is used for receiving data to be written through standard memory interface, and sends access request to the mirror image processing module; Mirror image processing module 14 is used to receive the access request that memory interface module 11 is sent, and in said access request for visit during to the external request of side controller, with needing backed up data to send to communication interface modules 13 in the said data to be written; Communication interface modules 13 is used to receive the said backed up data that needs that mirror image processing module 14 is sent; The said backed up data that needs is sent to the memory mirror treating apparatus to side controller, so that said memory mirror treating apparatus to side controller carries out back-up processing to the said backed up data that needs.
Particularly; Memory interface module 11 can provide standard memory interface; After the encapsulation through memory interface module 11, the bridge sector-meeting thinks that the memory mirror treating apparatus of present embodiment is exactly that (Double Date Rate is hereinafter to be referred as DDR) internal memory for the Double Data Rate of a standard.The steering logic of mirror image processing module 14 main processing mirror images; It receives memory interface module 11 and sends and next access request; Can judge that then this access request is the internal request of this side controller of visit or visits the external request to side controller; For access request is that visit is concerning the external request of side controller; This mirror image processing module 14 can will need need carry out in the data to be written backed up data through communication interface modules 13 and send to the memory mirror treating apparatus to side controller; Thereby make the memory mirror treating apparatus to side controller to carry out back-up processing to the needs backed up data, to the memory mirror treating apparatus of side controller can for present embodiment in the memory mirror treating apparatus identical.Needing backed up data can be whole data to be written, also can be the part in the data to be written.
The memory mirror treating apparatus of present embodiment can utilize hardware to realize the internal memory virtualization that controller is inner; Will be to the internal memory of side controller virtual be local internal memory; As far as CPU, internal memory after virtual and common internal memory have no difference, and the independent address space is arranged.To the data that wherein write, this memory mirror treating apparatus can back up data automatically through the memory mirror treating apparatus in another one or a plurality of controller for CPU.The memory mirror treating apparatus of present embodiment can be field programmable gate array (Field Programmable Gate Array; Hereinafter to be referred as: FPGA) or special IC (Application Specific Integrated Circuits, hereinafter to be referred as: ASIC).
The memory mirror treating apparatus of present embodiment can be fpga chip or asic chip, and is articulated on the data bus of inside computer system, and can connect the memory chip of main flow on this fpga chip or the asic chip.For the bridge sheet; This fpga chip or asic chip seem to be exactly the DDR internal memory of a standard; This fpga chip or asic chip can be intercepted and captured the DDR signal and resolve; In in the buffer memory that data is write this side controller, also can through the PCIE data channel with this data image in the buffer memory of another one or a plurality of controllers.Because this fpga chip or asic chip can be operated for whole memory ranges of the memory chip of its connection; Therefore; Need not be as prior art earlier with data storage memory headroom in the fixed range to the memory chip, again with dumping to the actual physical storage space behind the copying data.
The device of present embodiment; Because in the process that data to be written are stored; Employing can provide memory interface module and communication interface modules and these hardware realizations of mirror image processing module of standard memory interface; Therefore CPU only need carry out macro-control to the data mirrored procedure, and concrete communication interaction can be accomplished by these hardware, thereby has reduced the operation burden of CPU; And, in the data image process, the mirror image processing module can be in to side controller Backup Data, thereby reduced number of times in the data image process to needing backed up data to copy, reduced the time delay of data storage.
Fig. 2 is the structural representation of another embodiment of memory mirror treating apparatus of the present invention; As shown in Figure 2; The device of present embodiment further comprises on the basis of device shown in Figure 1: internal memory control module 12; This internal memory control module 12 and mirror image processing module 14 are connected with physical memory as buffer memory; This internal memory control module 12 is used to receive the data said to be written that mirror image processing module 14 is sent when said access request is the internal request of this side controller of visit, and said data to be written are write in the said physical memory.For the internal request of this side controller of visit, this mirror image processing module 14 can send the data to physical memory through internal memory control module 12, thereby band is write data storage in this side controller.
Further, this memory interface module 11 can be connected with data bus, and CPU can be connected with said data bus through north bridge.Therefore, the data to be written that the north bridge that memory interface module 11 can reception with data bus is connected with CPU sends.
Perhaps this memory interface module 11 can be connected with CPU.Therefore, memory interface module 11 can also directly receive the data to be written that CPU is sent.
The device of present embodiment; Because in the process that data to be written are stored; Employing can provide memory interface module and communication interface modules and these hardware realizations of mirror image processing module of standard memory interface; Therefore CPU only need carry out macro-control to the data mirrored procedure, and concrete communication interaction can be accomplished by these hardware, thereby has reduced the operation burden of CPU; And; In the data image process; The mirror image processing module can be stored data through the internal memory control module in the physical memory of this side controller; Also can be in to side controller Backup Data, thereby reduced number of times in the data image process to needing backed up data to copy, reduced the time delay of data storage.
Fig. 3 is the structural representation of an embodiment of memory mirror disposal system of the present invention; As shown in Figure 3, the system of present embodiment can comprise: interconnective at least two controllers 2, each controller comprise CPU 21, memory mirror treating apparatus 22 and as the physical memory 23 of buffer memory; Said memory mirror treating apparatus 22 can comprise: memory interface module 221, internal memory control module 222, communication interface modules 223 and mirror image processing module 224; Wherein, memory interface module 221 is used under CPU 21 controls; Receive data to be written through standard memory interface, and send access request to mirror image processing module 224; Mirror image processing module 224 is used to receive the access request that said memory interface module 221 is sent, and in said access request for visit during to the external request of side controller, with needing backed up data to send to communication interface modules 223 in the said data to be written; Communication interface modules 223 is used to receive the said backed up data that needs that mirror image processing module 224 is sent; The said backed up data that needs is sent to the memory mirror treating apparatus to side controller, so that said memory mirror treating apparatus to side controller carries out back-up processing to the said backed up data that needs; Internal memory control module 222 is connected with physical memory 23 with mirror image processing module 224; Internal memory control module 222 is used to receive the data said to be written that mirror image processing module 224 is sent when said access request is the internal request of this side controller of visit, and said data to be written are write in the said physical memory 23.
Particularly, the memory mirror disposal system of present embodiment can comprise two controllers 2, in each controller, includes: memory interface module 221, internal memory control module 222, communication interface modules 223 and mirror image processing module 224.The communication interface modules 223 of these two controllers can couple together through data channel, and two controllers can backup each other.In each controller, memory interface module 221 can provide standard memory interface, and after the encapsulation through memory interface module 221, the bridge sector-meeting thinks that memory mirror treating apparatus 22 is exactly the DDR internal memory of a standard; Internal memory control module 222 can provide external interface for this memory mirror treating apparatus 22, and outside physical memory 23 as buffer memory can be articulated on the memory mirror treating apparatus 22 through this internal memory control module 222.The steering logic of mirror image processing module 224 main processing mirror images.
For instance; The memory interface module 221 of the controller 2 on the left side can receive under the control of CPU 21 that CPU 21 or other unit send and the access request of coming among Fig. 3; Memory interface module 221 can be transmitted to mirror image processing module 224 with this access request then; Mirror image processing module 224 can judge that this access request is this side controller, and promptly the internal request of the controller 2 on the left side is still visited side controller among Fig. 3, and the external request of the controller 2 on the right is promptly arranged among Fig. 3; Internal request for this side controller of visit; This mirror image processing module 224 can send the data to the buffer memory of physical memory 23 through internal memory control module 222, and concerning the external request of side controller, this mirror image processing module 224 can send the data to the communication interface modules 223 to memory mirror treating apparatus 22 in the side controller through communication interface modules 223 for visit; Thereby make side controller is carried out back-up processing to these data; To the memory mirror treating apparatus in the side controller can for present embodiment in the memory mirror treating apparatus identical, its process that data are carried out back-up processing is also identical with said process, repeats no more.
The memory mirror treating apparatus 22 of present embodiment can utilize hardware to realize the internal memory virtualization that controller is inner; Will be to the internal memory of side controller virtual be local internal memory; Internal memory as far as CPU 21 after virtual and common internal memory have no difference, and the independent address space is arranged.To the data that wherein write, this memory mirror treating apparatus can back up data automatically through the memory mirror treating apparatus 22 in another one or a plurality of controller for CPU.The memory mirror treating apparatus 22 of present embodiment can be fpga chip or asic chip, and is articulated on the data bus of inside computer system, and can connect the memory chip of main flow on this fpga chip or the asic chip.For the bridge sheet; This fpga chip or asic chip seem to be exactly the DDR internal memory of a standard; This fpga chip or asic chip can be intercepted and captured the DDR signal and resolve; In in the buffer memory that data is write this side controller, also can through the PCIe data channel with this data image in the buffer memory of another one or a plurality of controllers.Because this fpga chip or asic chip can be operated for whole memory ranges of the memory chip of its connection; Therefore; Need not be as prior art earlier with data storage memory headroom in the fixed range to the memory chip, again with dumping to the actual physical storage space behind the copying data.
Need to prove; The system of present embodiment has gone out two situation that controller backs up each other; It will be understood by those skilled in the art that; In the time of need backing up each other between more than two controllers, can adopt technological means such as exchange chip that these controllers are coupled together, thereby realize interconnected between these controllers.For each controller, all can adopt the structure of foregoing description, repeat no more.
The system of present embodiment; Because in the process that data to be written are stored; Employing can provide the memory interface module of standard memory interface and these hardware of internal memory control module, communication interface modules and mirror image processing module to realize; Therefore CPU only need carry out macro-control to the data mirrored procedure, and concrete communication interaction can be accomplished by these hardware, thereby has reduced the operation burden of CPU; And in the data image process, the mirror image processing module can be stored data in the physical memory of this side controller, also can be in to side controller Backup Data, thereby reduced the number of times that data to be written are copied, reduced the time delay of data storage.
Fig. 4 is the structural representation of another embodiment of memory mirror disposal system of the present invention; As shown in Figure 4; The system of present embodiment is the basis with system shown in Figure 3; Further, memory interface module 221 is connected with data bus 24, and CPU 21 is connected with data bus 24 through north bridge 25.In addition, on this data bus 24, can also articulate more IO equipment.
The system of present embodiment is a kind of concrete implementation of system shown in Figure 3, and it realizes that principle is identical with the realization principle of system shown in Figure 3, repeats no more.
The system of present embodiment; Because in the process that data to be written are stored; Employing can provide the memory interface module of standard memory interface and these hardware of internal memory control module, communication interface modules and mirror image processing module to realize; Therefore CPU only need carry out macro-control to the data mirrored procedure, and concrete communication interaction can be accomplished by these hardware, thereby has reduced the operation burden of CPU; And in the data image process, the mirror image processing module can be stored data in the physical memory of this side controller, also can be in to side controller Backup Data, thereby reduced the number of times that data to be written are copied, reduced the time delay of data storage.
Fig. 5 is the structural representation of another embodiment of memory mirror disposal system of the present invention, and as shown in Figure 5, the system of present embodiment is the basis with system shown in Figure 3, and further, memory interface module 221 is connected with CPU 21.
In the system of present embodiment, memory mirror treating apparatus 22 also can directly be connected with the interface of CPU 21.The system of present embodiment is a kind of concrete implementation of system shown in Figure 3, and it realizes that principle is identical with the realization principle of system shown in Figure 3, repeats no more.
The system of present embodiment; Because in the process that data to be written are stored; Employing can provide the memory interface module of standard memory interface and these hardware of internal memory control module, communication interface modules and mirror image processing module to realize; Therefore CPU only need carry out macro-control to the data mirrored procedure, and concrete communication interaction can be accomplished by these hardware, thereby has reduced the operation burden of CPU; And in the data image process, the mirror image processing module can be stored data in the physical memory of this side controller, also can be in to side controller Backup Data, thereby reduced the number of times that data to be written are copied, reduced the time delay of data storage.
Fig. 6 is the structural representation of another embodiment of memory mirror disposal system of the present invention; As shown in Figure 6; The system of present embodiment can be based on the described system of arbitrary embodiment in Fig. 3～5; Further, if the quantity of said controller is at least three, then said controller is interconnected through exchange chip.
Fig. 6 shows four controllers 2 through the interconnected example of exchange chip 26, and wherein each controller all can adopt the structure of the described controller of arbitrary embodiment in Fig. 3～5 in four controllers 2.Its concrete realization principle is identical, repeats no more.
The system of present embodiment; Because in the process that data to be written are stored; Employing can provide the memory interface module of standard memory interface and these hardware of internal memory control module, communication interface modules and mirror image processing module to realize; Therefore CPU only need carry out macro-control to the data mirrored procedure, and concrete communication interaction can be accomplished by these hardware, thereby has reduced the operation burden of CPU; And in the data image process, the mirror image processing module can be stored data in the physical memory of this side controller, also can be in to side controller Backup Data, thereby reduced the number of times that data to be written are copied, reduced the time delay of data storage.
Fig. 7 is the process flow diagram of an embodiment of internal storage mirroring method of the present invention, and as shown in Figure 7, the method for present embodiment can comprise:
In the present embodiment, the memory interface module can provide standard memory interface, and after the encapsulation through the memory interface module, the bridge sector-meeting thinks that the memory mirror treating apparatus of present embodiment is exactly the DDR internal memory of a standard; The internal memory control module can provide external interface for this device, and outside physical memory as buffer memory can be articulated on the device of present embodiment through this internal memory control module.The steering logic of mirror image processing module main processing mirror image.
The memory interface module of this side controller can under the control of CPU, receive CPU or other unit sends and next access request; The memory interface module can be transmitted to the mirror image processing module with this access request then; The mirror image processing module can judge that this access request is the internal request of this side controller or visits the external request to side controller; For visiting concerning the external request of side controller; This mirror image processing module can send the data to the communication interface modules to memory mirror treating apparatus in the side controller through communication interface modules, thereby makes side controller is carried out back-up processing to these data, to the memory mirror treating apparatus in the side controller can for present embodiment in the memory mirror treating apparatus identical; Its process that data are carried out back-up processing is also identical with said process, repeats no more.Need to prove, the quantity of side controller is not limited to one, can have as required any amount to side controller.
The method of present embodiment can utilize hardware to realize the internal memory virtualization that controller is inner, will be virtual to the internal memory of side controller be the internal memory of this locality, internal memory as far as CPU after virtual and common internal memory have no difference, and the independent address space is arranged.To the data that wherein write, this memory mirror treating apparatus can back up data automatically through the memory mirror treating apparatus in another one or a plurality of controller for CPU.
The method of present embodiment can adopt apparatus processes shown in Figure 1; This memory mirror treating apparatus can be fpga chip or asic chip; And be articulated on the data bus of inside computer system, and can connect the memory chip of main flow on this fpga chip or the asic chip.For the bridge sheet; This fpga chip or asic chip seem to be exactly the DDR internal memory of a standard; This fpga chip or asic chip can be intercepted and captured the DDR signal and resolve; In in the buffer memory that data is write this side controller, also can through the PCIe data channel with this data image in the buffer memory of another one or a plurality of controllers.Because this fpga chip or asic chip can be operated for whole memory ranges of the memory chip of its connection; Therefore; Need not be as prior art earlier with data storage memory headroom in the fixed range to the memory chip, again with dumping to the actual physical storage space behind the copying data.
The method of present embodiment; Because in the process that data to be written are stored; Employing can provide the memory interface module of standard memory interface and these hardware of internal memory control module, communication interface modules and mirror image processing module to realize; Therefore CPU only need carry out macro-control to the data mirrored procedure, and concrete communication interaction can be accomplished by these hardware, thereby has reduced the operation burden of CPU; And, in the data image process, the mirror image processing module can be in to side controller Backup Data, thereby reduced the number of times that data to be written are copied, reduced the time delay of data storage.
Fig. 8 is the process flow diagram of another embodiment of internal storage mirroring method of the present invention, and as shown in Figure 8, the method for present embodiment further can comprise on the basis of method shown in Figure 7:
For the internal request of this side controller of visit, the mirror image processing module can send the data to physical memory through the internal memory control module.
Need to prove not have sequencing between the step 602 of present embodiment and the step 603.
In another embodiment of internal storage mirroring method of the present invention, above-mentioned steps 601 can comprise: the data to be written that the north bridge that is connected with CPU through reception of said memory interface module and data bus sends.
The method of present embodiment is the concrete realization of of the method shown in Fig. 7 or 8, and this method can realize through system shown in Figure 4, repeat no more.
In another embodiment of internal storage mirroring method of the present invention, above-mentioned steps 601 can comprise: receive the data to be written that CPU is sent through said memory interface module.
The method of present embodiment is the concrete realization of of the method shown in Fig. 7 or 8, and this method can realize through system shown in Figure 5, repeat no more.
The method of the above embodiment of the present invention; Because in the process that data to be written are stored; Employing can provide the memory interface module of standard memory interface and these hardware of internal memory control module, communication interface modules and mirror image processing module to realize; Therefore CPU only need carry out macro-control to the data mirrored procedure, and concrete communication interaction can be accomplished by these hardware, thereby has reduced the operation burden of CPU; And in the data image process, the mirror image processing module can be stored data in the physical memory of this side controller, also can be in to side controller Backup Data, thereby reduced the number of times that data to be written are copied, reduced the time delay of data storage.
One of ordinary skill in the art will appreciate that: all or part of step that realizes said method embodiment can be accomplished through the relevant hardware of programmed instruction; Aforesaid program can be stored in the computer read/write memory medium; This program the step that comprises said method embodiment when carrying out; And aforesaid storage medium comprises: various media that can be program code stored such as ROM, RAM, magnetic disc or CD.
What should explain at last is: above embodiment is only in order to explaining technical scheme of the present invention, but not to its restriction; Although with reference to previous embodiment the present invention has been carried out detailed explanation, those of ordinary skill in the art is to be understood that: it still can be made amendment to the technical scheme that aforementioned each embodiment put down in writing, and perhaps part technical characterictic wherein is equal to replacement; And these are revised or replacement, do not make the spirit and the scope of the essence disengaging various embodiments of the present invention technical scheme of relevant art scheme.
Claims (10)
1. a memory mirror treating apparatus is characterized in that, comprising:
The memory interface module is used for receiving data to be written through standard memory interface, and sends access request to the mirror image processing module;
Said mirror image processing module is used to receive the access request that said memory interface module is sent, and in said access request for visit during to the external request of side controller, with needing backed up data to send to communication interface modules in the said data to be written;
Said communication interface modules; Be used to receive the said backed up data that needs that said mirror image processing module is sent; The said backed up data that needs is sent to the memory mirror treating apparatus to side controller, so that said memory mirror treating apparatus to side controller carries out back-up processing to the said backed up data that needs.
2. memory mirror treating apparatus according to claim 1 is characterized in that, also comprises:
The internal memory control module is connected with physical memory as buffer memory with said mirror image processing module;
Said mirror image processing module also is used for when said access request is the internal request of this side controller of visit, said data to be written being sent to said internal memory control module;
Said internal memory control module is used to receive the data to be written that said mirror image processing module is sent when said access request is the internal request of this side controller of visit, and said data to be written is write in the said physical memory.
3. memory mirror treating apparatus according to claim 1 and 2 is characterized in that, said memory interface module is connected with data bus.
4. memory mirror treating apparatus according to claim 1 and 2 is characterized in that, said memory interface module is connected with CPU.
5. a memory mirror disposal system is characterized in that, comprises interconnective at least two controllers, and said controller comprises CPU, memory mirror treating apparatus and as the physical memory of buffer memory, said memory mirror treating apparatus comprises:
The memory interface module is used under said central processing unit controls, receiving data to be written through standard memory interface, and sends access request to the mirror image processing module;
Said mirror image processing module is used to receive the access request that said memory interface module is sent, and in said access request for visit during to the external request of side controller, with needing backed up data to send to communication interface modules in the said data to be written;
Said communication interface modules; Be used to receive the said backed up data that needs that said mirror image processing module is sent; The said backed up data that needs is sent to the memory mirror treating apparatus to side controller, so that said memory mirror treating apparatus to side controller carries out back-up processing to the said backed up data that needs;
The internal memory control module; Be connected with said physical memory with said mirror image processing module; Be used to receive the data said to be written that said mirror image processing module is sent when said access request is the internal request of this side controller of visit, and said data to be written are write in the said physical memory.
6. memory mirror disposal system according to claim 5 is characterized in that, if the quantity of said controller is at least three, then said controller is interconnected through exchange chip.
7. an application rights requires the method that each described memory mirror treating apparatus carries out the memory mirror processing in 1～4, it is characterized in that, comprising:
The data to be written in the request command are write in standard memory interface reception through the memory interface module provides;
Said memory interface module sends to the mirror image processing module with access request;
Said mirror image processing module is if judge that the said request command of writing is the external request of visit to side controller; Then through communication interface modules with needing backed up data to send to memory mirror treating apparatus in the said data to be written, so that said memory mirror treating apparatus to side controller carries out back-up processing to the said backed up data that needs to side controller.
8. internal storage mirroring method according to claim 7 is characterized in that, also comprises:
If the said request command of writing is the internal request of visiting this side controller, then said data to be written are sent to physical memory through the internal memory control module.
9. according to claim 7 or 8 described internal storage mirroring methods, it is characterized in that the said standard memory interface that provides through the memory interface module receives writes the data to be written in the request command, comprising:
The data to be written that the north bridge that is connected with CPU through reception of said memory interface module and data bus sends.
10. according to claim 7 or 8 described internal storage mirroring methods, it is characterized in that the said standard memory interface that provides through the memory interface module receives writes the data to be written in the request command, comprising:
Receive the data to be written that CPU is sent through said memory interface module.
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| Application Number | Priority Date | Filing Date | Title |
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| CN2009102256755A CN101876925B (en) | 2009-11-27 | 2009-11-27 | Internal storage mirroring method, device and system |
| PCT/CN2010/078956 WO2011063730A1 (en) | 2009-11-27 | 2010-11-22 | Method, device and system for memory mirror processing |
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| CN2009102256755A CN101876925B (en) | 2009-11-27 | 2009-11-27 | Internal storage mirroring method, device and system |
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| CN102945288B (en) * | 2012-11-29 | 2016-01-20 | 重庆邮电大学 | A kind of text data file from physical memory image extracting method |
| CN103152394B (en) | 2013-02-06 | 2016-09-28 | 华为技术有限公司 | Data access arrangement, internal memory share equipment and method for reading data |
| CA2923884A1 (en) | 2013-09-12 | 2015-03-19 | Pfizer Inc. | Use of acetyl-coa carboxylase inhibitors for treating acne vulgaris |
| CN103645996B (en) * | 2013-12-09 | 2016-07-06 | 龙芯中科技术有限公司 | The method of memory copying, device and SOC(system on a chip) |
| CN104102881B (en) * | 2014-07-07 | 2017-01-04 | 杭州电子科技大学 | A kind of internal memory evidence collecting method based on kernel objects linking relationship |
| CN104778098A (en) * | 2015-04-09 | 2015-07-15 | 浪潮电子信息产业股份有限公司 | Memory mirroring method and system and memory monitor |
| CN105843711A (en) * | 2016-06-21 | 2016-08-10 | 北京飞杰信息技术有限公司 | Data powder-failure protection method and system |
| CN106302243B (en) * | 2016-09-23 | 2019-11-12 | 新华三技术有限公司 | A kind of message transmitting method, CPU and the network equipment |
| CN108664362B (en) * | 2017-03-31 | 2021-06-15 | 龙芯中科技术股份有限公司 | Memory mirror image processing method, memory controller and user equipment |
| CN107579936A (en) * | 2017-09-11 | 2018-01-12 | 北京腾凌科技有限公司 | Message transmitting method, controller and storage system |
| CN109343986B (en) * | 2018-08-17 | 2020-12-22 | 华为技术有限公司 | Method and computer system for processing memory failure |
| CN109254879A (en) * | 2018-09-27 | 2019-01-22 | 南方电网科学研究院有限责任公司 | Data processing method, system, device and readable storage medium |
| CN109639505B (en) * | 2019-01-07 | 2021-08-27 | 南京南瑞继保电气有限公司 | Substation process layer network equipment and mirror image function implementation method thereof |
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| CN101458655A (en) * | 2007-12-12 | 2009-06-17 | 华为技术有限公司 | Internal memory management method, system and internal memory control device |
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