CN106302243B - A kind of message transmitting method, CPU and the network equipment - Google Patents
A kind of message transmitting method, CPU and the network equipment Download PDFInfo
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- CN106302243B CN106302243B CN201610846852.1A CN201610846852A CN106302243B CN 106302243 B CN106302243 B CN 106302243B CN 201610846852 A CN201610846852 A CN 201610846852A CN 106302243 B CN106302243 B CN 106302243B
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/90—Buffering arrangements
- H04L49/9021—Plurality of buffers per packet
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L49/00—Packet switching elements
- H04L49/20—Support for services
- H04L49/208—Port mirroring
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Abstract
The application provides a kind of message transmitting method, CPU and the network equipment, this method comprises: receiving network controller receives network message, memory mirror controller stores the network message to the corresponding first buffering area of local terminal CPU, and the write operation of the network message is sent to opposite end CPU, so that the opposite end CPU stores the network message；When memory mirror controller receives the write operation of the network message of opposite end CPU, by network message storage to the corresponding second buffering area of local terminal CPU；When memory mirror controller receives the read operation of network message, the network message is read from the corresponding second buffering area of local terminal CPU and is sent.By the technical solution of the application, the forwarding performance of network message is higher, shortens the transmission time of network message, improves the forward efficiency of network message.
Description
Technical field
This application involves the communications field more particularly to a kind of message transmitting methods, CPU and the network equipment.
Background technique
The network equipment (such as router, interchanger) is with CPU (Central Processing Unit, central processing
Device) it is core, the processing and forwarding of network message are carried out, as shown in Figure 1, the structural schematic diagram of the CPU for the network equipment.In
CPU has been internally integrated CPU core, Memory Controller Hub, network controller 1 and network controller 2.Network controller 1 is receiving net
After network message, by Memory Controller Hub, network message is written in the Buffer (buffer area) of Installed System Memory.CPU core from
Network message is obtained in Buffer, and is modified to network message and (such as modified source IP address, the purpose IP address of network message
Deng), and by the storage of modified network message into the Buffer of Installed System Memory, to replace the network message before modification.Network
Controller 2 gets modified network message from Buffer, and completes the transmission of network message.
In order to improve the processing capacity of the network equipment, multiple CPU cores can be integrated in CPU, as shown in Fig. 2, being integrated
The structural schematic diagram of multiple CPU cores.But due to manufacturing process etc., the limited amount of the CPU core integrated in CPU is
The processing capacity for further increasing the network equipment, in network device internal can dispose multiple CPU, lead between this multiple CPU
It crosses bus to connect, as shown in figure 3, can integrate in each CPU multiple for the structural schematic diagram of two CPU interconnection
CPU core.
As shown in figure 3, network controller 1 is written to Installed System Memory 1 after receiving network message, by network message
In Buffer1.Assuming that being network controlled device 2 sends the network message, then network controller 2 can by Memory Controller Hub, from
The network message is got in Buffer1, the forwarding performance of network message is higher.
But if being network controlled device 4 sends the network message, network controller 4 is needed by two mutual joint controls
Device processed and a Memory Controller Hub can get the network message, and the interaction between interconnection controller from Buffer1
It is a very time-consuming operation, therefore, the forwarding performance of network message is poor.
Summary of the invention
The application provides a kind of message transmitting method, and applied on the central processor CPU of the network equipment, the network is set
Standby includes at least two CPU, the corresponding Installed System Memory of each CPU, and first divided in Installed System Memory including the promising CPU
Buffer area and second buffering area；The described method includes:
It receives network controller and receives network message, memory mirror controller stores the network message to local terminal CPU
Corresponding first buffering area, and the write operation of the network message is sent to opposite end CPU, so that the opposite end CPU stores the network
Message；
When memory mirror controller receives the write operation of the network message of opposite end CPU, by network message storage to originally
Hold the corresponding second buffering area of CPU；
When memory mirror controller receives the read operation of network message, read from the corresponding second buffering area of local terminal CPU
The network message is simultaneously sent, which is the network message that the reception network controller of opposite end CPU receives；
The opposite end CPU is any CPU in addition to local terminal CPU.
The application provides a kind of central processor CPU, the CPU correspondence system memory, includes in the Installed System Memory
The first buffering area and second buffering area divided for the CPU；The CPU includes:
Network controller is received, for receiving network message；
Memory mirror controller, for being stored the network message to local terminal CPU corresponding first by Memory Controller Hub
Buffer area, and the write operation of the network message is sent by interconnection controller to opposite end CPU, so that opposite end CPU storage should
Network message；When receiving the write operation of the network message of opposite end CPU by interconnection controller, by Memory Controller Hub by the net
Network packet storage is to the corresponding second buffering area of local terminal CPU；When receiving the read operation of network message, by Memory Controller Hub from
The corresponding second buffering area of local terminal CPU reads the network message and sends, which is the reception network-control of opposite end CPU
The network message that device receives；
The opposite end CPU is any CPU in addition to local terminal CPU.
The application provides a kind of network equipment, including at least two above-mentioned central processor CPUs.
It based on the above-mentioned technical proposal,, can be corresponding from local terminal CPU when CPU sends network message in the embodiment of the present application
Second buffering area in obtain network message, and do not have to obtain network message out of opposite end CPU corresponding first buffering area, because
This, network message does not need across CPU transmission, needs not move through two interconnection controllers, can complete network in a CPU
The forwarding performance of the transmission of message, network message is higher, shortens the transmission time of network message, improves turning for network message
Send out efficiency.
Detailed description of the invention
It, below will be to the application in order to clearly illustrate the embodiment of the present application or technical solution in the prior art
Embodiment or attached drawing needed to be used in the description of the prior art be briefly described, it should be apparent that, it is described below
Attached drawing is only that some embodiments as described in this application for those of ordinary skill in the art can also be according to these
Attached drawing obtains other attached drawings.
Fig. 1 is the structural schematic diagram of the CPU of the network equipment；
Fig. 2 is the structural schematic diagram for integrating multiple CPU cores；
Fig. 3 is the structural schematic diagram of two CPU interconnection；
Fig. 4 and Fig. 5 is the application scenarios schematic diagram in a kind of embodiment of the application；
Fig. 6 is the flow chart of the message transmitting method in a kind of embodiment of the application.
Specific embodiment
In term used in this application merely for the sake of for the purpose of describing particular embodiments, rather than limit the application.This Shen
Please it is also intended to the "an" of singular used in claims, " described " and "the" including most forms, unless
Context clearly shows that other meanings.It is also understood that term "and/or" used herein refers to comprising one or more
Associated any or all of project listed may combine.
It will be appreciated that though various information, but this may be described using term first, second, third, etc. in the application
A little information should not necessarily be limited by these terms.These terms are only used to for same type of information being distinguished from each other out.For example, not departing from
In the case where the application range, the first information can also be referred to as the second information, and similarly, the second information can also be referred to as
One information.Depending on context, in addition, used word " if " can be construed to " ... when " or " when ... "
Or " in response to determination ".
It is proposed a kind of message transmitting method in the embodiment of the present application, this method can be applied to the network equipment (such as router,
Interchanger etc.) CPU on, and the network equipment may include at least two CPU.Wherein, each CPU may each be based on SOC
The CPU of (System on Chip, system level chip).
It may include at least one CPU core, a Memory Controller Hub, at least two network controllers in each CPU
(it is used to receive the network controller of network message including at least one, for the convenience of description, subsequent be known as receiving network-control
Device；At least one is used to send the network controller of network message, for the convenience of description, subsequent be known as sending network controller),
One memory mirror controller, an interconnection controller.
In one example, using Fig. 4 as the application scenarios schematic diagram of the embodiment of the present application, with the network equipment include CPU1 and
It is illustrated for CPU2, CPU1 and CPU2 are connected by bus, and in practical application, the quantity of CPU can also be more.With
Comprising being illustrated for a CPU core in each CPU, in practical application, the quantity of CPU core can also be more.With each CPU
It inside include to be illustrated for two network controllers, in practical application, the quantity of network controller can also be more.In CPU1
Interior, network controller 1 is to receive network controller, for receiving network message；Network controller 2 is to send network controller,
For sending network message.In CPU2, network controller 3 is to receive network controller, for receiving network message；Network control
Device 4 processed is to send network controller, for sending network message.
In one example, as shown in figure 4, memory mirror controller can be configured in CPU, the memory mirror controller
It is the hardware device for executing memory mirror function.In the follow-up process, the interior of the memory mirror controller can be discussed in detail
Deposit image feature.Wherein, which can be an independent controller, realize memory mirror function.It can also
With the memory mirror function distributing of memory mirror controller on existing controller, is such as deployed in Memory Controller Hub or mutually
On controller, memory mirror function is realized on existing controller.For the convenience of description, being with an independent controller
Example is illustrated.
In one example, as shown in figure 5, inside CPU, each CPU core, each network controller in CPU and this is interior
Depositing mirror controller can be articulated in CPU piece on high-speed bus.In addition, memory mirror controller can connect with Memory Controller Hub
It connects, and memory mirror controller can be connect with interconnection controller.The Memory Controller Hub is connected to Installed System Memory, the intarconnected cotrol
Device connects the interconnection controller of another CPU.
In one example, the corresponding Installed System Memory of each CPU, and include that the promising CPU is divided in the Installed System Memory
First buffering area and second buffering area.Wherein, the corresponding Installed System Memory of different CPU is different, for example, in CPU1 correspondence system
1, CPU2 correspondence system memory 2 is deposited, it is independent that Installed System Memory 1 and Installed System Memory 2, which are not same system memories,.Cause
This, the corresponding first buffering area of each CPU and second buffering area, first buffering area corresponding with other CPU and second buffering area
Also it is different.
For the process for dividing first buffering area and second buffering area for the CPU, memory mirror controller can be at this
First buffering area is marked off in the associated Installed System Memory of CPU of end, obtains the address range of the first buffering area of opposite end CPU, and is pressed
According to address range, second buffering area is marked off in the associated Installed System Memory of local terminal CPU, wherein local terminal CPU corresponding first delays
Area is rushed for storing the network message that local terminal CPU is received, the corresponding second buffering area of local terminal CPU is for storing opposite end CPU mirror
Network message as arriving local terminal CPU.Address based on this, for each CPU, in the corresponding first buffering area of local terminal CPU
There are mapping relations for address in second buffering area corresponding with any CPU in addition to local terminal CPU.
For example, if there is no the addresses of overlapping in the Installed System Memory of CPU1 and CPU2, it is assumed that the Installed System Memory 1 of CPU1 is
The Installed System Memory 2 of 0x0-0x3FFFFFFF, CPU2 are 0x40000000-0x7FFFFFFF.
The memory mirror controller of CPU1 marks off first buffering area in Installed System Memory 1, the address of the first buffering area
For 0x30000000-0x3FFFFFFF, and address range (such as address 0x30000000 and address 0x3FFFFFFF) is sent to
CPU2.The memory mirror controller of CPU2 marks off second buffering area in Installed System Memory 2 according to the address range, the CPU2
Second buffering area be used to store the mirror image of network message in the first buffering area of CPU1, it is assumed that the address of second buffering area is
0x70000000-0x7FFFFFFF, then, it is believed that the second of the address 0x30000000 and CPU2 of the first buffering area of CPU1
The address 0x70000000 of buffer area has a mapping relations, and the of the address 0x30000001 and CPU2 of the first buffering area of CPU1
The address 0x70000001 of two buffer areas has mapping relations, and so on, the address of the first buffering area of CPU1
The address 0x7FFFFFFF of the second buffering area of 0x3FFFFFFF and CPU2 has mapping relations.
The memory mirror controller of CPU2 marks off first buffering area in Installed System Memory 2, the address of the first buffering area
For 0x40000000-0x4FFFFFFF, and address range (such as address 0x40000000 and address 0x4FFFFFFF) is sent to
CPU1.The memory mirror controller of CPU1 marks off second buffering area in Installed System Memory 1 according to the address range, the CPU1
Second buffering area be used to store the mirror image of network message in the first buffering area of CPU2, it is assumed that the address of second buffering area is
0x10000000-0x1FFFFFFF, then, it is believed that the second of the address 0x40000000 and CPU1 of the first buffering area of CPU2
The address 0x10000000 of buffer area has a mapping relations, and the of the address 0x40000001 and CPU1 of the first buffering area of CPU2
The address 0x10000001 of two buffer areas has mapping relations, and so on, the address of the first buffering area of CPU2
The address 0x1FFFFFFF of the second buffering area of 0x4FFFFFFF and CPU1 has mapping relations.
In another example if there is the address of overlapping in the Installed System Memory of CPU1 and CPU2, it is assumed that the Installed System Memory 1 of CPU1 is
The Installed System Memory 2 of 0x0-0x5FFFFFFF, CPU2 are 0x40000000-0x9FFFFFFF.The address range of the two overlapping are as follows:
0x40000000-0x5FFFFFFF.Although there is the address of overlapping in the Installed System Memory of CPU1 and CPU2, due to CPU1's
Installed System Memory is different from the Installed System Memory of CPU2, therefore the address being overlapped is not in same Installed System Memory, but two
Identical address range is configured in block difference Installed System Memory.
The memory mirror controller of CPU1 marks off first buffering area in Installed System Memory 1, and address range is included in upper
The address range of overlapping is stated, for example, the address of the first buffering area of CPU1 is 0x40000000-0x4FFFFFFF, and by address
Range (such as address 0x40000000 and address 0x4FFFFFFF) is sent to CPU2.The memory mirror controller of CPU2 is according to the ground
Location range marks off second buffering area in Installed System Memory 2, and the second buffering area of the CPU2 is used to store the first buffering of CPU1
The mirror image of network message in area, for example, the address of the second buffering area of CPU1 can be 0x40000000-0x4FFFFFFF.Then,
It is considered that the address 0x40000000 tool of the second buffering area of the address 0x40000000 and CPU2 of the first buffering area of CPU1
There are mapping relations, the address 0x40000001 of the second buffering area of the address 0x40000001 and CPU2 of the first buffering area of CPU1
With mapping relations, and so on, the ground of the second buffering area of the address 0x4FFFFFFF and CPU2 of the first buffering area of CPU1
Location 0x4FFFFFFF has mapping relations.
The memory mirror controller of CPU2 marks off first buffering area in Installed System Memory 2, and address range is included in upper
The address range of overlapping is stated, for example, the address of the first buffering area of CPU2 is 0x50000000-0x5FFFFFFF, and by address
Range (such as address 0x50000000 and address 0x5FFFFFFF) is sent to CPU1.The memory mirror controller of CPU1 is according to the ground
Location range marks off second buffering area in Installed System Memory 1, and the second buffering area of the CPU1 is used to store the first buffering of CPU2
The mirror image of network message in area, for example, the address of the second buffering area of CPU1 can be 0x50000000-0x5FFFFFFF.Then,
It is considered that the address 0x50000000 tool of the second buffering area of the address 0x50000000 and CPU1 of the first buffering area of CPU2
There are mapping relations, the address 0x50000001 of the second buffering area of the address 0x50000001 and CPU1 of the first buffering area of CPU2
With mapping relations, and so on, the ground of the second buffering area of the address 0x5FFFFFFF and CPU1 of the first buffering area of CPU2
Location 0x5FFFFFFF has mapping relations.
After by above-mentioned processing, for each address in the first buffering area of CPU1, in the second buffering of CPU2
A unique address can be mapped in area.In addition, for each address in the first buffering area of CPU2, the of CPU1
A unique address can be mapped in two buffer areas.
In one example, can also remember in the memory mirror controller of CPU1 and the memory mirror controller of CPU2
Record following content: the mapping relations of the address of the second buffering area of the address and CPU2 of the first buffering area of CPU1, the of CPU1
The mapping relations of the address of the first buffering area of the address and CPU2 of two buffer areas.By taking the above-mentioned address that there is overlapping as an example, note
The mapping for recording the address 0x40000000 of the second buffering area of the address 0x40000000 and CPU2 of the first buffering area of CPU1 is closed
System, and so on, record the address of the second buffering area of the address 0x4FFFFFFF and CPU2 of the first buffering area of CPU1
The mapping relations of 0x4FFFFFFF.In addition, the first of the address 0x50000000 and CPU2 of the second buffering area of record CPU1 is slow
The mapping relations of the address 0x50000000 in area are rushed, and so on, record the address 0x5FFFFFFF of the second buffering area of CPU1
With the mapping relations of the address 0x5FFFFFFF of the first buffering area of CPU2.
It is shown in Figure 6 under above-mentioned application scenarios, it is the flow chart of message transmitting method.
Step 601, it receives network controller and receives network message, memory mirror controller arrives the network message storage
The corresponding first buffering area of local terminal CPU, and the write operation of the network message is sent to opposite end CPU, so that opposite end CPU stores the net
Network message.
Step 602, when memory mirror controller receives the write operation of the network message of opposite end CPU, by the network message
Store the corresponding second buffering area of local terminal CPU.
Step 603, when memory mirror controller receives the read operation of network message, delay from local terminal CPU corresponding second
It rushes area to read the network message and send, which is the network message that the reception network controller of opposite end CPU receives.
For step 601- step 603, opposite end CPU is any CPU in addition to local terminal CPU.
For step 601, in one example, the network message is stored to local terminal CPU for memory mirror controller
Corresponding first buffering area, and the process of the write operation of the network message is sent to opposite end CPU, it may include: memory mirror control
Device processed receives the write operation of the network message of reception network controller transmission, and parsing subaddress information from the write operation is
Address in the corresponding first buffering area of local terminal CPU then stores the network message to the corresponding first buffering area of local terminal CPU；
Subaddress information in the write operation is replaced with into the address in the corresponding second buffering area of opposite end CPU, and is write modified
Operation is sent to opposite end CPU.
For step 602, in one example, buffered for by network message storage to local terminal CPU corresponding second
The process in area, it is that local terminal CPU corresponding second delays that memory mirror controller parses subaddress information from received write operation
The address in area is rushed, then can be stored the network message to the corresponding second buffering area of local terminal CPU.
In one example, the network message that CPU core can also be read in the corresponding first buffering area of local terminal CPU is repaired
Change, and sends the write operation of modified network message to memory mirror controller.Memory mirror controller is from the write operation
Parsing subaddress information is the address in the corresponding first buffering area of local terminal CPU, then arrives modified network message storage
The corresponding first buffering area of local terminal CPU；Memory mirror controller sends the write operation of modified network message to opposite end CPU,
So that opposite end CPU stores modified network message, the subaddress information which carries is that opposite end CPU corresponding second delays
Rush the address in area.
In one example, the network message that CPU core can also be read in the corresponding second buffering area of local terminal CPU is repaired
Change, and sends the write operation of modified network message to memory mirror controller.Memory mirror controller is from the write operation
Parsing subaddress information is the address in the corresponding second buffering area of local terminal CPU, then arrives modified network message storage
The corresponding second buffering area of local terminal CPU；Memory mirror controller is determined according to the address in the corresponding second buffering area of local terminal CPU
The subaddress information of the write operation of modified network message is replaced with determined by the address of corresponding first buffering area
The address of one buffer area, and it is sent to the corresponding CPU of the first buffering area determined, so that the CPU stores the modified net
Network message.Wherein, the CPU herein is the CPU that the network message is received by receiving network controller.
For example, then the CPU just refers to another CPU except local terminal CPU when only existing two CPU.
When there are at least three CPU, it is assumed that local terminal CPU is CPU1, and is received by the reception network controller of CPU2
The network message, and store first buffering area, the second buffering area of CPU1, the second buffering area of CPU3 for arriving CPU2, then herein
The CPU be CPU2.Based on this, the memory mirror controller of CPU1 sends the write operation of modified network message to CPU2
(carrying the address in the corresponding first buffering area of CPU2) stores modified network report in the first buffering area of itself by CPU2
Text, moreover, the write operation of modified network message (can also be carried the ground in the corresponding second buffering area of CPU3 by CPU2
Location) it is sent to CPU3, modified network message is stored in the second buffering area of itself by CPU3.
For step 603, in one example, the network message is read for from the corresponding second buffering area of local terminal CPU
And the process sent, it may include: that memory mirror controller parses subaddress information from the read operation as opposite end CPU correspondence
First buffering area in address, determine the address in the corresponding second buffering area of corresponding local terminal CPU, it is corresponding from local terminal CPU
Second buffering area read the network message, pass through send network controller send；Wherein, which is that opposite end CPU is determined
It is issued when sending the network message by the transmission network controller of local terminal CPU.Alternatively, memory mirror controller is from the read operation
In parse subaddress information be the corresponding second buffering area of local terminal CPU in address, from the corresponding second buffering area of local terminal CPU
The network message is read, is sent by sending network controller；Wherein, which is that the CPU core of local terminal CPU is determined by local terminal
The transmission network controller of CPU is sent to be issued when the network message.
In above process, each subaddress information may each comprise an address in buffer area and an address is long
Degree, such as the address 0x40000000 and address size 10 in buffer area, this subaddress information indicates that network message is stored in buffering
The position between the 0x40000009 of the address address 0x40000000- in area.
It based on the above-mentioned technical proposal,, can be corresponding from local terminal CPU when CPU sends network message in the embodiment of the present application
Second buffering area in obtain network message, and do not have to obtain network message out of opposite end CPU corresponding first buffering area, because
This, network message does not need across CPU transmission, needs not move through two interconnection controllers, can complete network in a CPU
The forwarding performance of the transmission of message, network message is higher, shortens the transmission time of network message, improves turning for network message
Send out efficiency.
In one example, network message is received with network controller 1, for network controller 4 sends network message,
Then be related to following process: network controller 1 receives network message (subsequent to be referred to as network message 1), the CPU core pair of CPU1
Network message 1 is modified (such as source IP address of modification network message 1, purpose IP address), and modified network report is obtained
The CPU core notice network controller 4 of literary (subsequent to be referred to as network message 2), CPU1 sends network message 2, network controller 4
Send network message 2.Alternatively, network controller 1 receives network message 1, the CPU core of CPU2 modifies to network message 1,
Modified network message 2 is obtained, the CPU core notice network controller 4 of CPU2 sends network message 2, and network controller 4 is sent
Network message 2.The processing of above-mentioned two situations is described in detail below.
Situation one, CPU1 CPU core modify to network message 1, the CPU core of CPU1 notice network controller 4 is sent
Network message 2.
Step 1, network controller 1 receive network message 1, and send write operation to the memory mirror controller of CPU1,
Wherein, which can carry network message 1 and subaddress information, and the subaddress information can be the first buffering of CPU1
The address 0x40000000 and address size 10 in area.
Step 2, memory mirror controller parse address 0x40000000 and address size 10 from write operation, and utilize
Network message 1 is stored the first buffering area of CPU1 by address 0x40000000 and address size 10.For example, memory mirror controls
Device can store network message 1 since the address 0x40000000 of the first buffering area of CPU1, the length is 10, therefore net
The tail address of network message 1 is 0x40000009.
In one example, memory mirror controller can be arrived the storage of network message 1 by the Memory Controller Hub of CPU1
The first buffering area of CPU1.For example, the write operation for carrying network message 1 and subaddress information is sent to by memory mirror controller
Network message 1 is stored the first buffering area of CPU1 by Memory Controller Hub by the Memory Controller Hub of CPU1, to this storing process,
It is repeated no more in the embodiment of the present application.
Step 3, based on the address in the address second buffering area corresponding with CPU2 in the corresponding first buffering area of CPU1
Mapping relations, memory mirror controller determines and above-mentioned subaddress information (such as address from the second buffering area of CPU2
0x40000000 and address size 10) corresponding subaddress information (the second buffering that the subaddress information determined is CPU2
Subaddress information in area), such as determine address 0x40000000 and address size 10, and utilize the subaddress information determined
Network message 1 is stored to the second buffering area of CPU2.For example, can be from the address 0x40000000 of the second buffering area of CPU2
Start, stores network message 1, the length is 10, therefore the tail address of network message 1 is 0x40000009.
In one example, the subaddressing that the memory mirror controller of CPU1 can will carry network message 1 and determine
The write operation of information (address 0x40000000 and address size 10 i.e. in the second buffering area of CPU2) is sent to CPU1's
The write operation is sent to the interconnection controller of CPU2 by the interconnection controller of CPU1 by interconnection controller, and by the interconnection of CPU2
The write operation is sent to the memory mirror controller of CPU2 by controller, and the memory mirror controller of CPU2 sends the write operation
To the Memory Controller Hub of CPU2, network message 1 is stored to the second buffering area of CPU2 by the Memory Controller Hub of CPU2.
Step 4, CPU1 CPU core read network message 1 from the first buffering area of CPU1, and to network message 1 into
Row modification, obtains modified network message 2.Wherein, the mode of CPU core reading network message 1 is identical as traditional approach, herein
It repeats no more.The mode that CPU core modifies to network message 1 can select according to the actual situation, such as modify network message 1
Source IP address and purpose IP address.
Step 5, CPU1 CPU core send write operation to the memory mirror controller of CPU1, wherein can be in the write operation
Network message 2 and subaddress information are carried, and the subaddress information can be the address of the first buffering area of CPU1
0x40000000 and address size 10.Moreover, the subaddress information carried in the write operation is exactly network message 1 the of CPU1
Corresponding storage address in one buffer area.
Step 6, memory mirror controller parse address 0x40000000 and address size 10 from write operation, and utilize
Network message 2 is stored the first buffering area of CPU1 by address 0x40000000 and address size 10.For example, memory mirror controls
Device can store network message 2 since the address 0x40000000 of the first buffering area of CPU1, the length is 10, therefore net
The tail address of network message 2 is 0x40000009.
In one example, memory mirror controller can be arrived the storage of network message 2 by the Memory Controller Hub of CPU1
The first buffering area of CPU1.For example, the write operation for carrying network message 2 and subaddress information is sent to by memory mirror controller
Network message 2 is stored the first buffering area of CPU1 by Memory Controller Hub by the Memory Controller Hub of CPU1, to this storing process,
It is repeated no more in the embodiment of the present application.
Step 7, based on the address in the address second buffering area corresponding with CPU2 in the corresponding first buffering area of CPU1
Mapping relations, memory mirror controller determines and above-mentioned subaddress information (such as address from the second buffering area of CPU2
0x40000000 and address size 10) corresponding subaddress information (the second buffering that the subaddress information determined is CPU2
Subaddress information in area), such as determine address 0x40000000 and address size 10, and utilize the subaddress information determined
Network message 2 is stored to the second buffering area of CPU2.For example, can be from the address 0x40000000 of the second buffering area of CPU2
Start, stores network message 2, the length is 10, therefore the tail address of network message 2 is 0x40000009.
In one example, the subaddressing that the memory mirror controller of CPU1 can will carry network message 2 and determine
The write operation of information (address 0x40000000 and address size 10 i.e. in the second buffering area of CPU2) is sent to CPU1's
The write operation is sent to the interconnection controller of CPU2 by the interconnection controller of CPU1 by interconnection controller, and by the interconnection of CPU2
The write operation is sent to the memory mirror controller of CPU2 by controller, and the memory mirror controller of CPU2 sends the write operation
To the Memory Controller Hub of CPU2, network message 2 is stored to the second buffering area of CPU2 by the Memory Controller Hub of CPU2.
Step 8, CPU1 CPU core complete network message modification after, determine by CPU2 network controller 4 transmission repairs
Network message 2 after changing, for the CPU core of CPU1, network message 2 is located in the first buffering area of CPU1, therefore, CPU1
CPU core by subaddress information (the address 0x40000000 in the first buffering area of such as CPU1 in the first buffering area of CPU1
With address size 10) it is written in the address register of network controller 4, so that network controller 4 be notified to send network message.
Step 9, network controller 4 detect that there are the subaddress informations of the first buffering area of CPU1 in address register
Afterwards, read operation is sent to the memory mirror controller of CPU2, which carries the subaddress information of the first buffering area of CPU1,
Such as the address 0x40000000 and address size 10 of the first buffering area of CPU1.
Step 10, CPU2 memory mirror controller parsed from the read operation CPU1 first buffering area subaddressing
Information, the mapping based on the address in the address first buffering area corresponding with CPU1 in the corresponding second buffering area of CPU2 are closed
System, from the corresponding second buffering area of CPU2, determines and above-mentioned subaddress information (such as address 0x40000000 and address size
10) corresponding subaddress information (subaddress information determined is the subaddress information in the second buffering area of CPU2), such as
Address 0x40000000 and address size 10 are determined, using the subaddress information determined from the corresponding second buffering area of CPU2
In get network message 2, rather than get network message 2 from the corresponding first buffering area of CPU1.
For example, the memory mirror controller of CPU2 reads net since the address 0x40000000 of the second buffering area of CPU2
Network message 2 reads always tail address 0x40000009, obtains complete network message 2.
In one example, the memory mirror controller of CPU2 can be corresponding from CPU2 by the Memory Controller Hub of CPU2
Network message 2 is got in second buffering area, to this acquisition process, is repeated no more.
Step 11, CPU2 memory mirror controller network message 2 is sent to network controller 4, be network controlled device 4
Network message 2 is sent using the destination address of network message 2, specific transmission process repeats no more.
Situation two, CPU2 CPU core modify to network message 1, the CPU core of CPU2 notice network controller 4 is sent
Network message 2.
Step 1- step 3, identical as the processing of step 1- step 3 of above situation one, details are not described herein.
Step 4, CPU2 CPU core read network message 1 from the second buffering area of CPU2, and to network message 1 into
Row modification, obtains modified network message 2.Wherein, the mode of CPU core reading network message 1 is identical as traditional approach, herein
It repeats no more.The mode that CPU core modifies to network message 1 can select according to the actual situation, such as modify network message 1
Source IP address and purpose IP address.
Step 5, CPU2 CPU core send write operation to the memory mirror controller of CPU2, wherein can be in the write operation
Network message 2 and subaddress information are carried, and the subaddress information can be the address of the second buffering area of CPU2
0x40000000 and address size 10.Moreover, the subaddress information carried in the write operation is exactly network message 1 the of CPU2
Corresponding storage address in two buffer areas.
Step 6, CPU2 memory mirror controller address 0x40000000 and address size 10 are parsed from write operation,
Network message 2 is stored to the second buffering area of CPU2 using address 0x40000000 and address size 10.For example, memory mirror
Controller stores network message 2 since the address 0x40000000 of the second buffering area of CPU2, the length is 10, therefore net
The tail address of network message 2 is 0x40000009.
In one example, the memory mirror controller of CPU2 can be by the Memory Controller Hub of CPU2 by network message 2
The second buffering area for storing CPU2, to this storing process, details are not described herein.
Step 7, based on the address in the address first buffering area corresponding with CPU1 in the corresponding second buffering area of CPU2
Mapping relations, the memory mirror controller of CPU2 determines with above-mentioned subaddress information (such as from the first buffering area of CPU1
Address 0x40000000 and address size 10) (subaddress information determined is the first of CPU1 for corresponding subaddress information
Subaddress information in buffer area), such as determine address 0x40000000 and address size 10, and utilize the subaddressing determined
Network message 2 is stored the first buffering area of CPU1 by information.For example, the address 0x40000000 of the first buffering area from CPU1
Start, stores network message 2, the length is 10, therefore the tail address of network message 2 is 0x40000009.
In one example, the subaddressing that the memory mirror controller of CPU2 can will carry network message 2 and determine
The write operation of information (address 0x40000000 and address size 10 i.e. in the first buffering area of CPU1) is sent to CPU2's
The write operation is sent to the interconnection controller of CPU1 by the interconnection controller of CPU2 by interconnection controller, and by the interconnection of CPU1
The write operation is sent to the memory mirror controller of CPU1 by controller, and the memory mirror controller of CPU1 sends the write operation
To the Memory Controller Hub of CPU1, network message 2 is stored to the first buffering area of CPU1 by the Memory Controller Hub of CPU1.
Step 8, CPU2 CPU core complete network message modification after, determine by CPU2 network controller 4 transmission repairs
Network message 2 after changing, for the CPU core of CPU2, network message 2 is located in the second buffering area of CPU2, therefore, CPU2
CPU core by subaddress information (the address 0x40000000 in the second buffering area of such as CPU2 in the second buffering area of CPU2
With address size 10) it is written in the address register of network controller 4, so that network controller 4 be notified to send network message.
Step 9, network controller 4 detect that there are the subaddress informations of the second buffering area of CPU2 in address register
Afterwards, read operation is sent to the memory mirror controller of CPU2, which carries the subaddress information of the second buffering area of CPU2,
Such as the address 0x40000000 and address size 10 of the second buffering area of CPU2.
Step 10, CPU2 memory mirror controller parsed from the read operation CPU2 second buffering area subaddressing
Information, and network message 2 is got from the corresponding second buffering area of CPU2 using the subaddress information, rather than from CPU1 pairs
Network message 2 is got in the first buffering area answered.
For example, the memory mirror controller of CPU2 reads net since the address 0x40000000 of the second buffering area of CPU2
Network message 2 reads always tail address 0x40000009, obtains complete network message 2.
In one example, the memory mirror controller of CPU2 can be corresponding from CPU2 by the Memory Controller Hub of CPU2
Network message 2 is got in second buffering area, to this acquisition process, is repeated no more.
Step 11, CPU2 memory mirror controller network message 2 is sent to network controller 4, be network controlled device 4
Network message 2 is sent using the destination address of network message 2, specific transmission process repeats no more.
The above process is the processing for network message, and in practical applications, memory mirror controller is also possible to receive
The operation of non-network message is such as directed to the operation of browser.Therefore, memory mirror controller is receiving read operation/write operation
Later, first distinguish whether the read operation/write operation is operation for network message, if it is, by adopting the above technical scheme
It is handled, if it is not, then being handled using traditional approach.
In one example, memory mirror controller is after receiving read operation/write operation, can be from read operation/write behaviour
Subaddress information is parsed in work, which includes initial address and address size, as address 0x40000000 and
Location length 10.Second of the address and opposite end CPU in first buffering area due to configuring local terminal CPU in memory mirror controller is slow
Rush the ground in the first buffering area of the mapping relations of the address in area, the address in the second buffering area of local terminal CPU and opposite end CPU
Therefore the mapping relations of location if the initial address being resolved to is the address recorded in mapping relations, illustrate read operation/write behaviour
Work is the operation for network message, is handled by adopting the above technical scheme, if the initial address being resolved to is not mapping
The address recorded in relationship illustrates that read operation/write operation is the operation for non-network message, then memory mirror controller is direct
Read operation/write operation is sent to Memory Controller Hub, is handled by Memory Controller Hub using traditional approach.
The above process is illustrated below in conjunction with a specific embodiment.In the present embodiment, controlled in memory mirror
Configuration register submodule, Comparative sub-module, write operation module, read operation module in device.
The address in the first buffering area of local terminal CPU and the second buffering area of opposite end CPU are recorded in register submodule
In the mapping relations of address, address in the first buffering area of the address in the second buffering area of local terminal CPU and opposite end CPU
Mapping relations.
Comparative sub-module can parse subaddressing letter after receiving read operation/write operation from read operation/write operation
Breath, which includes initial address and address size, such as address 0x40000000 and address size 10.Comparative sub-module
By the mapping relations recorded in inquiry register submodule, determine whether the initial address being resolved to is to record in mapping relations
Address.If so, illustrating that read operation/write operation is the operation for network message, mirror image is added in read operation/write operation
Mark, for read operation, is then issued to read operation module, for write operation, is then issued to write operation module.If not, explanation
Read operation/write operation is the operation for non-network message, and non-mirror image mark is added in read operation/write operation, for reading to grasp
Make, is then issued to read operation module, for write operation, is then issued to write operation module.
Read operation module is after receiving read operation, if carrying image banner in read operation, uses the technology of the application
Scheme is handled, and step 10, step 11 in above situation one and situation two are executed such as read operation module.If being taken in read operation
Band non-mirror image identifies, then read operation is directly transmitted to Memory Controller Hub by read operation module, uses tradition side by Memory Controller Hub
Formula is handled.
Write operation module is after receiving write operation, if carrying image banner in write operation, uses the technology of the application
Scheme is handled, and step 2, step 3, step 6, step 7 in above situation one and situation two are executed such as write operation module.If
Non-mirror image mark is carried in write operation, then write operation is directly transmitted to Memory Controller Hub by write operation module, by Memory Controller Hub
It is handled using traditional approach.
As shown in figure 4, the structure chart of the CPU proposed for the application, the CPU correspondence system memory, the Installed System Memory
Including the first buffering area and second buffering area divided for the CPU；The CPU includes:
Network controller is received, for receiving network message；
Memory mirror controller, for being stored the network message to local terminal CPU corresponding first by Memory Controller Hub
Buffer area, and the write operation of the network message is sent by interconnection controller to opposite end CPU, so that opposite end CPU storage should
Network message；When receiving the write operation of the network message of opposite end CPU by interconnection controller, by Memory Controller Hub by the net
Network packet storage is to the corresponding second buffering area of local terminal CPU；When receiving the read operation of network message, by Memory Controller Hub from
The corresponding second buffering area of local terminal CPU reads the network message and sends, which is the reception network-control of opposite end CPU
The network message that device receives；
The opposite end CPU is any CPU in addition to local terminal CPU.
In one example, the reception network controller, is also used to after receiving network message, Xiang Suoshu memory mirror
As controller sends the write operation of network message；
The memory mirror controller is being stored the network message to local terminal CPU corresponding the by Memory Controller Hub
One buffer area, and during sending by interconnection controller the write operation of the network message to opposite end CPU, it is specifically used for receiving
The write operation for receiving the network message that network controller is sent, it is local terminal that subaddress information is parsed from the write operation
Address in the corresponding first buffering area of CPU is then stored the network message to local terminal CPU corresponding the by Memory Controller Hub
One buffer area；Subaddress information in the write operation is replaced with into the address in the corresponding second buffering area of opposite end CPU, and is passed through
Modified write operation is sent to the opposite end CPU by interconnection controller.
In one example, the memory mirror controller is being stored the network message to this by Memory Controller Hub
It is local terminal specifically for parsing subaddress information from received write operation during holding the corresponding second buffering area of CPU
Address in the corresponding second buffering area of CPU is then stored the network message to local terminal CPU corresponding the by Memory Controller Hub
Two buffer areas.
In one example, the CPU further include:
CPU core is modified for reading the network message in the corresponding first buffering area of local terminal CPU, and to memory mirror
As controller sends the write operation of modified network message；
The memory mirror controller, being also used to parse subaddress information from the write operation is that local terminal CPU is corresponding
Address in first buffering area is then stored the modified network message by Memory Controller Hub corresponding to local terminal CPU
First buffering area；The write operation of modified network message is sent to opposite end CPU by interconnection controller, so that opposite end CPU is deposited
Modified network message is stored up, the subaddress information which carries is the address in the corresponding second buffering area of opposite end CPU.
In one example, the CPU further include:
CPU core is modified for reading the network message in the corresponding second buffering area of local terminal CPU, and to memory mirror
As controller sends the write operation of modified network message；
The memory mirror controller, being also used to parse subaddress information from the write operation is that local terminal CPU is corresponding
Address in second buffering area is then stored the modified network message by Memory Controller Hub corresponding to local terminal CPU
Second buffering area；The address that corresponding first buffering area is determined according to the address in the corresponding second buffering area of local terminal CPU, will repair
The subaddress information of the write operation of network message after changing replaces with the address for the first buffering area determined, and passes through mutual joint control
Device processed is sent to the corresponding CPU of the first buffering area determined, so that the CPU stores the modified network message.
In one example, the CPU further includes sending network controller；
The memory mirror controller is reading the net from the corresponding second buffering area of local terminal CPU by Memory Controller Hub
Network message and during sending, is opposite end CPU corresponding the specifically for parsing subaddress information from the read operation
Address in one buffer area determines the address in the corresponding second buffering area of corresponding local terminal CPU, by Memory Controller Hub from this
CPU corresponding second buffering area in end reads the network message, and the network message is sent to transmission network controller；Wherein,
The read operation is that the opposite end CPU determination issues when sending the network message by the transmission network controller of local terminal CPU；Or
Person is the address in the corresponding second buffering area of local terminal CPU from subaddress information is parsed in the read operation, passes through memory control
Device processed reads the network message from the corresponding second buffering area of local terminal CPU, and the network message is sent to transmission network-control
Device；Wherein, the read operation is that the CPU core determination of local terminal CPU sends the network message by the transmission network controller of local terminal CPU
When issue；
The transmission network controller, for sending the network message.
In one example, the address in the corresponding first buffering area of local terminal CPU and any CPU pairs in addition to local terminal CPU
There are mapping relations for the address in second buffering area answered.
The above disclosure is just a few specific examples of the present application, still, the application is not limited to this, any ability
What the technical staff in domain can think variation should all fall into the protection scope of the application.
Claims (15)
1. a kind of message transmitting method, applied on the central processor CPU of the network equipment, which is characterized in that the network is set
Standby includes at least two CPU, the corresponding Installed System Memory of each CPU, and first divided in Installed System Memory including the promising CPU
Buffer area and second buffering area；It include receiving network controller and memory mirror controller, the side in each CPU
Method includes:
It receives network controller and receives network message, memory mirror controller stores the network message corresponding to local terminal CPU
First buffering area, and the write operation of the network message is sent to opposite end CPU, so that the opposite end CPU stores the network message；
When memory mirror controller receives the write operation of the network message of opposite end CPU, by network message storage to local terminal CPU
Corresponding second buffering area；
When memory mirror controller receives the read operation of network message, the net is read from the corresponding second buffering area of local terminal CPU
Network message is simultaneously sent, which is the network message that the reception network controller of opposite end CPU receives；
The opposite end CPU is any CPU in addition to local terminal CPU.
2. the method according to claim 1, wherein the memory mirror controller arrives the network message storage
The corresponding first buffering area of local terminal CPU, and send to opposite end CPU the write operation of the network message, comprising:
The memory mirror controller receives the write operation for the network message that the reception network controller is sent, from the write operation
In to parse subaddress information be the address in the corresponding first buffering area of local terminal CPU, then the network message is stored to local terminal
The corresponding first buffering area of CPU；
The memory mirror controller replaces with the subaddress information in the write operation in the corresponding second buffering area of opposite end CPU
Address, and modified write operation is sent to the opposite end CPU.
3. the method according to claim 1, wherein described that network message storage is corresponding to local terminal CPU
Second buffering area, comprising:
It is corresponding second buffering of local terminal CPU that the memory mirror controller parses subaddress information from received write operation
Address in area then stores the network message to the corresponding second buffering area of local terminal CPU.
4. according to the method described in claim 2, it is characterized in that, this method further include:
The network message that CPU core is read in the corresponding first buffering area of local terminal CPU is modified；
CPU core sends the write operation of modified network message to memory mirror controller；
Memory mirror controller is the ground in the corresponding first buffering area of local terminal CPU from subaddress information is parsed in the write operation
Location, then by the modified network message storage to the corresponding first buffering area of local terminal CPU；
Memory mirror controller sends the write operation of modified network message to opposite end CPU, so that after opposite end CPU storage modification
Network message, the write operation carry subaddress information be the corresponding second buffering area of opposite end CPU in address.
5. according to the method described in claim 3, it is characterized in that, this method further include:
The network message that CPU core is read in the corresponding second buffering area of local terminal CPU is modified；
CPU core sends the write operation of modified network message to memory mirror controller；
Memory mirror controller is the ground in the corresponding second buffering area of local terminal CPU from subaddress information is parsed in the write operation
Location, then by the modified network message storage to the corresponding second buffering area of local terminal CPU；
Memory mirror controller determines the ground of corresponding first buffering area according to the address in the corresponding second buffering area of local terminal CPU
The subaddress information of the write operation of modified network message is replaced with the address for the first buffering area determined, concurrently by location
Give the first buffering area determined corresponding CPU, so that the CPU stores the modified network message.
6. the method according to claim 1, wherein described read from the corresponding second buffering area of local terminal CPU should
Network message is simultaneously sent, comprising:
It is the corresponding first buffering area of opposite end CPU that the memory mirror controller parses subaddress information from the read operation
In address, the address in the corresponding second buffering area of corresponding local terminal CPU is determined, from the corresponding second buffering area of local terminal CPU
The network message is read, is sent by sending network controller；Wherein, the read operation is that the opposite end CPU is determined by local terminal
The transmission network controller of CPU is sent to be issued when the network message；
Alternatively, it is local terminal CPU corresponding second that the memory mirror controller parses subaddress information from the read operation
The network message is read from the corresponding second buffering area of local terminal CPU in address in buffer area, by sending network controller hair
It send；Wherein, the read operation is that the CPU core determination of local terminal CPU sends the network message by the transmission network controller of local terminal CPU
When issue.
7. method according to any one of claims 1 to 6, which is characterized in that
In address second buffering area corresponding with any CPU in addition to local terminal CPU in the corresponding first buffering area of local terminal CPU
There are mapping relations for address.
8. a kind of central processor CPU, which is characterized in that the CPU correspondence system memory includes promising in the Installed System Memory
The first buffering area and second buffering area that the CPU is divided；The CPU includes:
Network controller is received, for receiving network message；
Memory mirror controller, for the network message to be stored the first buffering corresponding to local terminal CPU by Memory Controller Hub
Area, and the write operation of the network message is sent by interconnection controller to opposite end CPU, so that the opposite end CPU stores the network
Message；When receiving the write operation of the network message of opposite end CPU by interconnection controller, by Memory Controller Hub by the network report
The corresponding second buffering area of local terminal CPU is arrived in text storage；When receiving the read operation of network message, by Memory Controller Hub from local terminal
The corresponding second buffering area of CPU reads the network message and sends, which is that the reception network controller of opposite end CPU connects
The network message received；
The opposite end CPU is any CPU in addition to local terminal CPU.
9. CPU according to claim 8, which is characterized in that
The reception network controller, is also used to after receiving network message, and Xiang Suoshu memory mirror controller sends network
The write operation of message；
The memory mirror controller delays being stored the network message to local terminal CPU corresponding first by Memory Controller Hub
Rush area, and during sending by interconnection controller the write operation of the network message to opposite end CPU, be specifically used for receiving described in
The write operation for receiving the network message that network controller is sent, it is CPU pairs of local terminal that subaddress information is parsed from the write operation
The network message is then stored to local terminal CPU corresponding first by Memory Controller Hub and is delayed by the address in first buffering area answered
Rush area；Subaddress information in the write operation is replaced with into the address in the corresponding second buffering area of opposite end CPU, and passes through interconnection
Modified write operation is sent to the opposite end CPU by controller.
10. CPU according to claim 8, which is characterized in that
The memory mirror controller delays being stored the network message to local terminal CPU corresponding second by Memory Controller Hub
It is corresponding second buffering of local terminal CPU specifically for parsing subaddress information from received write operation during rushing area
Address in area is then stored the network message to the corresponding second buffering area of local terminal CPU by Memory Controller Hub.
11. CPU according to claim 9, which is characterized in that the CPU further include:
CPU core is modified for reading the network message in the corresponding first buffering area of local terminal CPU, and to memory mirror control
Device processed sends the write operation of modified network message；
The memory mirror controller, being also used to parse subaddress information from the write operation is local terminal CPU corresponding first
Address in buffer area is then stored the modified network message to local terminal CPU corresponding first by Memory Controller Hub
Buffer area；The write operation of modified network message is sent to opposite end CPU by interconnection controller, so that opposite end CPU storage is repaired
Network message after changing, the subaddress information which carries are the address in the corresponding second buffering area of opposite end CPU.
12. CPU according to claim 10, which is characterized in that the CPU further include:
CPU core is modified for reading the network message in the corresponding second buffering area of local terminal CPU, and to memory mirror control
Device processed sends the write operation of modified network message；
The memory mirror controller, being also used to parse subaddress information from the write operation is local terminal CPU corresponding second
Address in buffer area is then stored the modified network message to local terminal CPU corresponding second by Memory Controller Hub
Buffer area；The address that corresponding first buffering area is determined according to the address in the corresponding second buffering area of local terminal CPU, after modification
The subaddress information of write operation of network message replace with the address for the first buffering area determined, and pass through interconnection controller
It is sent to the corresponding CPU of the first buffering area determined, so that the CPU stores the modified network message.
13. CPU according to claim 8, which is characterized in that further include sending network controller；
The memory mirror controller is reading the network report from the corresponding second buffering area of local terminal CPU by Memory Controller Hub
It is that opposite end CPU corresponding first delays specifically for parsing subaddress information from the read operation during text and transmission
The address in area is rushed, determines the address in the corresponding second buffering area of corresponding local terminal CPU, by Memory Controller Hub from local terminal
The corresponding second buffering area of CPU reads the network message, and the network message is sent to transmission network controller；Wherein, institute
Stating read operation is that the opposite end CPU determination issues when sending the network message by the transmission network controller of local terminal CPU；Or
Person is the address in the corresponding second buffering area of local terminal CPU from subaddress information is parsed in the read operation, passes through memory control
Device processed reads the network message from the corresponding second buffering area of local terminal CPU, and the network message is sent to transmission network-control
Device；Wherein, the read operation is that the CPU core determination of local terminal CPU sends the network message by the transmission network controller of local terminal CPU
When issue；
The transmission network controller, for sending the network message.
14. according to any CPU of claim 8 to 13, which is characterized in that
In address second buffering area corresponding with any CPU in addition to local terminal CPU in the corresponding first buffering area of local terminal CPU
There are mapping relations for address.
15. a kind of network equipment, which is characterized in that including at least two such as described in any item central processings of claim 8-14
Device CPU.
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