CN101870448B - Preparation process of chip through silicon via (TSV) packaging technology of micro electro mechanical system (MEMS) - Google Patents
Preparation process of chip through silicon via (TSV) packaging technology of micro electro mechanical system (MEMS) Download PDFInfo
- Publication number
- CN101870448B CN101870448B CN200910031522.7A CN200910031522A CN101870448B CN 101870448 B CN101870448 B CN 101870448B CN 200910031522 A CN200910031522 A CN 200910031522A CN 101870448 B CN101870448 B CN 101870448B
- Authority
- CN
- China
- Prior art keywords
- wafer
- nickel
- layer
- aluminium lamination
- zinc
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Landscapes
- Electroplating Methods And Accessories (AREA)
Abstract
The invention discloses a preparation process of a chip through silicon via (TSV) packaging technology of a micro electro mechanical system (MEMS). An electroplating process and a chemical plating process are adopted, cyanide-free compound materials are used for coating tin metal layers on nickel metal layers of a metal circuit and a BGA welding pad to replace gold layers coated with cyanide compound materials, and the tin metal layers are used as a protective layer and a weldable layer. Because of isolation and protection of the nickel metal layers, the occurrence of tin whiskers can be effectively reduced; and because the tin layers are coated on the surfaces of the circuit and the BGA welding pad, the weldability is excellent. The invention saves the cost and is beneficial to environmental protection.
Description
Technical field
The present invention relates to wafer-level chip of micro-electro-mechanical system through-silicon-via encapsulation technology field.
Background technology
In wafer-level micro electromechanical system (MEMS) chip through-silicon-via (TSV) encapsulation technology; at metallic circuit surface and sidewall; (BGA) weld pad sidewall and (BGA) pad upper surface coating nickel dam and gold layer. be to adopt cyanogen compound material coated with gold metal level on nickel metal layer by electrochemical method; the nickel dam wherein applying and gold layer, as the protective layer of metallic circuit and (BGA) pad protective layer and can layer.This protective layer and can layer in gold when the Reflow Soldering of follow-up flow process, because gold layer is very thin, in high temperature contact in a flash, gold forms rapidly " interface alloy is total to compound " (as AuSn, AuSn with tin
2, AuSn
3deng) and fuse in tin.Therefore formed solder joint, is actually land on nickel surface, and form good Ni-Sn alloy compound Ni altogether
3sn
4, and performance set intensity (BGA) welding is to occur on nickel face, gold layer, just in order to protect nickel face, prevents its passivation (oxidation).If gold layer is too thick, can make the gold amount that enters scolding tin increase, once surpass 3%, solder joint reduces its adhesive strength on the contrary by becoming fragile property;
In described encapsulation technology, the golden process of soaking of circuit and (BGA) weld pad is a kind of displacement reaction, and reaction continues to carry out until gold covers chemical Ni-plating layer completely.Gold layer stops nickel dam oxidized, guarantees the good solderability of nickel dam.In soaking golden process, Gold plated Layer surface state: as all larger on plating weldability impact in porosity, blemish etc.Because traditional immersion gold plating layer porosity is higher, with Ni substrate poor adhesive force, thereby the welding performance of coating is poor.In addition, the excessive corrosion of Ni substrate in immersion gold plating process, is to cause one of poor major reason of solderability, likely causes the weld failure of subsequent element, be commonly referred to " black dish ", " black pad " problem, bring larger loss to factory, supplier etc.
Gold is a kind of metal of costliness, and cost is high, cyanide solution used severe toxicity, and large to human body infringement, environmental pollution is serious, is difficult for processing, and it is admitted facts that cyanogen compound works the mischief to environment and human body.
Summary of the invention
In order to overcome above-mentioned defect, the invention provides a kind of preparation technology of chip of micro-electro-mechanical system through-silicon-via encapsulation technology, can improve the solderability of chip, effectively reduce preparation cost, and be beneficial to environmental protection.
The present invention for the technical scheme that solves its technical problem and adopt is:
A preparation technology for chip of micro-electro-mechanical system through-silicon-via encapsulation technology, integrated circuit (IC) face of wafer of take is wafer frontside, by following processing step, is undertaken:
1.. front processing procedure: simultaneously form at glass the macromolecule resin class photoresist face that the IC with wafer frontside matches, by bonder, photoresist face and the wafer frontside of described glass are bonded together;
2.. wafer attenuate: wafer is thinned to setting dimensional thickness from grinding back surface, then wafer rear is carried out to the internal stress that plasma etching produces when remove grinding;
3.. exposure imaging: toast after wafer rear applies photoresist, the rear development of photoresist exposure by design to wafer rear, need the etched photoresist developing applying in the localities to fall wafer rear;
4.. crystal round etching: wafer is put into plasma etcher, need etched place to etch away wafer rear and form groove, do not need the etched place can be not etched because surface is coated with photoresist protection, this groove comes out the conducting block of wafer frontside part;
5.. be coated with insulating layer coating: adopt the mode of electrophoresis to apply macromolecule polymeric material at wafer rear, after formation insulating barrier, toast;
6.. laser drill: insulating barrier and conducting block by laser breakdown in wafer groove place come out the conducting block that punctures position from insulating barrier;
7.. sputtering aluminum: aluminum sputtering is formed to one deck conduction aluminium lamination at whole wafer rear, make conducting block that 6. step expose afterwards and conduct electricity aluminium lamination and be connected, thereby the mode of the conducting block of inside wafer IC by sputtering aluminum is communicated with and is directed to wafer rear;
8.. exposure imaging: the mode by electrophoresis applies one deck photoresist on the surface of conduction aluminium lamination, by designing forming the circuit of needs and the figure of BGA weld pad after photoresist exposure imaging, the photoresist on the conduction aluminium lamination surface of visuals is developed, thereby exposes the conduction aluminium lamination of visuals;
9.. chemical plating pre-treatment: wafer is immersed in pretreatment liquid, this pretreatment liquid composition is that (this is proprietary name term in the industry to high-concentration silicon sol NS-35, so no longer describe in detail), make the conduction aluminium lamination of visuals when the electroless zinc plating of postorder, have a good mating surface;
10.. secondary electroless zinc plating: the conduction aluminium lamination surface uniform at the visuals exposing is electroplated one deck zinc, with nitric acid degrade and clean after again electroplate one deck zinc, thereby form certain thickness zinc layer on conduction aluminium lamination surface, due to the zinc-plated effect that does not reach good combination power once, the general zinc-plated mode of secondary of using plays the effect of good transition layer between aluminium and the nickel dam of postorder;
. alkaline chemical nickel-plating: under alkaline environment at zinc layer plated surface last layer nickel, thereby on zinc layer surface, form alkaline nickel coating;
. acid chemical plating nickel: form acidic nickel plating layer on alkaline nickel coating surface under sour environment, chemical nickel plating has good dark plating covering power, coating structure densification can be played the effect to coating protection, on alkaline nickel coating, carry out acid chemical plating nickel, coating uniformity and good bonding strength;
. electronickelling: form certain thickness electroless nickel layer at acidic nickel plating layer electroplating surface, because the thickness of coating of chemical nickel plating is limited, make nickel coating reach certain thickness by electronickelling mode, coating is finer and close simultaneously, and adhesion is better;
. acid chemical plating nickel: form acid chemical plating nickel dam on electroless nickel layer surface under sour environment, electronickelling structure is more loose, can play to coating the protective effect of anti-oxidation at electroless nickel layer chemical nickel plating;
. remove photoresist: step 8. after visuals conduction aluminium lamination by step 9.~
after by zinc, nickel and pure tin coating, covered, by formic acid, the photoresist on the conduction aluminium lamination surface of non-visuals is got rid of, expose the conduction aluminium lamination of non-visuals;
. aluminium lamination etching: wafer is put into certain density sodium hydroxide solution, and the conduction aluminium lamination of non-visuals is removed, and exposes the side of the conduction aluminium lamination of visuals, nickel and sodium hydroxide solution do not reflect, each metal level of visuals is retained;
. chemical plating pre-treatment: wafer is immersed in pretreatment liquid, and this pretreatment liquid composition is high-concentration silicon sol NS-35, makes the conduction aluminium lamination of visuals when the electroless zinc plating of postorder, have a good mating surface;
. secondary electroless zinc plating: at the conduction aluminium lamination side of the visuals exposing uniformly-coating one deck zinc, with nitric acid degrade and clean after again electroplate one deck zinc, thereby form certain thickness zinc coat in conduction aluminium lamination side, due to the zinc-plated effect that does not reach good combination power once, the general zinc-plated mode of secondary of using plays the effect of good transition layer between aluminium and the nickel dam of postorder;
. acid chemical plating nickel: form acid chemical plating nickel dam, acid chemical plating nickel dam and the step of this visuals side at Several Thiourea Derivatives on Zinc Plate Surface under sour environment
after the acid chemical plating nickel dam UNICOM on visuals surface form the nickel dam of the figure of protection circuit and BGA weld pad, chemical nickel plating has good dark plating covering power, coating structure densification can be played the effect to coating protection, on alkaline nickel coating, carry out acid chemical plating nickel, coating uniformity and good bonding strength;
. chemical plating stannum: form tin layer on nickel dam surface, prevent nickel dam oxidation;
. welding resisting layer coating and exposure imaging: the mode by rotation applies one deck anti-solder ink on the surface of tin layer, and by exposure imaging mode, the anti-solder ink of logicalnot circuit part is developed to fall, thereby by circuit covering protection, BGA weld pad is come out;
. chemical plating stannum: the tin layer thickening by BGA weld pad part, guarantees that the weldability of BGA weld pad is good;
. BGA moulding: lead-free tin cream is coated on steel mesh, and the mode of printing by scraper is imprinted on BGA weld pad place by the lead-free tin cream on steel mesh, by Reflow Soldering mode, tin cream is melt into tin ball forming;
. follow-up cutting testing package: wafer is tested and vacuum packaging by design cutting is rear.
The invention has the beneficial effects as follows: adopt and electroplate and chemical plating process; utilization replaces the gold layer applying with cyanogen compound material without cyanogen compound material tin coating metal level on the nickel metal layer of metallic circuit and BGA weld pad; and as protective layer and can layer; insulation blocking due to nickel metal layer; can effectively reduce the generation of tin whisker, circuit and BGA weld pad surface are tin layer, have good solderability; both cost-saving, be beneficial to again environmental protection.
The specific embodiment
Embodiment: a kind of preparation technology of chip of micro-electro-mechanical system through-silicon-via encapsulation technology, integrated circuit (IC) face of wafer of take is wafer frontside, by following processing step, is undertaken:
1.. front processing procedure: simultaneously form at glass the macromolecule resin class photoresist face that the IC with wafer frontside matches, by bonder, photoresist face and the wafer frontside of described glass are bonded together;
2.. wafer attenuate: wafer is thinned to setting dimensional thickness from grinding back surface, then wafer rear is carried out to the internal stress that plasma etching produces when remove grinding;
3.. exposure imaging: toast after wafer rear applies photoresist, the rear development of photoresist exposure by design to wafer rear, need the etched photoresist developing applying in the localities to fall wafer rear;
4.. crystal round etching: wafer is put into plasma etcher, need etched place to etch away wafer rear and form groove, do not need the etched place can be not etched because surface is coated with photoresist protection, this groove comes out the conducting block of wafer frontside part;
5.. be coated with insulating layer coating: adopt the mode of electrophoresis to apply macromolecule polymeric material at wafer rear, after formation insulating barrier, toast;
6.. laser drill: insulating barrier and conducting block by laser breakdown in wafer groove place come out the conducting block that punctures position from insulating barrier;
7.. sputtering aluminum: aluminum sputtering is formed to one deck conduction aluminium lamination at whole wafer rear, make conducting block that 6. step expose afterwards and conduct electricity aluminium lamination and be connected, thereby the mode of the conducting block of inside wafer IC by sputtering aluminum is communicated with and is directed to wafer rear;
8.. exposure imaging: the mode by electrophoresis applies one deck photoresist on the surface of conduction aluminium lamination, by designing forming the circuit of needs and the figure of BGA weld pad after photoresist exposure imaging, the photoresist on the conduction aluminium lamination surface of visuals is developed, thereby exposes the conduction aluminium lamination of visuals;
9.. chemical plating pre-treatment: wafer is immersed in pretreatment liquid, this pretreatment liquid composition is that (this is proprietary name term in the industry to high-concentration silicon sol NS-35, so no longer describe in detail), make the conduction aluminium lamination of visuals when the electroless zinc plating of postorder, have a good mating surface;
10.. secondary electroless zinc plating: the conduction aluminium lamination surface uniform at the visuals exposing is electroplated one deck zinc, with nitric acid degrade and clean after again electroplate one deck zinc, thereby form certain thickness zinc layer on conduction aluminium lamination surface, due to the zinc-plated effect that does not reach good combination power once, the general zinc-plated mode of secondary of using plays the effect of good transition layer between aluminium and the nickel dam of postorder;
. alkaline chemical nickel-plating: under alkaline environment at zinc layer plated surface last layer nickel, thereby on zinc layer surface, form alkaline nickel coating;
. acid chemical plating nickel: form acidic nickel plating layer on alkaline nickel coating surface under sour environment, chemical nickel plating has good dark plating covering power, coating structure densification can be played the effect to coating protection, on alkaline nickel coating, carry out acid chemical plating nickel, coating uniformity and good bonding strength;
. electronickelling: form certain thickness electroless nickel layer at acidic nickel plating layer electroplating surface, because the thickness of coating of chemical nickel plating is limited, make nickel coating reach certain thickness by electronickelling mode, coating is finer and close simultaneously, and adhesion is better;
. acid chemical plating nickel: form acid chemical plating nickel dam on electroless nickel layer surface under sour environment, electronickelling structure is more loose, can play to coating the protective effect of anti-oxidation at electroless nickel layer chemical nickel plating;
. remove photoresist: step 8. after visuals conduction aluminium lamination by step 9.~
after by zinc, nickel and pure tin coating, covered, by formic acid, the photoresist on the conduction aluminium lamination surface of non-visuals is got rid of, expose the conduction aluminium lamination of non-visuals;
. aluminium lamination etching: wafer is put into certain density sodium hydroxide solution, and the conduction aluminium lamination of non-visuals is removed, and exposes the side of the conduction aluminium lamination of visuals, nickel and sodium hydroxide solution do not reflect, each metal level of visuals is retained;
. chemical plating pre-treatment: wafer is immersed in pretreatment liquid, and this pretreatment liquid composition is high-concentration silicon sol NS-35, makes the conduction aluminium lamination of visuals when the electroless zinc plating of postorder, have a good mating surface;
. secondary electroless zinc plating: at the conduction aluminium lamination side of the visuals exposing uniformly-coating one deck zinc, with nitric acid degrade and clean after again electroplate one deck zinc, thereby form certain thickness zinc coat in conduction aluminium lamination side, due to the zinc-plated effect that does not reach good combination power once, the general zinc-plated mode of secondary of using plays the effect of good transition layer between aluminium and the nickel dam of postorder;
. acid chemical plating nickel: form acid chemical plating nickel dam, acid chemical plating nickel dam and the step of this visuals side at Several Thiourea Derivatives on Zinc Plate Surface under sour environment
after the acid chemical plating nickel dam UNICOM on visuals surface form the nickel dam of the figure of protection circuit and BGA weld pad, chemical nickel plating has good dark plating covering power, coating structure densification can be played the effect to coating protection, on alkaline nickel coating, carry out acid chemical plating nickel, coating uniformity and good bonding strength;
. welding resisting layer coating and exposure imaging: the mode by rotation applies one deck anti-solder ink on the surface of tin layer, and by exposure imaging mode, the anti-solder ink of logicalnot circuit part is developed to fall, thereby by circuit covering protection, BGA weld pad is come out;
. chemical plating stannum: the tin layer thickening by BGA weld pad part, guarantees that the weldability of BGA weld pad is good;
. BGA moulding: lead-free tin cream is coated on steel mesh, and the mode of printing by scraper is imprinted on BGA weld pad place by the lead-free tin cream on steel mesh, by Reflow Soldering mode, tin cream is melt into tin ball forming;
. follow-up cutting testing package: wafer is tested and vacuum packaging by design cutting is rear.
Claims (2)
1. a preparation technology for chip of micro-electro-mechanical system through-silicon-via encapsulation technology, is characterized in that: take the integrated electric road surface of wafer is wafer frontside, by following processing step, is undertaken:
1.. front processing procedure: simultaneously form at glass the macromolecule resin class photoresist face that the integrated circuit with wafer frontside matches, by bonder, photoresist face and the wafer frontside of described glass are bonded together;
2.. wafer attenuate: wafer is thinned to setting dimensional thickness from grinding back surface, then wafer rear is carried out to plasma etching;
3.. exposure imaging: toast after wafer rear applies photoresist, the rear development of photoresist exposure by design to wafer rear, need the etched photoresist developing applying in the localities to fall wafer rear;
4.. crystal round etching: wafer is put into plasma etcher, wafer rear is needed etched place to etch away and forms groove, this groove comes out the conducting block of wafer frontside part;
5.. be coated with insulating layer coating: adopt the mode of electrophoresis to apply macromolecule polymeric material at wafer rear, after formation insulating barrier, toast;
6.. laser drill: insulating barrier and conducting block by laser breakdown in wafer groove place come out the conducting block that punctures position from insulating barrier;
7.. sputtering aluminum: aluminum sputtering is formed to one deck conduction aluminium lamination at whole wafer rear, the conducting block that 6. step is exposed is afterwards connected with conduction aluminium lamination;
8.. exposure imaging: the mode by electrophoresis applies one deck photoresist on the surface of conduction aluminium lamination, by designing forming the circuit of needs and the figure of BGA weld pad after photoresist exposure imaging, the photoresist on the conduction aluminium lamination surface of visuals is developed, thereby exposes the conduction aluminium lamination of visuals;
9.. chemical plating pre-treatment: wafer is immersed in pretreatment liquid, and this pretreatment liquid composition is high-concentration silicon sol NS-35;
10.. secondary electroless zinc plating: at the conduction aluminium lamination surface uniform of the visuals exposing, electroplate one deck zinc, with nitric acid degrade and cleans after again electroplate one deck zinc, thereby at the certain thickness zinc layer of conduction aluminium lamination surface formation;
. alkaline chemical nickel-plating: under alkaline environment at zinc layer plated surface last layer nickel, thereby on zinc layer surface, form alkaline nickel coating;
. acid chemical plating nickel: form acidic nickel plating layer on alkaline nickel coating surface under sour environment;
. electronickelling: form certain thickness electroless nickel layer at acidic nickel plating layer electroplating surface;
. acid chemical plating nickel: form acid chemical plating nickel dam on electroless nickel layer surface under sour environment;
. remove photoresist: by formic acid, the photoresist on the conduction aluminium lamination surface of non-visuals is got rid of;
. aluminium lamination etching: wafer is put into certain density sodium hydroxide solution, and the conduction aluminium lamination of non-visuals is removed, and exposes the side of the conduction aluminium lamination of visuals;
. chemical plating pre-treatment: wafer is immersed in pretreatment liquid, and this pretreatment liquid composition is high-concentration silicon sol NS-35;
. secondary electroless zinc plating: at the conduction aluminium lamination side of the visuals exposing uniformly-coating one deck zinc, with nitric acid degrade and clean after again electroplate one deck zinc, thereby conduction aluminium lamination side form certain thickness zinc coat;
. acid chemical plating nickel: form acid chemical plating nickel dam, acid chemical plating nickel dam and the step of this visuals side at Several Thiourea Derivatives on Zinc Plate Surface under sour environment
after the acid chemical plating nickel dam UNICOM on visuals surface form nickel dam;
. welding resisting layer coating and exposure imaging: the mode by rotation applies one deck anti-solder ink on the surface of tin layer, and by exposure imaging mode, the anti-solder ink of logicalnot circuit part is developed to fall;
. BGA moulding: lead-free tin cream is coated on steel mesh, and the mode of printing by scraper is imprinted on BGA weld pad place by the lead-free tin cream on steel mesh, by Reflow Soldering mode, tin cream is melt into tin ball forming;
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN200910031522.7A CN101870448B (en) | 2009-04-22 | 2009-04-22 | Preparation process of chip through silicon via (TSV) packaging technology of micro electro mechanical system (MEMS) |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN200910031522.7A CN101870448B (en) | 2009-04-22 | 2009-04-22 | Preparation process of chip through silicon via (TSV) packaging technology of micro electro mechanical system (MEMS) |
Publications (2)
Publication Number | Publication Date |
---|---|
CN101870448A CN101870448A (en) | 2010-10-27 |
CN101870448B true CN101870448B (en) | 2014-03-19 |
Family
ID=42995566
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN200910031522.7A Expired - Fee Related CN101870448B (en) | 2009-04-22 | 2009-04-22 | Preparation process of chip through silicon via (TSV) packaging technology of micro electro mechanical system (MEMS) |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN101870448B (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1669907A (en) * | 2005-02-07 | 2005-09-21 | 锐捷科技股份有限公司 | Electroplating method for micro-electromechanical system |
CN1767162A (en) * | 2004-10-26 | 2006-05-03 | 育霈科技股份有限公司 | Chip-size package structure and forming method of the same |
Family Cites Families (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20040154925A1 (en) * | 2003-02-11 | 2004-08-12 | Podlaha Elizabeth J. | Composite metal and composite metal alloy microstructures |
US20050095814A1 (en) * | 2003-11-05 | 2005-05-05 | Xu Zhu | Ultrathin form factor MEMS microphones and microspeakers |
-
2009
- 2009-04-22 CN CN200910031522.7A patent/CN101870448B/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1767162A (en) * | 2004-10-26 | 2006-05-03 | 育霈科技股份有限公司 | Chip-size package structure and forming method of the same |
CN1669907A (en) * | 2005-02-07 | 2005-09-21 | 锐捷科技股份有限公司 | Electroplating method for micro-electromechanical system |
Non-Patent Citations (2)
Title |
---|
晶圆键合技术与微电子机械系统新进展;葛劢冲;《电子工业专用设备》;20040731(第114期);第15-20页 * |
葛劢冲.晶圆键合技术与微电子机械系统新进展.《电子工业专用设备》.2004,(第114期),第15-20页. |
Also Published As
Publication number | Publication date |
---|---|
CN101870448A (en) | 2010-10-27 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TWI275144B (en) | Method of manufacturing semiconductor device | |
KR100800251B1 (en) | Electronic device substrate and its fabrication method, and electronic device and its fabrication method | |
KR100454381B1 (en) | Semiconductor device and manufacturing method thereof | |
CN101790903B (en) | Multilayer printed wiring board and method for manufacturing multilayer printed wiring board | |
CN101810063A (en) | Multilayer printed wiring board and method for manufacturing multilayer printed wiring board | |
EP1154471A1 (en) | Semiconductor chip and manufacture method thereof | |
KR20020020658A (en) | Method for manufacturing a semiconductor device | |
KR19980055816A (en) | Manufacturing Method of Chip Size Semiconductor Package | |
CN101897083A (en) | Anisotropic conductive joint package | |
CN102017111B (en) | Lead-free solder joint structure and solder ball | |
CN102943291A (en) | Surface treatment method for weldability and protectivity of aluminium alloy tube shell | |
CN101870450B (en) | Manufacturing process of chip through silicon via (TSV) packaging technology of micro electro mechanical system (MEMS) | |
TW201022484A (en) | Method for improving the adhesion between silver surfaces and resin materials | |
CN112133640B (en) | Preparation method of lead frame with rough side wall | |
US20090197375A1 (en) | Metal-resin-boned structured body and resin-encapsulated semiconductor device, and fabrication method for them | |
CN101870447B (en) | Manufacturing process of chip through silicon via (TSV) packaging technology of micro electro mechanical system (MEMS) | |
CN102316668A (en) | Substrate with fine metal pattern, print circuit board and semiconductor device, and production method of substrate with fine metal pattern, print circuit board and semiconductor device | |
US20080008900A1 (en) | Ball Limiting Metallurgy, Interconnection Structure Including the Same, and Method of Forming an Interconnection Structure | |
CN101425489A (en) | Solder convex point connected metal layer in microelectronic package and use thereof | |
CN100527372C (en) | Semiconductor sensor and plating method thereof | |
US10867895B2 (en) | Lead-frame structure, lead-frame, surface mount electronic device and methods of producing same | |
CN101870448B (en) | Preparation process of chip through silicon via (TSV) packaging technology of micro electro mechanical system (MEMS) | |
CN101870449B (en) | Multilayer line manufacturing process of wafer-level micro electromechanical system chip encapsulation technology | |
US6537851B1 (en) | Method of connecting a bumped compliant conductive trace to a semiconductor chip | |
KR20090116515A (en) | High ductility au surface treatment plating method of flexible printed circuit board |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
C06 | Publication | ||
PB01 | Publication | ||
C10 | Entry into substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant | ||
CF01 | Termination of patent right due to non-payment of annual fee | ||
CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20140319 Termination date: 20160422 |