CN101859846A - Manufacture method of vertical LED - Google Patents
Manufacture method of vertical LED Download PDFInfo
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- CN101859846A CN101859846A CN200910131552A CN200910131552A CN101859846A CN 101859846 A CN101859846 A CN 101859846A CN 200910131552 A CN200910131552 A CN 200910131552A CN 200910131552 A CN200910131552 A CN 200910131552A CN 101859846 A CN101859846 A CN 101859846A
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Abstract
The invention discloses a manufacture method of a vertical LED, which comprises the steps of: firstly, using a base plate as a substrate for epitaxial growth; secondly, sequentially forming a first semiconductor layer, a light-emitting layer and a second semiconductor layer on the base plate; thirdly, carrying out chip bonding process to ensure that the second semiconductor layer is jointed with a carrier; and fourthly, removing the base plate to be convenient for arranging a welding pad on the first semiconductor layer. The vertical LED improves the bonding accuracy by using a chip bonding process so as to reduce the bonding error rate to lower the cost and improve the production yield, and it is easy to observe the problem condition generated when the carrier is bonded with the second semiconductor layer.
Description
Technical field
The present invention relates to a kind of manufacturing method for LED, particularly a kind of manufacture method of vertical LED.
Background technology
The optoelectronic semiconductor industry is the popular industry of semiconductor industry now, wherein the optoelectronic semiconductor process technique is to be showing improvement or progress day by day, and the product that is subjected to extensively utilizing is light-emitting diode, for example the light source of traffic signals sign, lighting apparatus, backlight module and indicator light etc.But processing procedure is more little and accurate more, perhaps produces under the area increase situation, causes joining technique to change along with aforesaid variation.For vertical LED now, the comparatively conspicuous concrete instance of light-emitting diode is GaN series LED, and its joint is to utilize wafer to engage (wafer bonding), so that substrate engages with semi-conductor layer.For undersized production area, wafer engages quite rapidly convenient, but for large-sized production area, and the wafer joint can cause often taking place to engage error and needs engage again, so will make the cost raising of vertical LED.
Below be the concrete enforcement of common vertical LED, it is exposed in Mr. Liu Zhengyu and Mr. Xu Shijie respectively and proposes among the technology contents of letters patent book number for " light-emitting diode and the manufacture method thereof " of " I246784 ".See also Fig. 1, Fig. 1 is the structural representation of common vertical LED.Common vertical LED structure is a light-emitting diode chip for backlight unit 100, and it includes a silicon substrate 102, a gold medal layer 104, one first type doping semiconductor layer 106, a luminescent layer 108, one second type doping semiconductor layer 110 and a connection pad 112.Wherein if the first type doping semiconductor layer 106 is a N type doping semiconductor layer, then the second type doping semiconductor layer 110 is a P type doping semiconductor layer, if the first type doping semiconductor layer 106 is a P type doping semiconductor layer, then the second type doping semiconductor layer 110 is a N type doping semiconductor layer; Luminescent layer 108 is the semiconductor of III-th family or IV family.
See also Fig. 2 to Fig. 8, Fig. 2 to Fig. 8 is the schematic diagram that the manufacturing process of common vertical LED is implemented.To shown in Figure 8, is the structural change of common vertical LED in manufacturing process as Fig. 2.At the beginning, as shown in Figure 2, provide an epitaxial substrate 114, it is a wafer (wafer); As shown in Figure 3, form a resilient coating 116 on epitaxial substrate 114, to be used to form the first type doping semiconductor layer 106, luminescent layer 108 and the second type doping semiconductor layer 110 on epitaxial substrate 114, it is to form the second type doping semiconductor layer 110 earlier, form luminescent layer 108 again, the back forms the first type doping semiconductor layer 106, as shown in Figure 4.Then, as shown in Figure 5, form gold layer 104 on the first type doping semiconductor layer 106.
Continue, as shown in Figure 6, gold layer 104 engages (waferbonding) processing procedure joint with a silicon substrate 102 by carrying out wafer, and it is earlier silicon substrate 102 to be carried out manufacturing process for cleaning, carry out gold-silicon eutectic (eutectic) again and engage, silicon substrate 102 is the parts in dotted line indicates.Then, as shown in Figure 7, epitaxial substrate 114 removes from the structure of Fig. 6 with resilient coating 116, and it is to adopt excimer laser to carry out the laser lift-off processing procedure.At last, structure shown in Figure 7 is divided into single die (single chip) via wafer cutting processing procedure, and forms a connection pad 112 on the second type doping semiconductor layer 110, as shown in Figure 8.So promptly constitute the structure of common vertical LED.
In addition, the wafer connection process also is exposed in Mrs Hong Ruihua, Mr. Wu Dongxing and Mr. Huang Shaohua and proposes among the technology contents of letters patent book number for " light-emitting diode and the manufacture method thereof " of " I234887 ".Yet vertical LED is via the wafer connection process, with the wafer is that unit makes substrate engage with semiconductor layer, be easy to generate and engage dislocation, therefore must engage again, and the size that increases wafer is in order to increase prouctiveness, improve the degree of difficulty of wafer connection process especially, entrained air bubbles or other exogenous impurity when it can cause substrate to engage with semiconductor layer and be difficult for to observe find so more cause yield to reduce and cost increases.In addition, for the wafer of epitaxial substrate, the thermal coefficient of expansion of the limited size of wafer when engaging, further, the wafer connection process is out of shape owing to can making wafer be heated in processing procedure, thereby wrong problem takes place when causing engaging to engage, so the wafer connection process is subjected to the restriction that wafer can be out of shape because of being heated and causes increasable production capacity limited.
Summary of the invention
The technical problem to be solved in the present invention provides a kind of manufacture method of vertical LED, can promote the yield of vertical LED.
For solving the problems of the technologies described above, manufacture method of vertical LED of the present invention is to utilize the crystal grain connection process, so that second semiconductor layer engages with carrier.At first the step of Zhi Hanging provides a substrate, in order to form one first semiconductor layer, a luminescent layer and one second semiconductor layer in regular turn on substrate, then form one first knitting layer in second semiconductor layer, or form one second knitting layer on carrier, be used to allow second semiconductor layer and carrier form electric joining via the crystal grain connection process.
Manufacture method of vertical LED of the present invention in order to make vertical LED, can promote the yield of vertical LED by the crystal grain connection process, and reduces the fault rate generation that engages, to reduce cost.In addition, connection process engages because vertical LED is to use crystal grain, does not cause engaging dislocation so need not consider substrate heat to expand or other problem takes place, and is easy to observe the variation that joint causes and avoids producing defective products.
Description of drawings
Below in conjunction with the drawings and the specific embodiments the present invention is further elaborated.
Fig. 1 is the structural representation of common vertical LED;
Fig. 2 is the schematic diagram of the part manufacturing process of common vertical LED;
Fig. 3 is the schematic diagram of the part manufacturing process of common vertical LED;
Fig. 4 is the schematic diagram of the part manufacturing process of common vertical LED;
Fig. 5 is the schematic diagram of the part manufacturing process of common vertical LED;
Fig. 6 is the schematic diagram of the part manufacturing process of common vertical LED;
Fig. 7 is the schematic diagram of the part manufacturing process of common vertical LED;
Fig. 8 is the schematic diagram of the part manufacturing process of common vertical LED;
Fig. 9 is the schematic diagram of the part manufacturing process of preferred embodiment one of the present invention;
Figure 10 is the schematic diagram of the part manufacturing process of preferred embodiment one of the present invention;
Figure 11 is the schematic diagram of the part manufacturing process of preferred embodiment one of the present invention;
Figure 12 is the schematic diagram of the part manufacturing process of preferred embodiment one of the present invention;
Figure 13 is the schematic diagram of the part manufacturing process of preferred embodiment one of the present invention;
Figure 14 is the schematic diagram of the part manufacturing process of preferred embodiment one of the present invention;
Figure 15 is the schematic diagram of the part manufacturing process of preferred embodiment one of the present invention;
Figure 16 is the schematic diagram of the part manufacturing process of preferred embodiment one of the present invention;
Figure 17 is the schematic diagram of the part manufacturing process of preferred embodiment two of the present invention;
Figure 18 is the schematic diagram of the part manufacturing process of preferred embodiment two of the present invention;
Figure 19 is the schematic diagram of the part manufacturing process of preferred embodiment two of the present invention;
Figure 20 is the schematic diagram of the part manufacturing process of preferred embodiment two of the present invention;
Figure 21 is the schematic diagram of the part manufacturing process of preferred embodiment two of the present invention;
Figure 22 is the schematic diagram of the part manufacturing process of preferred embodiment two of the present invention;
Figure 23 is the schematic diagram of the part manufacturing process of preferred embodiment two of the present invention;
Figure 24 is the schematic diagram of the part manufacturing process of preferred embodiment two of the present invention;
Figure 25 is the schematic diagram of the part manufacturing process of preferred embodiment two of the present invention;
Figure 26 is the schematic diagram of the part manufacturing process of preferred embodiment three of the present invention;
Figure 27 is the schematic diagram of the part manufacturing process of preferred embodiment three of the present invention;
Figure 28 is the schematic diagram of the part manufacturing process of preferred embodiment three of the present invention;
Figure 29 is the schematic diagram of the part manufacturing process of preferred embodiment three of the present invention;
Figure 30 is the schematic diagram of the part manufacturing process of preferred embodiment three of the present invention;
Figure 31 is the schematic diagram of the part manufacturing process of preferred embodiment three of the present invention;
Figure 32 is the schematic diagram of the part manufacturing process of preferred embodiment three of the present invention;
Figure 33 is the schematic diagram of the part manufacturing process of preferred embodiment three of the present invention.
Embodiment
At first, see also Fig. 9 to Figure 16, Fig. 9 to Figure 16 is the schematic diagram of the part manufacturing process of preferred embodiment one of the present invention.To shown in Figure 16, it is that vertical LED is in the structural change of implementing under the manufacturing process of the present invention as Fig. 9.At first as shown in Figure 9, one laminar substrate 202 is provided, to be used to carry the epitaxial structure of vertical LED, wherein substrate 202 is one of them of the chemical element of the chemical element of the chemical element of the chemical element that is selected from III-V family, II-VI family, IV family, IV-IV family, non-crystalline semiconductor, noncrystal semiconductor or above-mentioned combination in any.As shown in figure 10, one deck first semiconductor layer 204 is formed on the substrate 202; As shown in figure 11, one deck luminescent layer 206 is formed on first semiconductor layer 204; As shown in figure 12, one deck second semiconductor layer 208 is formed on the luminescent layer 206; Wherein if first semiconductor layer 204 is the n type gallium nitride based semiconductor, then second semiconductor layer 208 is the gallium nitride based semiconductor of P type, if first semiconductor layer 204 is the gallium nitride based semiconductor of P type, then second semiconductor layer 208 is the n type gallium nitride based semiconductor, and luminescent layer 206 is gallium nitride based semiconductor.
As shown in figure 13, one deck first knitting layer 210 is formed on second semiconductor layer 208; As shown in figure 14, the structure of Figure 13 is fixed on one deck carrier 212, and make first knitting layer 210 towards carrier 212, to allow first knitting layer 210 engage via the crystal grain connection process with carrier 212, be used to allow second semiconductor layer 208 and carrier 212 form electric joining, the material of wherein said carrier 212 is for being selected from semiconductor, metal and alloy thereof, and carrier 212 is positioned in the dotted line sign, and the crystal grain connection process can be employing hot pressing (Thermcompression) joint, the juncture of eutectic (eutectic) joint or hot ultrasonic waves (Thermsonic) joint etc. is to engage.Continue, as shown in figure 15, remove substrate 202, it is the mode by laser lift-off (laserlift-off) or grinding (lapping), exposed first semiconductor layer 204 to remove.At last, structure shown in Figure 15 is divided into single die (single chip) through wafer cutting processing procedure, and forms a weld pad 214 on first semiconductor layer 204, as shown in figure 16.So promptly constitute the structure of vertical LED, with reach avoid engaging dislocation and bubble residual, and be easy to observe the crystal grain of vertical LED.
The above, manufacture method of vertical LED of the present invention is to adopt the single die combination, to engage the structure of vertical LED, and because the crystal grain connection process is the processing procedures of the indivedual joints of each single die, so can promote the accuracy rate of joint on the connection process, must engage again to avoid engaging error, and vertical LED is observed the variation that carrier engages with second semiconductor layer by the crystal grain connection process is easier, to be easy to avoid producing defective products, therefore can obtain better production capacity and lower cost.
See also Figure 17 to Figure 25, Figure 17 to Figure 25 is the schematic diagram of the part manufacturing process of preferred embodiment two of the present invention.To shown in Figure 25, it is the structural change of vertical LED under enforcement manufacturing process of the present invention as Figure 17, and wherein Figure 17 to Figure 25 also comprises formation one deck resilient coating 216 with the Figure 17 to Figure 25 that is not both of Fig. 9 to Figure 16.At first as shown in figure 17, one laminar substrate 202 is provided, and wherein substrate 202 is one of them of the chemical element of the chemical element of the chemical element of the chemical element that is selected from III-V family, II-VI family, IV family, IV-IV family, non-crystalline semiconductor, noncrystal semiconductor and above-mentioned combination in any.As shown in figure 18, one deck resilient coating 216 is formed on the substrate 202.
Continue, as shown in figure 19, one deck first semiconductor layer 204 is formed on the resilient coating 216; As shown in figure 20, one deck luminescent layer 206 is formed on first semiconductor layer 204; As shown in figure 21, one deck second semiconductor layer 208 is formed on the luminescent layer 206; Wherein if first semiconductor layer 204 is the n type gallium nitride based semiconductor, then second semiconductor layer 208 is the gallium nitride based semiconductor of P type, if first semiconductor layer 204 is the gallium nitride based semiconductor of P type, then second semiconductor layer 208 is the n type gallium nitride based semiconductor, and luminescent layer 206 is gallium nitride based semiconductor.As shown in figure 22, one deck first knitting layer 210 is formed on second semiconductor layer 208, and wherein the material that adopted of first knitting layer 210 can be one of them that is selected from gold, silver, lead, indium, tin, conducting resinl or above-mentioned combination.
Continue again, as shown in figure 23, the structure of Figure 22 is fixed on one deck carrier 212, to allow first knitting layer 210 engage via the crystal grain connection process with carrier 212, be used to allow second semiconductor layer 208 and carrier 212 form electric joining, the material of wherein said carrier 212 is for being selected from semiconductor, metal and alloy thereof, and carrier 212 is positioned in the dotted line sign, and the crystal grain connection process can be and adopt that hot pressing (Thermcompression) engages, eutectic (eutectic) engages or juncture that hot ultrasonic waves (Thermsonic) engages etc., to engage.Continue, as shown in figure 24, remove substrate 202 and resilient coating 216, it is the mode by laser lift-off (laser lift-off) or grinding (lapping), exposed first semiconductor layer 204 to remove.
At last, structure shown in Figure 24 is divided into single die (singlechip) via wafer cutting processing procedure, and forms a weld pad 214 on first semiconductor layer 204, as shown in figure 25.So promptly constitute the structure of vertical LED, vertical LED can avoid laser lift-off or grinding light-emitting diode to be caused impaired by resilient coating 116.
See also Figure 26 to Figure 33, Figure 26 to Figure 33 is the schematic diagram of the part manufacturing process of preferred embodiment three of the present invention.To shown in Figure 33, it is the structural change of vertical LED under enforcement manufacturing process of the present invention as Figure 26, and wherein Figure 26 to Figure 33 also comprises formation one second knitting layer 218 with the Figure 26 to Figure 33 that is not both of Figure 17 to Figure 25.At first as shown in figure 26, one laminar substrate 202 is provided, and wherein substrate 202 is one of them of the chemical element of the chemical element of the chemical element of the chemical element that is selected from III-V family, II-VI family, IV family, IV-IV family, non-crystalline semiconductor, noncrystal semiconductor or above-mentioned combination in any.
Continue, as shown in figure 27, one deck first semiconductor layer 204 is formed on the substrate 202; As shown in figure 28, one deck luminescent layer 206 is formed on first semiconductor layer 204; As shown in figure 29, one deck second semiconductor layer 208 is formed on the luminescent layer 206; Wherein if first semiconductor layer 204 is the n type gallium nitride based semiconductor, then second semiconductor layer 208 is the gallium nitride based semiconductor of P type, if first semiconductor layer 204 is the gallium nitride based semiconductor of P type, then second semiconductor layer 208 is the n type gallium nitride based semiconductor, and luminescent layer 206 is gallium nitride based semiconductor.As shown in figure 30, one first knitting layer 210 is formed on second semiconductor layer 208, and one second knitting layer 218 is formed on the carrier 212, and wherein the material that adopted of first knitting layer 210 and second knitting layer 218 can be one of them that is selected from gold, silver, lead, indium, tin, conducting resinl or above-mentioned combination.
Continue again, as shown in figure 31, the structure of Figure 30 is fixed on the carrier 212, and make first knitting layer 210 towards carrier 212, to allow first knitting layer 210 engage via the crystal grain connection process with second knitting layer 218, be used to allow second semiconductor layer 208 and carrier 212 form electric joining, the material of wherein said carrier 212 is for being selected from semiconductor, metal and alloy thereof, and carrier 212 is positioned in the dotted line sign, and the crystal grain connection process can be employing hot pressing (Thermcompression) joint, the juncture of eutectic (eutectic) joint or hot ultrasonic waves (Thermsonic) joint etc. is to engage.Continue, shown in figure 32, remove substrate 202, it is the mode by laser lift-off (laserlift-off) or grinding (lapping), exposed first semiconductor layer 204 to remove.
At last, structure shown in Figure 32 is divided into single die (singlechip) via wafer cutting processing procedure, and forms a weld pad 214 on first semiconductor layer 204, as shown in figure 33.So promptly constitute the structure of vertical LED, with the intensity that engages by the raising of crystal grain connection process, and the accuracy that engages.
In addition, manufacture method of vertical LED of the present invention more can only form second knitting layer on carrier, engages with second knitting layer for second semiconductor layer, is used to allow second semiconductor layer and carrier form electric joining.And the luminescent layer of vertical LED can be multiple quantum trap (Multiple Quantun Well, MQW) structure.
In sum, manufacture method of vertical LED of the present invention, it is to adopt the crystal grain connection process in the manufacturing process of vertical LED.When manufacturing process is implemented, one substrate is provided earlier, continue, one first semiconductor layer, a luminescent layer and one second semiconductor layer are formed on the substrate in regular turn, subsequently, then form first knitting layer, second knitting layer or above-mentioned combination, then, the wafer that second semiconductor layer and comprises carrier engages by the crystal grain connection process, remove substrate via laser lift-off or grinding again, be divided into single die at last, and form a weld pad on first semiconductor layer, to constitute the structure of vertical LED.In addition, also can form a resilient coating on the substrate, to cushion laser lift-off or grinding wearing and tearing to the structure of vertical LED.So vertical LED, further can promote yield, and reduce cost in order to engage second semiconductor layer and carrier by the crystal grain connection process.
More than, the present invention is had been described in detail, but these are not to be construed as limiting the invention by embodiment.Under the situation that does not break away from the principle of the invention, those skilled in the art also can make many distortion and improvement, and these also should be considered as protection scope of the present invention.
Claims (20)
1. a manufacture method of vertical LED is characterized in that, includes following steps:
One substrate is provided;
Form one first semiconductor layer on described substrate;
Form a luminescent layer on described first semiconductor layer;
Form one second semiconductor layer on described luminescent layer;
Engage described second semiconductor layer and a carrier via a crystal grain connection process; And
Remove described substrate.
2. manufacture method of vertical LED as claimed in claim 1, it is characterized in that, engage the step of described second semiconductor layer and a carrier via a crystal grain connection process before, also comprise a step, it is to form one first knitting layer on described second semiconductor layer, and forms one second knitting layer on described carrier.
3. manufacture method of vertical LED as claimed in claim 2 is characterized in that, the material that described first knitting layer and described second knitting layer are adopted is one of them of gold, silver, lead, indium, tin, conducting resinl or above-mentioned combination.
4. manufacture method of vertical LED as claimed in claim 2, it is characterized in that, engage the step of described second semiconductor layer and a carrier via a crystal grain connection process, it is to engage with described second knitting layer via described first knitting layer, to allow described second semiconductor layer and described carrier form electric joining.
5. manufacture method of vertical LED as claimed in claim 1 is characterized in that, engage the step of described second semiconductor layer and a carrier via a crystal grain connection process before, also comprise a step, it is to form one second knitting layer on described carrier.
6. manufacture method of vertical LED as claimed in claim 5 is characterized in that, the material that described second knitting layer is adopted is to be selected from one of them of gold, silver, lead, indium, tin, conducting resinl or above-mentioned combination.
7. manufacture method of vertical LED as claimed in claim 5, it is characterized in that, engage the step of described second semiconductor layer and a carrier via a crystal grain connection process, it is to engage with described second semiconductor layer via described second knitting layer, to allow described second semiconductor layer and described carrier form electric joining.
8. manufacture method of vertical LED as claimed in claim 1, it is characterized in that, engage the step of described second semiconductor layer and a carrier via a crystal grain connection process before, also comprise a step, it is to form one first knitting layer on described second semiconductor layer.
9. manufacture method of vertical LED as claimed in claim 8 is characterized in that, the material that described first knitting layer is adopted is one of them of gold, silver, lead, indium, tin, conducting resinl or above-mentioned combination.
10. manufacture method of vertical LED as claimed in claim 8, it is characterized in that, engage the step of described second semiconductor layer and a carrier via a crystal grain connection process, it is to engage with described first knitting layer via described carrier, to allow described second semiconductor layer and described carrier form electric joining.
11. manufacture method of vertical LED as claimed in claim 1 is characterized in that, the material of described carrier is semiconductor, metal and alloy thereof.
12. manufacture method of vertical LED as claimed in claim 1, it is characterized in that described substrate is the chemical element, non-crystalline semiconductor, noncrystal semiconductor of chemical element, the IV-IV family of chemical element, the IV family of chemical element, the II-VI family of III-V family or one of them of above-mentioned combination in any.
13. manufacture method of vertical LED as claimed in claim 1, it is characterized in that, if described first semiconductor layer is the n type gallium nitride based semiconductor, then described second semiconductor layer is for comprising the gallium nitride based semiconductor of P type, if described first semiconductor layer is the gallium nitride based semiconductor of P type, then described second semiconductor layer is for comprising the n type gallium nitride based semiconductor.
14. manufacture method of vertical LED as claimed in claim 1 is characterized in that, carries out in the step of crystal grain connection process, the juncture that adopts hot press, eutectic joint or hot ultrasonic waves to engage is to engage.
15. manufacture method of vertical LED as claimed in claim 1 is characterized in that, removes in the step of described substrate, it adopts the mode of laser lift-off or grinding, to remove.
16. manufacture method of vertical LED as claimed in claim 1, it is characterized in that the method that forms described first semiconductor layer, described luminescent layer, described second semiconductor layer can be chemical vapor deposition, metal organic chemical vapor deposition or plasma-reinforced chemical vapor deposition.
17. manufacture method of vertical LED as claimed in claim 1 is characterized in that, described luminescent layer is a multiple quantum trap structure.
18. manufacture method of vertical LED as claimed in claim 1 is characterized in that, remove the step of described substrate after, also comprise a step, it is a weld pad to be set on described second semiconductor layer.
19. manufacture method of vertical LED as claimed in claim 18 is characterized in that, the step of a weld pad on described second semiconductor layer is set, and also comprises a step, it is to carry out wafer cutting processing procedure.
20. manufacture method of vertical LED as claimed in claim 1, it is characterized in that, engage via a crystal grain connection process in the step of described second semiconductor layer and a carrier, it is with the unit of crystal grain as connection process, is used for each crystal grain of a wafer is engaged described second semiconductor layer and described carrier.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910131552A CN101859846A (en) | 2009-04-07 | 2009-04-07 | Manufacture method of vertical LED |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN200910131552A CN101859846A (en) | 2009-04-07 | 2009-04-07 | Manufacture method of vertical LED |
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| CN101859846A true CN101859846A (en) | 2010-10-13 |
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| CN200910131552A Pending CN101859846A (en) | 2009-04-07 | 2009-04-07 | Manufacture method of vertical LED |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113823589A (en) * | 2020-06-19 | 2021-12-21 | 台湾爱司帝科技股份有限公司 | Red light chip bearing structure and manufacturing method thereof |
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2009
- 2009-04-07 CN CN200910131552A patent/CN101859846A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113823589A (en) * | 2020-06-19 | 2021-12-21 | 台湾爱司帝科技股份有限公司 | Red light chip bearing structure and manufacturing method thereof |
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