JP2016162876A - Semiconductor light-emitting element, and method of manufacturing the same - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor light-emitting element capable of improving a yield and efficiently exhausting heat.SOLUTION: A semiconductor light-emitting element comprises: a support substrate; a first LED layer in which a first n-type semiconductor layer, a first active layer, and a first p-type semiconductor layer are laminated in this order; and a second LED layer in which a second n-type semiconductor layer, a second active layer, and a second p-type semiconductor layer are laminated in this order. The first LED layer is formed at a first surface side of the support substrate, and the second LED layer is formed at a second surface side opposite to the first surface of the support substrate.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor light emitting device and a method for manufacturing the semiconductor light emitting device.

  2. Description of the Related Art Conventionally, as a semiconductor light emitting element that emits light of two wavelengths, one in which two LED elements having different emission wavelengths are arranged and mounted on a mounting substrate such as a lead frame is known.

  With respect to such a semiconductor light emitting device, conventionally, a short wavelength LED chip that emits short wavelength light on the upper surface of a long wavelength LED chip that emits long wavelength light for the purpose of improving the decrease in emission intensity and increasing the efficiency of color mixing. There is a semiconductor light emitting device in which are stacked and mounted (see, for example, Patent Document 1).

  In the semiconductor light emitting device disclosed in Patent Document 1, the short wavelength LED chip is a flat type compatible with flip chip bonding, the short wavelength LED chip is turned over and stacked on the upper surface of the long wavelength LED chip, and the electrode of the long wavelength LED chip Then, after alignment with the electrodes of the short wavelength LED chip, the short wavelength LED chip is flip-chip bonded to the upper surface of the long wavelength LED chip. In this semiconductor light emitting device, long wavelength light emitted from the long wavelength LED chip is transmitted upward through the short wavelength LED chip. Thereby, both the light emitted by the long wavelength LED chip and the light emitted by the short wavelength LED chip are both extracted upward.

JP 2002-43626 A

However, in the semiconductor light-emitting device described in Patent Document 1, accuracy is required for alignment between the electrode of the long wavelength LED chip and the electrode of the short wavelength LED chip, and a short-circuiting or other problem occurs due to a slight misalignment. It will be. Therefore, the yield of the manufactured semiconductor light emitting device is reduced.
In addition, although the long wavelength LED chip can exhaust heat from the entire lower surface, the short wavelength LED chip is a flat type compatible with flip chip bonding and has a configuration in which light is extracted from the upper surface (surface where no electrode is formed). Therefore, a heat exhausting member or the like cannot be provided on the upper surface of the short wavelength LED chip. Therefore, there is a problem that the heat is exhausted only through the electrodes and the heat exhaustion is poor.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a semiconductor light emitting device capable of improving yield and efficiently exhausting heat, and a method for manufacturing the semiconductor light emitting device. Is to provide.

The semiconductor light emitting device according to the present invention is
A support substrate;
A first LED layer in which a first n-type semiconductor layer, a first active layer, and a first p-type semiconductor layer are stacked in this order;
A second LED layer in which a second n-type semiconductor layer, a second active layer, and a second p-type semiconductor layer are stacked in this order;
The first LED layer is formed on a first surface side of the support substrate, and the second LED layer is formed on a second surface side opposite to the first surface of the support substrate. And

According to the configuration, the first LED layer is formed on the first surface side of the support substrate, and the second LED layer is formed on the second surface side opposite to the first surface of the support substrate. . That is, the first LED layer is formed on one surface of one support substrate, and the second LED layer is formed on the other surface. Therefore, when the heat is exhausted from the first LED layer side, the heat of the second LED layer can be exhausted via the support substrate, and when the heat is exhausted from the second LED layer side, the first LED layer is interposed via the support substrate. Can be exhausted.
Further, the first LED layer is formed on one surface of one support substrate, and the second LED layer is formed on the other surface, and the electrodes are formed using two chips in which the LED layer is formed on the support substrate. It is not the structure which joined each other. Therefore, for example, if the second LED layer is bonded to the laminate in which the first LED layer is formed on the first surface side on the support substrate, or the first LED layer and the second LED layer are bonded on the support substrate, The semiconductor light emitting device according to the present invention can be manufactured. Further, since positional accuracy on the order of microns is not required for bonding, an improvement in the yield of the manufactured semiconductor light emitting device can be expected.

  In the configuration of the above-described invention, the support substrate may have translucency.

  When the support substrate has translucency, light emitted from the first LED layer and the second LED layer can be extracted from the same direction.

In the configuration of the invention described above, the first electrode, the first LED layer, the support substrate, the second LED layer, and the second electrode are laminated in this order,
The first LED layer is arranged such that the first p-type semiconductor layer faces the first electrode side, and the first n-type semiconductor layer faces the first surface side of the support substrate,
The second LED layer may be arranged such that the second n-type semiconductor layer faces the second electrode side, and the second p-type semiconductor layer faces the second surface side of the support substrate.

In this case, the first LED layer and the second LED layer are electrically connected in series. If the first LED layer and the second LED layer are electrically connected in parallel, if one of them deteriorates a little compared to the other, the resistance on the deteriorated side becomes small, and a large amount of current flows on that side. Degradation may be accelerated. However, when the first LED layer and the second LED layer are electrically connected in series, the first LED layer and the second LED layer are less likely to be deteriorated than in the parallel case.
In the present specification, “facing” means that the two layers and the electrodes face each other as long as they do not contradict the gist of the present invention. That is, “facing” includes a case where two surfaces are in contact with each other and a case where the two surfaces face each other without contact (for example, a case where the surfaces face each other via another layer or the like). More specifically, for example, “the first p-type semiconductor layer faces the first electrode” means that the first p-type semiconductor layer and the first electrode are in contact with each other, And the case where the first electrode faces the other through another layer or the like.

  In the configuration of the invention described above, the support substrate may be a GaN substrate.

  When the support substrate is a GaN substrate, the first LED layer can be formed (grown) on the GaN substrate in the manufacture of the semiconductor light emitting device.

  In the configuration of the invention described above, the support substrate may be an AlN substrate.

  When the support substrate is an AlN substrate, it has translucency.

In the configuration of the invention described above, the first electrode, the first LED layer, the support substrate, the second LED layer, and the second electrode are laminated in this order,
The first LED layer is an arrangement in which the first n-type semiconductor layer faces the first electrode side, and the first p-type semiconductor layer faces the first surface side of the support substrate,
The second LED layer may be arranged such that the second n-type semiconductor layer faces the second electrode side, and the second p-type semiconductor layer faces the second surface side of the support substrate.

  In this case, for example, if the first LED layer grown on the c-plane sapphire substrate and the second LED layer grown on another c-plane sapphire substrate are bonded to the support substrate, the semiconductor light emitting device can be easily manufactured. can do.

  In the configuration of the invention described above, the support substrate may be an AlN substrate.

  When the support substrate is an AlN substrate, it has translucency.

  In the configuration of the invention described above, the wavelength of the light emitted from the first active layer and the wavelength of the light emitted from the second active layer may be the same.

  If the wavelength of the light emitted from the first active layer is the same as the wavelength of the light emitted from the second active layer, the emission intensity can be improved without increasing the element size.

In the configuration of the invention described above, the first electrode is made of a translucent conductive material,
The first active layer and the second active layer are configured such that light emitted from the first active layer has a shorter wavelength than light emitted from the second active layer,
The second electrode may be a reflective electrode, or the second electrode may be transparent and a reflective layer may be provided in the lower layer.

  In general, light is more easily absorbed at shorter wavelengths. Accordingly, the first active layer that emits short-wavelength light is disposed on the emission surface of the semiconductor light-emitting element, that is, the side close to the first electrode, and short-wavelength light is emitted from the first electrode. If the light is reflected by the second electrode and emitted from the first electrode, the light emission efficiency can be further increased.

In the configuration of the invention described above, the first electrode is made of a light-transmitting conductive material and exposed.
The second electrode may be made of a translucent conductive material and exposed.

  If the first electrode is made of a translucent conductive material and exposed, and the second electrode is made of a translucent conductive material and exposed, the first LED layer is exposed. Light and light from the second LED layer can be emitted in opposite directions.

  In the configuration of the above-described invention, the first LED layer and the second LED layer may be laminated via one support substrate.

  In the configuration of the above-described invention, the shape of the support substrate in plan view may be the same as at least one of the first LED layer and the second LED layer.

Moreover, the method for producing a semiconductor light emitting device of the present invention includes
Preparing a first stacked body having a first n-type semiconductor layer, a first active layer, and a first p-type semiconductor layer;
Preparing a second stacked body having a second n-type semiconductor layer, a second active layer, and a second p-type semiconductor layer; and
It has the process C which bonds together a said 1st laminated body and a said 2nd laminated body.

According to the manufacturing method of the said structure, a semiconductor light-emitting device is manufactured by bonding the said 1st laminated body and the said 2nd laminated body. Since positional accuracy on the order of microns is not required for bonding, an improvement in the yield of the manufactured semiconductor light emitting device can be expected. Further, since the positional accuracy on the micron order is not required for the bonding, the manufacturing becomes easy.
Further, the semiconductor light emitting device manufactured by the manufacturing method can exhaust the heat of the first stacked body and the heat of the second stacked body through the support substrate or the semiconductor growth substrate.

In the configuration of the invention,
Step A includes
Step A1 of preparing a first stacked body in which a first n-type semiconductor layer, a first active layer, and a first p-type semiconductor layer are formed in this order from the first surface side on the first surface side of the support substrate. And
Step B is
A step B1 of preparing a second stacked body in which a second n-type semiconductor layer, a second active layer, a second p-type semiconductor layer, and a bonding layer are formed in this order from below on an upper layer of a semiconductor growth substrate;
Step C includes
A step C1 of bonding the bonding layer of the second stacked body to a second surface opposite to the first surface of the support substrate of the first stacked body;
Furthermore, the method for manufacturing the semiconductor light emitting device includes:
Peeling off the semiconductor growth substrate to expose the second n-type semiconductor layer; and
The structure may include a step E1 of forming the second electrode on the exposed surface of the second n-type semiconductor layer.

According to the manufacturing method of the above configuration, the first LED layer is formed on one surface of one support substrate by bonding the second stack to the second surface of the support substrate of the first stack, A semiconductor light emitting device having the second LED layer formed on the other surface is manufactured. Since positional accuracy on the order of microns is not required for bonding, an improvement in the yield of the manufactured semiconductor light emitting device can be expected. Further, since the positional accuracy on the micron order is not required for the bonding, the manufacturing becomes easy.
Further, when the semiconductor light emitting device manufactured by the manufacturing method exhausts heat from the first LED layer side, the heat of the second LED layer can be exhausted through the support substrate, and the heat is exhausted from the second LED layer side. When doing, the heat | fever of a 1st LED layer can be exhausted via a support substrate.
Further, in the semiconductor light emitting device manufactured by the manufacturing method, the first LED layer and the second LED layer are electrically connected in series, and are not easily deteriorated as compared with the case of parallel.

  In the configuration of the invention, after the step E1, a step F1 of dicing and separating into individual semiconductor light emitting elements may be included.

In the configuration of the invention,
Step A includes
Step A2 of preparing a first stacked body in which a first p-type semiconductor layer, a first active layer, a first n-type semiconductor layer, and a first junction layer are formed in this order from the bottom on the first semiconductor growth substrate. And
Step B is
Step B2 of preparing a second stacked body in which a second n-type semiconductor layer, a second active layer, a second p-type semiconductor layer, and a second bonding layer are formed in this order from the bottom on the second semiconductor growth substrate. And
Step C includes
Step C21 of preparing a support substrate,
Step C22 for bonding the first bonding layer of the first laminate to one surface of the support substrate; and
Including the step C23 of bonding the second bonding layer of the second laminate to the other surface of the support substrate;
Furthermore, the method for manufacturing the semiconductor light emitting device includes:
Removing the first semiconductor growth substrate to expose the first p-type semiconductor layer D2,
Peeling off the second semiconductor growth substrate to expose the second n-type semiconductor layer E2,
Forming a first electrode on the exposed surface of the first p-type semiconductor layer, F2, and
The structure may include a step G2 of forming the second electrode on the exposed surface of the second n-type semiconductor layer.

According to the manufacturing method of the said structure, a 1st laminated body is bonded together on one side of a support substrate, a 2nd laminated body is bonded together on the other side, and a 1st LED layer is on one side of one support substrate. A semiconductor light emitting device is manufactured, in which the second LED layer is formed on the other surface. Since positional accuracy on the order of microns is not required for bonding, an improvement in the yield of the manufactured semiconductor light emitting device can be expected. Further, since the positional accuracy on the micron order is not required for the bonding, the manufacturing becomes easy.
Further, when the semiconductor light emitting device manufactured by the manufacturing method exhausts heat from the first LED layer side, the heat of the second LED layer can be exhausted through the support substrate, and the heat is exhausted from the second LED layer side. When doing, the heat | fever of a 1st LED layer can be exhausted via a support substrate.
Further, in the semiconductor light emitting device manufactured by the manufacturing method, the first LED layer and the second LED layer are electrically connected in series, and are not easily deteriorated as compared with the case of parallel.

  In the configuration of the invention, after the step F2 and the step G2, a step H2 of dicing and separating into individual semiconductor light emitting elements may be included.

In the configuration of the invention,
Step A includes
A first stacked body in which a first n-type semiconductor layer, a first active layer, a first p-type semiconductor layer, a third electrode, and a first bonding layer are formed in this order from the bottom on the first semiconductor growth substrate. Step A3 to prepare,
Step B is
Step B3 of preparing a second stacked body in which a second n-type semiconductor layer, a second active layer, a second p-type semiconductor layer, and a second junction layer are formed in this order from the bottom on the second semiconductor growth substrate. And
Step C includes
Step C31 for preparing a support substrate,
A step C32 of bonding the first bonding layer of the first stacked body to one surface of the support substrate; and
Including the step C33 of bonding the second bonding layer of the second laminate to the other surface of the support substrate;
Furthermore, the method for manufacturing the semiconductor light emitting device includes:
Removing the first semiconductor growth substrate to expose the first n-type semiconductor layer D3;
Peeling off the second semiconductor growth substrate to expose the second n-type semiconductor layer; E3;
Forming a first electrode on the exposed surface of the first n-type semiconductor layer, F3; and
The structure may include a step G3 of forming the second electrode on the exposed surface of the second n-type semiconductor layer.

According to the manufacturing method of the said structure, a 1st laminated body is bonded together on one side of a support substrate, a 2nd laminated body is bonded together on the other side, and a 1st LED layer is on one side of one support substrate. A semiconductor light emitting device is manufactured, in which the second LED layer is formed on the other surface. Since positional accuracy on the order of microns is not required for bonding, an improvement in the yield of the manufactured semiconductor light emitting device can be expected. Further, since the positional accuracy on the micron order is not required for the bonding, the manufacturing becomes easy.
Further, when the semiconductor light emitting device manufactured by the manufacturing method exhausts heat from the first LED layer side, the heat of the second LED layer can be exhausted through the support substrate, and the heat is exhausted from the second LED layer side. When doing, the heat | fever of a 1st LED layer can be exhausted via a support substrate.

In the configuration of the invention, after the step F3 and the step G3, a step H3 for dicing and separating into individual elements, and
Step I3 for removing the first electrode, the first n-type semiconductor layer, the first active layer, and the first p-type semiconductor layer from the first electrode side until a partial upper surface of the third electrode is exposed. You may have.

  According to the present invention, it is possible to provide a semiconductor light emitting device capable of improving yield and efficiently exhausting heat, and a method for manufacturing the semiconductor light emitting device.

1 is a schematic cross-sectional view of a semiconductor light emitting element according to a first embodiment. It is process sectional drawing for demonstrating one manufacturing method of the semiconductor light-emitting device shown in FIG. It is process sectional drawing for demonstrating one manufacturing method of the semiconductor light-emitting device shown in FIG. It is process sectional drawing for demonstrating one manufacturing method of the semiconductor light-emitting device shown in FIG. It is process sectional drawing for demonstrating one manufacturing method of the semiconductor light-emitting device shown in FIG. It is process sectional drawing for demonstrating one manufacturing method of the semiconductor light-emitting device shown in FIG. It is process sectional drawing for demonstrating one manufacturing method of the semiconductor light-emitting device shown in FIG. It is a schematic sectional drawing of the semiconductor light-emitting device concerning 2nd Embodiment. FIG. 4 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 3. FIG. 4 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 3. FIG. 4 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 3. FIG. 4 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 3. FIG. 4 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 3. FIG. 4 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 3. It is a schematic sectional drawing of the semiconductor light-emitting device concerning 3rd Embodiment. FIG. 6 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 5. FIG. 6 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 5. FIG. 6 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 5. FIG. 6 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 5. FIG. 6 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 5. FIG. 6 is a process cross-sectional view for explaining a method of manufacturing the semiconductor light emitting element shown in FIG. 5.

  First, an example of a structure of a semiconductor light emitting device assumed by the present invention will be described with reference to the drawings, and then a manufacturing method thereof will be described in detail.

[First Embodiment]
An example of the structure of the semiconductor light emitting device of the first embodiment will be described with reference to FIG. FIG. 1 is a schematic cross-sectional view of a semiconductor light emitting device 1 according to the first embodiment.

[Construction]
The semiconductor light emitting element 1 includes a support substrate 11, a first LED layer 20 formed on the first surface 11a side of the support substrate 11, and a second surface 11b side opposite to the first surface 11a of the support substrate 11. And the second LED layer 30 formed through the bonding layer 17.

(Support substrate 11)
The support substrate 11 is made of a conductive substrate such as CuW, W, Mo, GaN, AlN, or Si. Of these, a light-transmitting substrate such as a GaN substrate is preferable. When the support substrate 11 is a light-transmitting substrate, light emitted from the first LED layer 20 and the second LED layer 30 can be extracted from the same direction.

  Hereinafter, the support substrate 11 is a substrate having translucency, and light emitted from the first LED layer 20 and the second LED layer 30 is transmitted to the first LED layer 20 side (upward direction in FIG. 1, direction of the first electrode 15). ) Will be described. That is, a case where a substrate that has translucency with respect to light emitted from the second LED layer 30 is used as the support substrate 11 will be described. Note that in this specification, the “translucent substrate” refers to a substrate that can transmit 80% or more of light having a wavelength to be transmitted (wavelength to be transmitted).

(First LED layer 20)
The first LED layer 20 has a configuration in which a first n-type semiconductor layer 25, a first active layer 23, and a first p-type semiconductor layer 21 are stacked in this order from the support substrate 11 side. In the first LED layer 20, the first p-type semiconductor layer 21 is in contact with the first electrode 15, and the first n-type semiconductor layer 25 is in contact with the first surface 11 a of the support substrate 11. Is arranged in.

(First n-type semiconductor layer 25)
In the present embodiment, the first n-type semiconductor layer 25 is composed of Al _n Ga _1-n N (0 ≦ n ≦ 1). At least the first n-type semiconductor layer 25 is doped with n-type impurities such as Si, Ge, S, Se, Sn, and Te, and is preferably doped with Si.
The first n-type semiconductor layer 25 is configured with a film thickness of about 0.5 μm to 2 μm.

(First active layer 23)
The first active layer 23 is formed of a semiconductor layer having a multiple quantum well structure in which, for example, a well layer made of InGaN and a barrier layer made of AlGaN are repeated. These layers may be undoped or p-type or n-type doped.

(First p-type semiconductor layer 21)
The first p-type semiconductor layer 21 is made of, for example, Al _m Ga _1-m N (0 ≦ m ≦ 1). At least one of the first p-type semiconductor layers 21 is doped with a p-type impurity such as Mg, Be, Zn, or C.

(First electrode 15)
The first electrode 15 is formed in the upper layer of the first p-type semiconductor layer 21. The first electrode 15 is made of a light-transmitting conductive material such as ITO, IZO, In ₂ O ₃ , SnO ₂ , IGZO (InGaZnO _x ), or ZnO.

(Joining layer 17)
The bonding layer 17 formed in contact with the surface 11b of the support substrate 11 is made of a light-transmitting conductive material such as ITO, for example.

(Second conductive layer 38, second contact layer 37)
A second conductive layer 38 is formed below the bonding layer 17. A contact layer 37 is formed below the second conductive layer 38. The second conductive layer 38 and the second contact layer 37 are provided to realize ohmic connection between the support substrate 11 and the second p-type semiconductor layer 31 of the second LED layer 30. The second conductive layer 38 is made of, for example, ITO. The second conductive layer 38 and the bonding layer 17 are bonded to each other after being opposed to each other. The second contact layer 37 has a higher impurity concentration than a second p-type semiconductor layer 31 described later.
If the ohmic connection between the support substrate 11 and the second p-type semiconductor layer 31 of the second LED layer 30 is realized, the second contact layer 37 may not be provided.

(Second LED layer 30)
A second LED layer 30 is formed below the contact layer 37. The second LED layer 30 has a configuration in which a second p-type semiconductor layer 31, a second active layer 33, and a second n-type semiconductor layer 35 are stacked in this order from the support substrate 11 side. In the second LED layer 30, the second n-type semiconductor layer 35 is in contact with the second electrode 13 so that the second p-type semiconductor layer 31 faces the second surface 11 b surface side of the support substrate 11. Be placed.

(Second n-type semiconductor layer 35)
In the present embodiment, the second n-type semiconductor layer 35 is composed of Al _n Ga _1-n N (0 ≦ n ≦ 1). At least the second n-type semiconductor layer 35 is doped with n-type impurities such as Si, Ge, S, Se, Sn, and Te, and is preferably doped with Si.
The second n-type semiconductor layer 35 has a thickness of about 0.5 μm to 2 μm.

(Second active layer 33)
The second active layer 33 is formed of a semiconductor layer having a multiple quantum well structure in which, for example, a well layer made of InGaN and a barrier layer made of AlGaN are repeated. These layers may be undoped or p-type or n-type doped.

(Second p-type semiconductor layer 31)
The second p-type semiconductor layer 31 is made of, for example, Al _m Ga _1-m N (0 ≦ m ≦ 1). At least one of the second p-type semiconductor layers 31 is doped with a p-type impurity such as Mg, Be, Zn, or C.

(Second electrode 13)
The second electrode 13 is formed below the 2n-type semiconductor layer 35, and for example, a reflective electrode made of Ag-based metal (Ni-Ag alloy), Al, Rh, or the like can be used. In this case, the light emitted from the first LED layer 20 and the second LED layer 30 can be reflected to the first LED layer 20 side (upward in FIG. 1), and the luminous efficiency can be increased.
The second electrode 13 is made of a light-transmitting conductive material such as ITO, IZO, In ₂ O ₃ , SnO ₂ , IGZO (InGaZnO _x ), ZnO, etc., and Ag, Al is formed under the second electrode 13. It is good also as providing the reflection layer comprised with materials, such as. Even with this configuration, the light emitted from the first LED layer 20 and the second LED layer 30 can be reflected toward the first LED layer 20 (upward in FIG. 1), and the luminous efficiency can be increased.
Further, the second electrode 13 may be made of a light-transmitting conductive material, and a reflective layer may not be provided below the second electrode 13 (a form in which the second electrode 13 is exposed). In the case of this configuration, a separate reflector may be installed to reflect light in a desired direction.

In the semiconductor light emitting device 1 according to this embodiment, the first LED layer 20 and the second LED layer 30 are electrically connected in series. If the first LED layer and the second LED layer are electrically connected in parallel, if one of them deteriorates a little compared to the other, the resistance on the deteriorated side becomes small, and a large amount of current flows on that side. Degradation may be accelerated.
Since the 1st LED layer 20 and the 2nd LED layer 30 are electrically connected in series, the semiconductor light-emitting device 1 which concerns on this embodiment is hard to deteriorate compared with the case of parallel.

In the present invention, the wavelength of light emitted from the first active layer and the wavelength of light emitted from the second active layer are not particularly limited, and may be the same or different.
If the wavelength of the light emitted from the first active layer is the same as the wavelength of the light emitted from the second active layer, the emission intensity can be improved without increasing the element size.
Further, if the wavelength of the light emitted from the first active layer is different from the wavelength of the light emitted from the second active layer, light having two different wavelengths can be emitted.
When the wavelength of the light emitted from the first active layer is different from the wavelength of the light emitted from the second active layer, the side closer to the emission surface (in this embodiment, the first electrode 15) (in this embodiment, the first It is preferable that light having a relatively short wavelength is emitted from the first active layer 23) and light having a relatively long wavelength is emitted from the far side (the second active layer 33 in the present embodiment). That is, the first electrode 15 is made of a translucent conductive material, and the first active layer 23 and the second active layer 33 are emitted from the first active layer 23 rather than the light emitted from the second active layer 33. The light is preferably configured to have a shorter wavelength. In general, light is more easily absorbed at shorter wavelengths. Accordingly, the first active layer 23 that emits light having a short wavelength is disposed on the emission surface of the semiconductor light emitting element 1, that is, on the side close to the first electrode 15, and light having a short wavelength is emitted from the first electrode 15. If the long wavelength light is reflected by the second electrode 13 and emitted from the first electrode 15, the light emission efficiency can be further improved.

  In the semiconductor light emitting device 1 according to the present embodiment, the light emitted from the first LED layer 20 and the second LED layer 30 is extracted to the first LED layer 20 side (upward direction in FIG. 1), that is, the first electrode 15 side. It is not taken out from the second electrode 13 side. Therefore, the whole 2nd electrode 13 can be arrange | positioned so that a device may be contacted, and it can exhaust efficiently. Further, the heat of the first LED layer 20 can be exhausted from the second electrode 13 through the entire support substrate 11. Therefore, the semiconductor light emitting device 1 is excellent in exhaust heat performance.

  In the present embodiment, the first LED layer 20 and the second LED layer 30 are laminated via one support substrate 11. That is, the first LED layer 20 and the second LED layer 30 are laminated with only the support substrate 11 interposed therebetween without interposing any other support substrate other than the support substrate 11. Such a configuration can be obtained by a method for manufacturing a semiconductor light emitting element described below.

  In the present embodiment, the shape of the support substrate 11 in plan view is the same as that of the first LED layer 20 and the second LED layer 30. Such a configuration can be obtained by a method for manufacturing a semiconductor light emitting element described below.

[Production method]
Next, a method for manufacturing the semiconductor light emitting device 1 shown in FIG. 1 will be described with reference to process cross-sectional views shown in FIGS. 2A to 2F. The dimensions such as manufacturing conditions and film thickness described below are merely examples, and are not limited to these numerical values.

(Step S1)
As shown in FIG. 2A, a first stacked body 5A is prepared. This step corresponds to step A1 of the present invention. In the first stacked body 5A, the first n-type semiconductor layer 25, the first active layer 23, and the first p-type semiconductor layer 21 are formed in this order from the first surface 11a side on the first surface 11a side of the support substrate 11. It has the structure made. The first stacked body 5A can be manufactured, for example, according to the following procedure.

(Preparation of support substrate 11)
First, the support substrate 11 is prepared. In this embodiment, since a GaN substrate is used as the support substrate 11 and the constituent material of the first n-type semiconductor layer 25 is GaN, it is not necessary to form an undoped layer, but the support substrate is different from the first n-type semiconductor layer. In the case of using a material formed of a constituent material, an undoped layer may be appropriately formed.

(Formation of the first n-type semiconductor layer 25)
Next, a first n-type semiconductor layer 25 made of AlGaN is formed on the support substrate 11. A specific method for forming the first n-type semiconductor layer 25 is, for example, as follows.

The furnace pressure of the MOCVD apparatus is set to 30 kPa in a state where the furnace temperature is 1150 ° C. from room temperature. Then, while flowing nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm as a carrier gas into the processing furnace, TMG having a flow rate of 94 μmol / min, trimethylaluminum (TMA) having a flow rate of 6 μmol / min, Ammonia with a flow rate of 250,000 μmol / min and tetraethylsilane with a flow rate of 0.025 μmol / min are supplied into the treatment furnace for 60 minutes. Thereby, for example, a first n-type semiconductor layer 25 having a composition of Al _0.06 Ga _0.94 N, a Si concentration of 3 × 10 ¹⁹ / cm ³ , and a thickness of 2 μm is formed in the upper layer of the support substrate 11. The

  After that, the first n-type semiconductor having a protective layer made of n-type GaN having a thickness of 5 nm on the upper layer of the n-type AlGaN layer by stopping the supply of TMA and supplying other source gases for 6 seconds. Layer 25 may be implemented.

  In the above description, the case where Si is used as the n-type impurity contained in the first n-type semiconductor layer 25 has been described. However, as the n-type impurity, Ge, S, Se, Sn, Te, or the like may be used in addition to Si. it can.

(Formation of the first active layer 23)
Next, a first active layer 23 having a multiple quantum well structure in which a light emitting layer made of InGaN and a barrier layer made of n-type AlGaN are periodically repeated is formed on the first n-type semiconductor layer 25. A specific method for forming the first active layer 23 is, for example, as follows.

  First, the furnace pressure of the MOCVD apparatus is 100 kPa, and the furnace temperature is 830 ° C. Then, while flowing nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 1 slm as a carrier gas in the processing furnace, TMG having a flow rate of 10 μmol / min, trimethylindium (TMI) having a flow rate of 12 μmol / min, and A step of supplying ammonia at a flow rate of 300,000 μmol / min into the processing furnace for 48 seconds is performed. Thereafter, TMG having a flow rate of 10 μmol / min, TMA having a flow rate of 1.6 μmol / min, tetraethylsilane having a flow rate of 0.002 μmol / min, and ammonia having a flow rate of 300,000 μmol / min are supplied into the processing furnace for 120 seconds. Hereinafter, by repeating these two steps, the first active layer 23 having a multi-quantum well structure of 15 periods with a light emitting layer made of InGaN having a thickness of 2 nm and a barrier layer made of n-type AlGaN having a thickness of 7 nm is obtained. It is formed in the upper layer of the first n-type semiconductor layer 25.

(Formation of the first p-type semiconductor layer 21)
Next, a first p-type semiconductor layer 21 made of AlGaN is formed on the first active layer 23. A specific method for forming the first p-type semiconductor layer 21 is, for example, as follows.

The furnace pressure of the MOCVD apparatus is maintained at 100 kPa, and the furnace temperature is raised to 1025 ° C. while nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 25 slm are allowed to flow into the processing furnace. Thereafter, as source gases, TMG with a flow rate of 35 μmol / min, TMA with a flow rate of 20 μmol / min, ammonia with a flow rate of 250,000 μmol / min, and biscyclopentadiene with a flow rate of 0.1 μmol / min for doping p-type impurities. Enilmagnesium (CP ₂ Mg) is fed into the processing furnace for 60 seconds. Thereby, a hole supply layer having a composition of Al _0.3 Ga _0.7 N having a thickness of 20 nm is formed on the surface of the first active layer 23. Thereafter, by changing the flow rate of TMA to 4 μmol / min and supplying the source gas for 360 seconds, a hole supply layer having a composition of Al _0.13 Ga _0.87 N having a thickness of 120 nm is formed. The first p-type semiconductor layer 21 is formed by these hole supply layers. The p-type impurity concentration of the first p-type semiconductor layer 21 is, for example, about 3 × 10 ¹⁹ / cm ³ .

  In this way, the first n-type semiconductor layer 25, the first active layer 23, and the first p-type semiconductor layer 21 are formed on the support substrate 11.

  Thus, the first stacked body 5A can be obtained.

(Step S2)
On the other hand, as shown to FIG. 2B, the 2nd laminated body 5B is prepared. This step corresponds to step B1 of the present invention. The second stacked body 5B includes an undoped layer 36, a second n-type semiconductor layer 35, a second active layer 33, a second p-type semiconductor layer 31, a second contact layer 37, and a second conductive layer on the semiconductor growth substrate 61. 38 and the bonding layer 17 are formed in this order from the bottom. The 2nd laminated body 5B can be manufactured, for example in the following procedures.

(Preparation of substrate 61 for semiconductor growth)
First, the c-plane sapphire substrate used as the semiconductor growth substrate 61 is cleaned. More specifically, for this cleaning, for example, a semiconductor growth substrate 61 is placed in a processing furnace of a MOCVD (Metal Organic Chemical Vapor Deposition) apparatus, and hydrogen having a flow rate of 10 slm is placed in the processing furnace. While flowing the gas, the temperature in the furnace is raised to, for example, 1150 ° C. In the present embodiment, the semiconductor layer is described as being epitaxially grown on the c-plane of the sapphire substrate. In the present embodiment, a case where a sapphire substrate is used as the semiconductor growth substrate 61 will be described. However, the semiconductor growth substrate in the present invention is not limited to this example, and a GaN substrate, Si substrate, SiC substrate, or GaAs substrate is used. It is good.

(Formation of undoped layer 36)
Next, a low-temperature buffer layer made of GaN is formed on the surface of the semiconductor growth substrate 61, and a base layer made of GaN is further formed thereon. These low-temperature buffer layer and underlayer correspond to the undoped layer 36. A specific method for forming the undoped layer 36 is, for example, as follows.

  First, the furnace pressure of the МОCVD apparatus is 100 kPa, and the furnace temperature is 480 ° C. Then, while flowing nitrogen gas and hydrogen gas with a flow rate of 5 slm respectively as carrier gas into the processing furnace, trimethylgallium (TMG) with a flow rate of 50 μmol / min and ammonia with a flow rate of 250,000 μmol / min are used as the raw material gas in the processing furnace. For 68 seconds. As a result, a low-temperature buffer layer made of GaN having a thickness of 20 nm is formed on the surface of the c-plane sapphire substrate 61.

  Next, the furnace temperature of the MOCVD apparatus is raised to 1150 ° C. Then, while flowing nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm as a carrier gas in the processing furnace, TMG having a flow rate of 100 μmol / min and ammonia having a flow rate of 250,000 μmol / min are introduced into the processing furnace as source gases. Feed for 30 minutes. As a result, a base layer made of GaN having a thickness of 1.7 μm is formed on the surface of the low-temperature buffer layer.

(Formation of the second n-type semiconductor layer 35)
Next, a second n-type semiconductor layer 35 made of AlGaN is formed on the undoped layer 36. A specific method for forming the second n-type semiconductor layer 35 is, for example, as follows.

Subsequently, the furnace pressure of the MOCVD apparatus is set to 30 kPa in a state where the furnace temperature is 1150 ° C. Then, while flowing nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm as a carrier gas into the processing furnace, TMG having a flow rate of 94 μmol / min, trimethylaluminum (TMA) having a flow rate of 6 μmol / min, Ammonia with a flow rate of 250,000 μmol / min and tetraethylsilane with a flow rate of 0.025 μmol / min are supplied into the treatment furnace for 60 minutes. Thereby, for example, a second n-type semiconductor layer 35 having a composition of Al _0.06 Ga _0.94 N, a Si concentration of 3 × 10 ¹⁹ / cm ³ and a thickness of 2 μm is formed on the undoped layer 36. The

  After that, the second n-type semiconductor having a protective layer made of n-type GaN with a thickness of 5 nm on the n-type AlGaN layer by stopping the supply of TMA and supplying other source gases for 6 seconds. Layer 35 may be realized.

In the above description, the case where Si is used as the n-type impurity contained in the second n-type semiconductor layer 35 has been described. However, as the n-type impurity, Ge, S, Se, Sn, Te, or the like other than Si may be used. it can.

(Formation of the second active layer 33)
Next, a second active layer 33 having a multiple quantum well structure in which a light emitting layer made of InGaN and a barrier layer made of n-type AlGaN are periodically repeated is formed on the second n-type semiconductor layer 35. A specific method for forming the second active layer 33 is, for example, as follows.

  First, the furnace pressure of the MOCVD apparatus is 100 kPa, and the furnace temperature is 830 ° C. Then, while flowing nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 1 slm as a carrier gas in the processing furnace, TMG having a flow rate of 10 μmol / min, trimethylindium (TMI) having a flow rate of 12 μmol / min, and A step of supplying ammonia at a flow rate of 300,000 μmol / min into the processing furnace for 48 seconds is performed. Thereafter, TMG having a flow rate of 10 μmol / min, TMA having a flow rate of 1.6 μmol / min, tetraethylsilane having a flow rate of 0.002 μmol / min, and ammonia having a flow rate of 300,000 μmol / min are supplied into the processing furnace for 120 seconds. Hereinafter, by repeating these two steps, the second active layer 33 having a multi-quantum well structure of 15 periods with a light-emitting layer made of InGaN having a thickness of 2 nm and a barrier layer made of n-type AlGaN having a thickness of 7 nm is obtained. It is formed in the upper layer of the second n-type semiconductor layer 35.

(Formation of second p-type semiconductor layer 31 and second contact layer 37)
Next, a second p-type semiconductor layer 31 made of AlGaN is formed on the second active layer 33, and a second contact layer 37 is formed on the second p-type semiconductor layer 31. A specific method for forming the second p-type semiconductor layer 31 and the second contact layer 37 is, for example, as follows.

The furnace pressure of the MOCVD apparatus is maintained at 100 kPa, and the furnace temperature is raised to 1025 ° C. while nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 25 slm are allowed to flow into the processing furnace. Thereafter, as source gases, TMG with a flow rate of 35 μmol / min, TMA with a flow rate of 20 μmol / min, ammonia with a flow rate of 250,000 μmol / min, and biscyclopentadiene with a flow rate of 0.1 μmol / min for doping p-type impurities. Enilmagnesium (CP ₂ Mg) is fed into the processing furnace for 60 seconds. Thereby, a hole supply layer having a composition of Al _0.3 Ga _0.7 N having a thickness of 20 nm is formed on the surface of the second active layer 33. Thereafter, by changing the flow rate of TMA to 4 μmol / min and supplying the source gas for 360 seconds, a hole supply layer having a composition of Al _0.13 Ga _0.87 N having a thickness of 120 nm is formed. The second p-type semiconductor layer 31 is formed by these hole supply layers. The p-type impurity concentration of the second p-type semiconductor layer 31 is, for example, about 3 × 10 ¹⁹ / cm ³ .

Thereafter, the supply of TMA is stopped, the flow rate of CP ₂ Mg is changed to 0.2 μmol / min, and the raw material gas is supplied for 20 seconds, whereby the thickness is about 5 nm and the p-type impurity concentration is 1 × 10. ^A second contact layer 37 made of p-type GaN of about ²⁰ / cm ³ is formed.

  In this way, the undoped layer 36, the second n-type semiconductor layer 35, the second active layer 33, the second p-type semiconductor layer 31, and the second contact layer 37 are formed on the semiconductor growth substrate 61.

  Next, an activation process is performed on the obtained wafer. More specifically, activation is performed at 650 ° C. for 15 minutes in a nitrogen atmosphere using an RTA (Rapid Thermal Anneal) device.

  Next, a second conductive layer 38 is formed on the upper surface of the second contact layer 37.

  Next, the bonding layer 17 is formed on the upper surface of the second conductive layer 38. More specifically, a conductive light-transmitting material such as ITO or IZO is formed to a thickness of 100 nm to 1000 nm by a sputtering method.

  Thus, the second stacked body 5B can be obtained.

(Step S3)
Next, as shown in FIG. 2C, the bonding layer 17 and the second conductive layer 38 of the second stacked body 5B are bonded to the second surface 11b of the support substrate 11 of the first stacked body 5A. This step corresponds to step C1 of the present invention. For bonding the support substrate 11 and the bonding layer 17, a conventionally known method can be adopted. For example, the surface of the support substrate 11 and the surface of the bonding layer 17 are bonded together after being activated by plasma treatment.

(Step S4)
Next, as shown in FIG. 2D, the semiconductor growth substrate 61 is peeled off. More specifically, the semiconductor growth substrate 61 is peeled off by irradiating a KrF excimer laser from the semiconductor growth substrate 61 side to decompose the interface between the semiconductor growth substrate 61 and the undoped layer 36. While the laser passes through the sapphire constituting the semiconductor growth substrate 61, the underlying GaN (undoped layer 36) absorbs the laser, so that this interface is heated to decompose GaN. As a result, the semiconductor growth substrate 61 is peeled off.

  Thereafter, GaN (undoped layer 36) remaining on the wafer is removed by wet etching using hydrochloric acid or the like, or dry etching using an ICP apparatus, and the second n-type semiconductor layer 35 is exposed. This step corresponds to step D1 of the present invention.

(Step S5)
Next, as shown in FIG. 2E, the first electrode 15 is formed on the upper surface of the first p-type semiconductor layer 21. More specifically, a conductive light-transmitting material such as ITO or IZO is formed to a thickness of 100 nm to 1000 nm by a sputtering method. Thereafter, in order to promote recrystallization of the formed conductive translucent material, activation treatment (contact annealing) is performed at 600 ° C. for 5 minutes in a nitrogen atmosphere using an RTA apparatus.
In addition, the second electrode 13 is formed on the upper surface of the second n-type semiconductor layer 35. Specifically, the second electrode 13 is formed by forming a 0.7 nm-thickness Ni and a 120 nm-thickness Ag on the entire surface so as to cover the upper surface of the second n-type semiconductor layer 35 with a sputtering apparatus. . The second electrode 13 functions as a reflective electrode. Next, contact annealing is performed at 400 ° C. for 2 minutes in a dry air atmosphere using an RTA apparatus. This step corresponds to step E1 of the present invention.

(Step S6)
Thereafter, as shown in FIG. 2F, the light is diced by a laser dicing apparatus or the like and separated into individual semiconductor light emitting elements 1. This step corresponds to step F1 of the present invention.

  Thus, the semiconductor light emitting element 1 is obtained.

  According to the method for manufacturing a semiconductor light emitting element according to this embodiment, the first stacked body 5A and the second stacked body 5B are bonded together, and then diced to obtain individual semiconductor light emitting elements 1. The bonding of the first stacked body 5A and the second stacked body 5B does not require micron-order positional accuracy, and simply bonds the two surfaces. Therefore, manufacture is easy. Moreover, the improvement of the yield of the semiconductor light-emitting device manufactured can be expected.

In the above-described embodiment, the case where the light emitted from the first LED layer 20 and the second LED layer 30 is extracted to the first LED layer 20 side (upward in FIG. 1) has been described. That is, the case where the configuration other than the second electrode 13 is basically composed of a transparent material has been described.
However, the present invention is not limited to this example. The light emitted from the first LED layer 20 is upward in FIG. 1, the light emitted from the second LED layer 30 is downward in FIG. The light emitted from the first LED layer 20 and the second LED layer 30 may be emitted in opposite directions.
In this case, for example, the bonding layer 17 may not be made of a translucent material. For example, you may be comprised by Au-Sn, Au-In, Au-Cu-Sn, Cu-Sn, Pd-Sn, Sn, etc. In this case, the bonding of the first stacked body 5A and the second stacked body 5B can be performed under pressure (for example, 0.2 MPa) under heating conditions (for example, 280 ° C.).

[Second Embodiment]
An example of the structure of the semiconductor light emitting device of the second embodiment will be described with reference to FIG. FIG. 3 is a schematic cross-sectional view of the semiconductor light emitting device 2 according to the second embodiment.

[Construction]
The semiconductor light emitting device 2 includes a support substrate 111, a first LED layer 120 formed on the one surface 111a side of the support substrate 111 via a first bonding layer 116, and a surface 111a of the support substrate 111, which is the other surface 111b. And a second LED layer 130 formed on the side through a second bonding layer 117.

(Support substrate 111)
The support substrate 111 is made of a conductive substrate such as CuW, W, Mo, GaN, AlN, or Si. Among these, a substrate having translucency such as an AlN substrate is preferable. When the support substrate 111 is a light-transmitting substrate, light emitted from the first LED layer 120 and the second LED layer 130 can be extracted from the same direction.

  Hereinafter, a case where the support substrate 111 is a light-transmitting substrate and light emitted from the first LED layer 120 and the second LED layer 130 is extracted to the first LED layer 120 side (upward in FIG. 3) will be described. .

(First bonding layer 116)
The first bonding layer 116 formed in contact with the surface 111a of the support substrate 111 is made of a light-transmitting conductive material such as ITO, for example. As will be described later, the first bonding layer 116 is formed by pasting the surface 111a of the support substrate 111 and the first bonding layer 116 formed on another substrate and then bonding them together. is there.

(First conductive layer 128, first contact layer 127)
A first conductive layer 128 is formed on the first bonding layer 116. A first contact layer 127 is formed on the first conductive layer 128. The first conductive layer 128 and the first contact layer 127 are provided to realize ohmic connection between the support substrate 111 and the first n-type semiconductor layer 125 of the first LED layer 120. The first conductive layer 128 is made of a light-transmitting conductive material such as ITO, IZO, In ₂ O ₃ , SnO ₂ , or IGZO (InGaZnO _x ). The first contact layer 127 has a higher impurity concentration than a first n-type semiconductor layer 125 described later.
Note that the first conductive layer 128 and the first contact layer 127 may not be provided as long as an ohmic connection between the support substrate 111 and the first n-type semiconductor layer 125 of the first LED layer 120 is realized.

(First LED layer 120)
A first LED layer 120 is formed on the first contact layer 127. The first LED layer 120 has a configuration in which a first n-type semiconductor layer 125, a first active layer 123, and a first p-type semiconductor layer 121 are stacked in this order from the support substrate 111 side. The first LED layer 120 is disposed in such a positional relationship that the first p-type semiconductor layer 121 is in contact with and faces the first electrode 115, and the first n-type semiconductor layer 125 faces the surface 111 a side of the support substrate 111. .

(First n-type semiconductor layer 125)
In the present embodiment, the first n-type semiconductor layer 125 is composed of Al _n Ga _1-n N (0 ≦ n ≦ 1). At least the first n-type semiconductor layer 125 is doped with an n-type impurity such as Si, Ge, S, Se, Sn, or Te, and is preferably doped with Si.
The first n-type semiconductor layer 125 has a thickness of about 0.5 μm to 2 μm.

(First active layer 123)
The first active layer 123 is formed of a semiconductor layer having a multiple quantum well structure in which, for example, a well layer made of InGaN and a barrier layer made of AlGaN are repeated. These layers may be undoped or p-type or n-type doped.

(First p-type semiconductor layer 121)
The first p-type semiconductor layer 121 is made of, for example, Al _m Ga _1-m N (0 ≦ m ≦ 1). At least one of the first p-type semiconductor layers 121 is doped with p-type impurities such as Mg, Be, Zn, and C.

(First electrode 115)
The first electrode 115 is formed on the upper layer of the first p-type semiconductor layer 121. The first electrode 115 is made of a translucent conductive material such as ITO, IZO, In ₂ O ₃ , SnO ₂ , or IGZO (InGaZnO _x ) ZnO.

(Second bonding layer 117)
The second bonding layer 117 formed in contact with the surface 111b of the support substrate 111 is made of a light-transmitting conductive material such as ITO, for example.

(Second conductive layer 138, second contact layer 137)
A second conductive layer 138 is formed below the bonding layer 117. A contact layer 137 is formed below the second conductive layer 138. The second conductive layer 138 and the second contact layer 137 are provided to realize ohmic connection between the support substrate 111 and the second p-type semiconductor layer 131 of the second LED layer 130. The second conductive layer 138 is made of, for example, ITO. The second conductive layer 138 and the bonding layer 117 are bonded to each other after they are opposed to each other. The second contact layer 137 has an impurity concentration higher than that of a second p-type semiconductor layer 131 described later.
If the ohmic connection between the support substrate 111 and the second p-type semiconductor layer 131 of the second LED layer 130 is realized, the second conductive layer 138 and the second contact layer 137 may not be provided.

(Second LED layer 130)
A second LED layer 130 is formed below the second contact layer 137. The second LED layer 130 has a configuration in which a second p-type semiconductor layer 131, a second active layer 133, and a second n-type semiconductor layer 135 are stacked in this order from the support substrate 111 side. The second LED layer 130 is arranged in such a positional relationship that the second n-type semiconductor layer 135 is in contact with the second electrode 113 so that the second p-type semiconductor layer 131 faces the surface 111b side of the support substrate 111.

(Second n-type semiconductor layer 135, second active layer 133, second p-type semiconductor layer 131)
The second n-type semiconductor layer 135, the second active layer 133, and the second p-type semiconductor layer 131 are the second n-type semiconductor layer 35, the second active layer 33, and the second p-type semiconductor described in the section of the first embodiment, respectively. A configuration similar to that of the layer 31 can be employed. Therefore, the description here is omitted.

(Second electrode 113)
The second electrode 113 is formed below the second n-type semiconductor layer 135. As the 2nd electrode 113, the structure similar to the 2nd electrode 13 demonstrated by the term of 1st Embodiment is employable. Therefore, the description here is omitted.

  In the semiconductor light emitting device 2 according to the present embodiment, the first LED layer 120 and the second LED layer 130 are electrically connected in series, and therefore, the semiconductor light emitting device 2 is less likely to be deteriorated as compared to the parallel case.

[Production method]
Next, a method for manufacturing the semiconductor light emitting device 2 shown in FIG. 3 will be described with reference to process cross-sectional views shown in FIGS. 4A to 4F. The dimensions such as manufacturing conditions and film thickness described below are merely examples, and are not limited to these numerical values.

(Step S11)
As shown to FIG. 4A, the 1st laminated body 6A is prepared. This step corresponds to step A2 of the present invention. The first stacked body 6A includes an undoped layer 126, a first p-type semiconductor layer 121, a first active layer 123, a first n-type semiconductor layer 125, a first contact layer 127, a first layer on the first semiconductor growth substrate 160. The conductive layer 128 and the first bonding layer 116 are formed in this order from the bottom. 6 A of 1st laminated bodies can be manufactured, for example in the following procedures.

(Preparation of the first semiconductor growth substrate 160)
First, the sapphire substrate used as the first semiconductor growth substrate 160 is cleaned. More specifically, for this cleaning, for example, the first semiconductor growth substrate 160 is disposed in a processing furnace of a MOCVD (Metal Organic Chemical Vapor Deposition) apparatus, and the flow rate is 10 slm in the processing furnace. The furnace temperature is raised to, for example, 1150 ° C. while flowing hydrogen gas. In the present embodiment, the semiconductor layer is described as being epitaxially grown on the C surface of the sapphire substrate. In this embodiment, a case where a sapphire substrate is used as the first semiconductor growth substrate 160 will be described. However, the first semiconductor growth substrate in the present invention has a p-type semiconductor layer (first p-type semiconductor layer) as an upper layer, an active layer. The layer is not limited to this example as long as the layer (first active layer) and the n-type semiconductor layer (first n-type semiconductor layer) can be grown in this order.

(Formation of undoped layer 126)
Next, an undoped layer 126 is formed on the surface of the first semiconductor growth substrate 161. A specific method for forming the undoped layer 126 is, for example, as follows.

  First, the furnace pressure of the МОCVD apparatus is 100 kPa, and the furnace temperature is 480 ° C. Then, while flowing nitrogen gas and hydrogen gas with a flow rate of 5 slm respectively as carrier gas into the processing furnace, trimethylgallium (TMG) with a flow rate of 50 μmol / min and ammonia with a flow rate of 250,000 μmol / min are used as the raw material gas in the processing furnace. For 68 seconds. As a result, a low-temperature buffer layer made of GaN having a thickness of 20 nm is formed on the surface of the c-plane sapphire substrate 61.

(Formation of the first p-type semiconductor layer 121)
Next, a first p-type semiconductor layer 121 made of AlGaN is formed on the undoped layer 126. A specific method for forming the first p-type semiconductor layer 121 is, for example, as follows.

The furnace pressure of the MOCVD apparatus is maintained at 100 kPa, and the furnace temperature is raised to 1025 ° C. while nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 25 slm are allowed to flow into the processing furnace. Thereafter, as source gases, TMG with a flow rate of 35 μmol / min, TMA with a flow rate of 20 μmol / min, ammonia with a flow rate of 250,000 μmol / min, and biscyclopentadiene with a flow rate of 0.1 μmol / min for doping p-type impurities. Enilmagnesium (CP ₂ Mg) is fed into the processing furnace for 60 seconds. Thereby, a hole supply layer having a composition of Al _0.3 Ga _0.7 N having a thickness of 20 nm is formed on the surface of the undoped layer 126. Thereafter, by changing the flow rate of TMA to 4 μmol / min and supplying the source gas for 360 seconds, a hole supply layer having a composition of Al _0.13 Ga _0.87 N having a thickness of 120 nm is formed. The first p-type semiconductor layer 121 is formed by these hole supply layers. The p-type impurity concentration of the first p-type semiconductor layer 121 is, for example, about 3 × 10 ¹⁹ / cm ³ .

(Formation of the first active layer 123)
Next, a first active layer 123 having a multiple quantum well structure in which a light emitting layer made of InGaN and a barrier layer made of n-type AlGaN are periodically repeated is formed on the first p-type semiconductor layer 121. A specific method for forming the first active layer 123 is, for example, as follows.

  First, the furnace pressure of the MOCVD apparatus is 100 kPa, and the furnace temperature is 830 ° C. Then, while flowing nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 1 slm as a carrier gas in the processing furnace, TMG having a flow rate of 10 μmol / min, trimethylindium (TMI) having a flow rate of 12 μmol / min, and A step of supplying ammonia at a flow rate of 300,000 μmol / min into the processing furnace for 48 seconds is performed. Thereafter, TMG having a flow rate of 10 μmol / min, TMA having a flow rate of 1.6 μmol / min, tetraethylsilane having a flow rate of 0.002 μmol / min, and ammonia having a flow rate of 300,000 μmol / min are supplied into the processing furnace for 120 seconds. Hereinafter, by repeating these two steps, the first active layer 123 having a multi-quantum well structure of 15 periods with a light emitting layer made of InGaN having a thickness of 2 nm and a barrier layer made of n-type AlGaN having a thickness of 7 nm is obtained. It is formed in the upper layer of the first p-type semiconductor layer 121.

(Formation of the first n-type semiconductor layer 125)
Next, a first n-type semiconductor layer 125 made of AlGaN is formed on the first active layer 123, and a first contact layer 127 is formed on the first n-type semiconductor layer 125. A specific method for forming the first n-type semiconductor layer 125 and the first contact layer 127 is, for example, as follows.

Subsequently, with the furnace temperature set at 830 ° C., the furnace pressure of the MOCVD apparatus is set to 30 kPa. Then, while flowing nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm as a carrier gas into the processing furnace, TMG having a flow rate of 94 μmol / min, trimethylaluminum (TMA) having a flow rate of 6 μmol / min, Ammonia with a flow rate of 250,000 μmol / min and tetraethylsilane with a flow rate of 0.025 μmol / min are supplied into the treatment furnace for 60 minutes. Thereby, for example, the first n-type semiconductor layer 125 having a composition of Al _0.06 Ga _0.94 N, a Si concentration of 3 × 10 ¹⁹ / cm ³ , and a thickness of 2 μm is formed.

Thereafter, the supply of TMA is stopped, the flow rate of CP ₂ Mg is changed to 0.2 μmol / min, and the raw material gas is supplied for 20 seconds, whereby the thickness is about 5 nm and the p-type impurity concentration is 1 × 10. ^A first contact layer 127 made of p-type GaN of about ²⁰ / cm ³ is formed.

  Next, an activation process is performed on the obtained wafer. More specifically, activation is performed at 650 ° C. for 15 minutes in a nitrogen atmosphere using an RTA (Rapid Thermal Anneal) device.

  Next, the first conductive layer 128 is formed on the upper surface of the first contact layer 127.

  Next, the first bonding layer 116 is formed on the upper surface of the first conductive layer 128. More specifically, a conductive light-transmitting material such as ITO or IZO is formed to a thickness of 100 nm to 1000 nm by a sputtering method.

  Thus, the first stacked body 6A can be obtained.

(Step S12)
On the other hand, as shown to FIG. 4B, the 2nd laminated body 6B is prepared. This step corresponds to step B2 of the present invention. The second stacked body 6B includes an undoped layer 136, a second n-type semiconductor layer 135, a second active layer 133, a second p-type semiconductor layer 131, a second contact layer 137, a second layer on the second semiconductor growth substrate 161. The conductive layer 138 and the second bonding layer 117 are formed in this order from the bottom. The 2nd laminated body 6B can be manufactured in the procedure similar to the 2nd laminated body 5B which concerns on 1st Embodiment. Therefore, the description here is omitted.

(Step S13)
Next, the support substrate 111 is prepared. This step corresponds to step C21 of the present invention. Then, as illustrated in FIG. 4C, the first bonding layer 116 of the first stacked body 6 </ b> A is bonded to one surface 111 a of the support substrate 111. This step corresponds to step C22 of the present invention. In addition, the second bonding layer 117 of the second stacked body 6B is bonded to the other surface 111b of the support substrate 111. This step corresponds to step C23 of the present invention. For the bonding of the support substrate 111 and the first bonding layer 116 and the bonding of the support substrate 111 and the second bonding layer 117, the same method as that described in the section of the first embodiment is employed. Can do.

(Step S14)
Next, as shown in FIG. 4D, the first semiconductor growth substrate 160 is peeled off to expose the first p-type semiconductor layer 121. This step corresponds to step D2 of the present invention. Also, the second semiconductor growth substrate 161 is peeled off to expose the second n-type semiconductor layer 135. This step corresponds to step E2 of the present invention. A method of peeling the first semiconductor growth substrate 160 to expose the first p-type semiconductor layer 121 and a method of peeling the second semiconductor growth substrate 161 to expose the second n-type semiconductor layer 135 include: A method similar to the method described in the section of the embodiment can be employed.

(Step S15)
Next, as illustrated in FIG. 4E, the first electrode 115 is formed on the upper surface of the first p-type semiconductor layer 121. This step corresponds to step F2 of the present invention. In addition, the second electrode 113 is formed on the upper surface of the second n-type semiconductor layer 135. This step corresponds to step G2 of the present invention.
The method for forming the first electrode 115 on the upper surface of the first p-type semiconductor layer 121 and the method for forming the second electrode 113 on the upper surface of the second n-type semiconductor layer 135 are the methods described in the section of the first embodiment. The same method can be adopted.

(Step S16)
Thereafter, as shown in FIG. 4F, the light is diced by a laser dicing apparatus or the like and separated into individual semiconductor light emitting elements 2. This step corresponds to step H2 of the present invention.

  Thus, the semiconductor light emitting element 2 is obtained.

[Third Embodiment]
An example of the structure of the semiconductor light emitting device of the third embodiment will be described with reference to FIG. FIG. 5 is a schematic cross-sectional view of the semiconductor light emitting device 3 according to the third embodiment.

[Construction]
The semiconductor light emitting device 3 includes a support substrate 211, a first LED layer 220 formed on the one surface 211a side of the support substrate 211 via a first bonding layer 216, and a surface 211a of the support substrate 211, the other surface 211b. And a second LED layer 230 formed on the side through a second bonding layer 217.

(Support substrate 211)
As the support substrate 211, a configuration similar to that of the support substrate 111 described in the second embodiment can be employed. Therefore, the description here is omitted.

  Hereinafter, a case where the support substrate 211 is a light-transmitting substrate and light emitted from the first LED layer 220 and the second LED layer 230 is extracted to the first LED layer 220 side (upward in FIG. 5) will be described. .

(First bonding layer 216)
The first bonding layer 216 formed in contact with the surface 211a of the support substrate 211 is made of a light-transmitting conductive material such as ITO, for example. The first bonding layer 216 is formed by attaching the surface 211a of the support substrate 211 and the first bonding layer 216 formed on another substrate to each other and then bonding them together.

(Third electrode 228, first contact layer 227)
A third electrode 228 is formed on the first bonding layer 216. A first contact layer 227 is formed on the third electrode 228. The first contact layer 227 is provided to realize an ohmic connection between the third electrode 228 and the first p-type semiconductor layer 221 of the first LED layer 220. The third electrode 228 is made of a light-transmitting conductive material such as ITO, IZO, In ₂ O ₃ , SnO ₂ , or IGZO (InGaZnO _x ). The first contact layer 227 has a higher impurity concentration than a first p-type semiconductor layer 221 described later.
Note that the first contact layer 227 may not be provided if the ohmic connection between the third electrode 228 and the first p-type semiconductor layer 221 of the first LED layer 220 is realized.

(First LED layer 220)
A first LED layer 220 is formed on the first contact layer 227. The first LED layer 220 has a configuration in which a first p-type semiconductor layer 221, a first active layer 223, and a first n-type semiconductor layer 225 are stacked in this order from the support substrate 211 side. In the first LED layer 220, the first n-type semiconductor layer 225 is in contact with and opposed to the first electrode 215, and the first p-type semiconductor layer 221 is disposed in a positional relationship facing the surface 211 a side of the support substrate 211. .

(First p-type semiconductor layer 221)
The first p-type semiconductor layer 221 is made of, for example, Al _m Ga _1-m N (0 ≦ m ≦ 1). At least one of the first p-type semiconductor layers 221 is doped with a p-type impurity such as Mg, Be, Zn, or C.

(First active layer 223)
The first active layer 223 is formed of a semiconductor layer having a multiple quantum well structure in which, for example, a well layer made of InGaN and a barrier layer made of AlGaN are repeated. These layers may be undoped or p-type or n-type doped.

(First n-type semiconductor layer 225)
In the present embodiment, the first n-type semiconductor layer 225 is composed of Al _n Ga _1-n N (0 ≦ n ≦ 1). At least the first n-type semiconductor layer 225 is doped with n-type impurities such as Si, Ge, S, Se, Sn, and Te, and is preferably doped with Si.
The first n-type semiconductor layer 225 has a thickness of about 0.5 μm to 1 μm.

(First electrode 215)
The first electrode 215 is formed on the first n-type semiconductor layer 225. The first electrode 215 is made of a light-transmitting conductive material such as ITO, IZO, In ₂ O ₃ , SnO ₂ , or IGZO (InGaZnO _x ).

(Second bonding layer 217)
The second bonding layer 217 formed in contact with the surface 211b of the support substrate 211 is made of a light-transmitting conductive material such as ITO, for example.

(Second conductive layer 238, second contact layer 237)
A second conductive layer 238 is formed below the bonding layer 217. A contact layer 237 is formed below the second conductive layer 238. The second conductive layer 238 and the second contact layer 237 are provided to realize ohmic connection between the support substrate 211 and the second p-type semiconductor layer 231 of the second LED layer 230. The second conductive layer 238 is made of, for example, ITO. After the second conductive layer 238 and the bonding layer 217 face each other, they are bonded together by bonding them together. The second contact layer 237 has an impurity concentration higher than that of a second p-type semiconductor layer 231 described later.
Note that the second conductive layer 238 and the second contact layer 237 are not necessarily provided as long as the ohmic connection between the support substrate 211 and the second p-type semiconductor layer 231 of the second LED layer 230 is realized.

(Second LED layer 230)
A second LED layer 230 is formed below the second contact layer 237. The second LED layer 230 has a configuration in which a second p-type semiconductor layer 231, a second active layer 233, and a second n-type semiconductor layer 235 are stacked in this order from the support substrate 211 side. In the second LED layer 230, the second n-type semiconductor layer 235 is in contact with the second electrode 213 so that the second p-type semiconductor layer 231 faces the surface 211 b of the support substrate 211.

(Second n-type semiconductor layer 235, second active layer 233, second p-type semiconductor layer 231)
As the second n-type semiconductor layer 235, the second active layer 233, and the second p-type semiconductor layer 231, the second n-type semiconductor layer 35, the second active layer 33, and the second p-type semiconductor described in the section of the first embodiment, respectively. A configuration similar to that of the layer 31 can be employed. Therefore, the description here is omitted.

(Second electrode 213)
The second electrode 213 is formed below the second n-type semiconductor layer 235. As the 2nd electrode 213, the structure similar to the 2nd electrode 13 demonstrated by the term of 1st Embodiment is employable. Therefore, the description here is omitted.

  In the semiconductor light emitting device 3 according to this embodiment, the first electrode 215 and the second electrode 213 are N electrodes, and the third electrode 228 is a P electrode.

[Production method]
Next, a method for manufacturing the semiconductor light emitting device 3 shown in FIG. 5 will be described with reference to process cross-sectional views shown in FIGS. 6A to 6F. The dimensions such as manufacturing conditions and film thickness described below are merely examples, and are not limited to these numerical values.

(Step S21)
As shown to FIG. 6A, the 1st laminated body 7A is prepared. This step corresponds to step A3 of the present invention. The first stacked body 7A includes an undoped layer 226, a first n-type semiconductor layer 225, a first active layer 223, a first p-type semiconductor layer 221, a first contact layer 227, a third layer on the first semiconductor growth substrate 260. The electrode 228 and the first bonding layer 216 are configured in this order from the bottom.

  Regarding the method of forming the undoped layer 226, the first n-type semiconductor layer 225, the first active layer 223, the first p-type semiconductor layer 221, and the first contact layer 227 on the first semiconductor growth substrate 260, The method described in the section of the preparation of the second stacked body 5B according to the embodiment, that is, the undoped layer 36, the second n-type semiconductor layer 35, the second active layer 33, and the second p-type are formed on the semiconductor growth substrate 61. A method similar to the method of forming the semiconductor layer 31 and the second contact layer 37 can be employed.

  After the formation of the first contact layer 227, a third electrode 228 is formed on the upper surface of the first contact layer 227.

  Next, the first bonding layer 216 is formed on the upper surface of the third electrode 228. More specifically, a conductive light-transmitting material such as ITO or IZO is formed to a thickness of 100 nm to 1000 nm by a sputtering method.

  Thus, the first stacked body 7A can be obtained.

(Step S22)
On the other hand, as shown to FIG. 6B, the 2nd laminated body 7B is prepared. This step corresponds to step B3 of the present invention. The second stacked body 7B includes an undoped layer 236, a second n-type semiconductor layer 235, a second active layer 233, a second p-type semiconductor layer 231, a second contact layer 237, and a second layer on the second semiconductor growth substrate 261. The conductive layer 238 and the second bonding layer 217 are configured in this order from the bottom. The 2nd laminated body 7B can be manufactured in the procedure similar to the 2nd laminated body 5B which concerns on 1st Embodiment. Therefore, the description here is omitted.

In the present embodiment, when the wavelength of the light emitted from the first active layer 223 is different from the wavelength of the light emitted from the second active layer 233, it is included in the light emitting layer constituting the first active layer 223. The contents of In and the In contained in the light emitting layer constituting the second active layer 233 may be different from each other.
In addition, when the wavelength of the light emitted from the first active layer 223 is the same as the wavelength of the light emitted from the second active layer 233, the In contained in the light emitting layer constituting the first active layer 223 is used. The content and the content of In contained in the light emitting layer constituting the second active layer 233 may be the same. In this case, two first stacked bodies 7A may be prepared and one may be used as the second stacked body 7B.

(Step S23)
Next, the support substrate 211 is prepared. This step corresponds to step C31 of the present invention. Then, as illustrated in FIG. 6C, the first bonding layer 216 of the first stacked body 7 </ b> A is bonded to one surface 211 a of the support substrate 211. This step corresponds to step C32 of the present invention. The second bonding layer 217 of the second stacked body 7B is bonded to the other surface 211b of the surface 211a of the support substrate 211. This step corresponds to step C33 of the present invention. For the bonding of the support substrate 211 and the first bonding layer 216 and the bonding of the support substrate 211 and the second bonding layer 217, the same method as described in the section of the first embodiment is adopted. Can do.

(Step S24)
Next, as shown in FIG. 6D, the first semiconductor growth substrate 260 is peeled off to expose the first n-type semiconductor layer 225. This step corresponds to step D3 of the present invention. Further, the second semiconductor growth substrate 261 is peeled off to expose the second n-type semiconductor layer 235. This step corresponds to step E3 of the present invention. A method of peeling the first semiconductor growth substrate 260 to expose the first n-type semiconductor layer 225 and a method of peeling the second semiconductor growth substrate 261 to expose the second n-type semiconductor layer 235 include: A method similar to the method described in the section of the embodiment can be employed.

(Step S25)
Next, as illustrated in FIG. 6E, the first electrode 215 is formed on the upper surface of the first n-type semiconductor layer 225. This step corresponds to step F3 of the present invention. Further, the second electrode 213 is formed on the upper surface of the second n-type semiconductor layer 235. This step corresponds to step G3 of the present invention.
The method for forming the first electrode 215 on the upper surface of the first n-type semiconductor layer 225 and the method for forming the second electrode 213 on the upper surface of the second n-type semiconductor layer 235 are the methods described in the section of the first embodiment. The same method can be adopted.

(Step S26)
Next, as shown in FIG. 6F, the wafer is diced by a laser dicing apparatus or the like and separated into individual elements. This step corresponds to step H3 of the present invention.

(Step S27)
Thereafter, from the first electrode 215 side, the first electrode 215, the first n-type semiconductor layer 225, the first active layer 223, the first p-type semiconductor layer 221, and the first electrode 215, until the partial upper surface of the third electrode 228 is exposed. One contact layer 227 is removed (see FIG. 5). This step corresponds to step I3 of the present invention. For example, the first electrode 215, the first n-type semiconductor layer 225, the first active layer 223, the first p-type semiconductor layer 221, and the first contact layer 227 are integrated into the ICP until a part of the upper surface of the third electrode 228 is exposed. It is removed by dry etching using an apparatus.

  Thus, the semiconductor light emitting element 3 is obtained.

  Note that the order of step S25 and step S27 may be interchanged. That is, after removing the first n-type semiconductor layer 225, the first active layer 223, the first p-type semiconductor layer 221, and the first contact layer 227 until a part of the upper surface of the third electrode 228 is exposed in step S25, After dicing in step S26 to separate individual elements, in step S27, the first electrode 215 is formed on the upper surface of the first n-type semiconductor layer 225, and the second electrode 213 is formed on the upper surface of the second n-type semiconductor layer 235. You can also.

In the above-described embodiment, in the first embodiment, the “step A of preparing the first stacked body including the first n-type semiconductor layer, the first active layer, and the first p-type semiconductor layer” of the present invention is “support”. Step A1 of preparing a first stacked body in which a first n-type semiconductor layer, a first active layer, and a first p-type semiconductor layer are formed in this order from the first surface side on the first surface side of the substrate. The “step B of preparing the second stacked body having the second n-type semiconductor layer, the second active layer, and the second p-type semiconductor layer” of the present invention is the “second nn layer on the semiconductor growth substrate”. Step B1 of preparing a second stacked body in which a type semiconductor layer, a second active layer, a second p-type semiconductor layer, and a bonding layer are formed in this order from below, and “the first stacked body and The step C of bonding the second laminate is “the first of the support substrates of the first laminate”. The surface to a second surface opposite case has been described is the second bonding the bonding layer of the laminate process C1. "
In the second embodiment, the “step A for preparing the first stacked body having the first n-type semiconductor layer, the first active layer, and the first p-type semiconductor layer” of the present invention is “for first semiconductor growth”. A step A2 "of preparing a first stacked body in which a first p-type semiconductor layer, a first active layer, a first n-type semiconductor layer, and a first bonding layer are formed in this order from below on an upper layer of a substrate; The “step B of preparing the second stacked body having the second n-type semiconductor layer, the second active layer, and the second p-type semiconductor layer” of the invention is “the second n-type semiconductor is formed on the second semiconductor growth substrate. Step B2 of preparing a second stacked body in which a layer, a second active layer, a second p-type semiconductor layer, and a second bonding layer are formed in this order from below, and “the first stacked body and The step C of bonding the second laminate is “a step C21 of preparing a support substrate, one of the support substrates. A step C22 of bonding the first bonding layer of the first stacked body to the surface, and a step C23 of bonding the second bonding layer of the second stacked body to the other surface of the support substrate. Explained the case.
In the third embodiment, the “step A for preparing the first stacked body having the first n-type semiconductor layer, the first active layer, and the first p-type semiconductor layer” of the present invention is “for the first semiconductor growth. Step A3 of preparing a first stacked body in which a first n-type semiconductor layer, a first active layer, a first p-type semiconductor layer, a third electrode, and a first bonding layer are formed in this order from the bottom on the upper layer of the substrate. In the present invention, “the step B of preparing the second stacked body having the second n-type semiconductor layer, the second active layer, and the second p-type semiconductor layer” is “on the upper layer of the second semiconductor growth substrate, A step B3 of preparing a second stacked body in which the second n-type semiconductor layer, the second active layer, the second p-type semiconductor layer, and the second junction layer are formed in this order from the bottom; “Process C for bonding one laminated body and the second laminated body” is referred to as “Process C31 for preparing support substrate, said support A step of bonding the first bonding layer of the first laminate to the one surface of the plate, and a step of bonding the second bonding layer of the second stack to the other surface of the support substrate. The case of including “C33” has been described.
However, the method for manufacturing the semiconductor light emitting device according to the present invention is not limited to these examples.
A method for manufacturing a semiconductor light emitting device according to the present invention includes:
Preparing a first stacked body having a first n-type semiconductor layer, a first active layer, and a first p-type semiconductor layer;
Preparing a second stacked body having a second n-type semiconductor layer, a second active layer, and a second p-type semiconductor layer; and
What is necessary is just to have the process C which bonds the said 1st laminated body and the said 2nd laminated body.
For example, the stacking order of the first n-type semiconductor layer, the first active layer, and the first p-type semiconductor layer, or the stacking order of the second n-type semiconductor layer, the second active layer, and the second p-type semiconductor layer (formation order). However, the invention is not particularly limited to the first to third embodiments as long as it does not contradict the gist of the present invention.

  In the above-described embodiment, the case where both the first LED layer and the second LED layer are made of a GaN-based material has been described. However, in the present invention, the constituent materials of the first LED layer and the second LED layer are not limited to this example. For example, the first LED layer and the second LED layer may both be made of a GaAs-based material, one of the first LED layer and the second LED layer is made of a GaN-based material, and the other is a GaAs-based material. It may be comprised.

1, 2, 3 Semiconductor light emitting elements 5A, 6A, 7A First stacked bodies 5B, 6B, 7B Second stacked bodies 11, 111, 211 Support substrates 11a, 111a, 211a First surface (one surface) of support substrate
11b, 111b, 211b The second surface (the other surface) opposite to the first surface of the support substrate
13, 113, 213 Second electrode 15, 115, 215 First electrode 116, 216 First bonding layer 17 Bonding layer 117, 217 Second bonding layer 20, 120, 220 First LED layer 21, 121, 221 First p-type semiconductor Layers 23, 123, 223 First active layers 25, 125, 225 First n-type semiconductor layers 127, 227 First contact layer 128 First conductive layer 126, 226 Undoped layer 228 Third electrode 30, 130, 230 Second LED layer 31 131, 231 Second p-type semiconductor layer 33, 133, 233 Second active layer 35, 135, 235 Second n-type semiconductor layer 36, 136, 236 Undoped layer 37, 137, 237 Second contact layer 38, 138, 238 First 2 conductive layers 61, 160, 161, 260, 261 substrate for semiconductor growth

Claims (19)

A support substrate;
A first LED layer in which a first n-type semiconductor layer, a first active layer, and a first p-type semiconductor layer are stacked in this order;
A second LED layer in which a second n-type semiconductor layer, a second active layer, and a second p-type semiconductor layer are stacked in this order;
The first LED layer is formed on a first surface side of the support substrate, and the second LED layer is formed on a second surface side opposite to the first surface of the support substrate. A semiconductor light emitting device.   The semiconductor light emitting element according to claim 1, wherein the support substrate has translucency. The first electrode, the first LED layer, the support substrate, the second LED layer, and the second electrode are laminated in this order,
The first LED layer is arranged such that the first p-type semiconductor layer faces the first electrode side, and the first n-type semiconductor layer faces the first surface side of the support substrate,
The second LED layer is arranged such that the second n-type semiconductor layer faces the second electrode and the second p-type semiconductor layer faces the second surface of the support substrate. The semiconductor light emitting element according to claim 1.   The semiconductor light emitting element according to claim 3, wherein the support substrate is a GaN substrate.   4. The semiconductor light emitting device according to claim 3, wherein the support substrate is an AlN substrate. The first electrode, the first LED layer, the support substrate, the second LED layer, and the second electrode are laminated in this order,
The first LED layer is an arrangement in which the first n-type semiconductor layer faces the first electrode side, and the first p-type semiconductor layer faces the first surface side of the support substrate,
3. The second LED layer is arranged such that the second n-type semiconductor layer faces the second electrode side, and the second p-type semiconductor layer faces the second surface side of the support substrate. The semiconductor light emitting element as described.   The semiconductor light emitting element according to claim 6, wherein the support substrate is an AlN substrate.   8. The semiconductor light emitting element according to claim 1, wherein a wavelength of light emitted from the first active layer is the same as a wavelength of light emitted from the second active layer. 9. The first electrode is made of a translucent conductive material,
The first active layer and the second active layer are configured such that light emitted from the first active layer has a shorter wavelength than light emitted from the second active layer,
The second electrode according to claim 1, wherein the second electrode is a reflective electrode, or the second electrode is transparent and a reflective layer is provided in a lower layer. The semiconductor light-emitting device according to any one of the above. The first electrode is made of a translucent conductive material and exposed,
The semiconductor light-emitting element according to claim 1, wherein the second electrode is made of a light-transmitting conductive material and exposed.   11. The semiconductor light emitting element according to claim 1, wherein the first LED layer and the second LED layer are stacked via one support substrate. 11.   11. The semiconductor light emitting element according to claim 1, wherein a shape of the support substrate in a plan view is the same as at least one of the first LED layer and the second LED layer. Preparing a first stacked body having a first n-type semiconductor layer, a first active layer, and a first p-type semiconductor layer;
Preparing a second stacked body having a second n-type semiconductor layer, a second active layer, and a second p-type semiconductor layer; and
A method of manufacturing a semiconductor light emitting element, comprising a step C of bonding the first stacked body and the second stacked body. Step A includes
Step A1 of preparing a first stacked body in which a first n-type semiconductor layer, a first active layer, and a first p-type semiconductor layer are formed in this order from the first surface side on the first surface side of the support substrate. And
Step B is
A step B1 of preparing a second stacked body in which a second n-type semiconductor layer, a second active layer, a second p-type semiconductor layer, and a bonding layer are formed in this order from below on an upper layer of a semiconductor growth substrate;
Step C includes
A step C1 of bonding the bonding layer of the second stacked body to a second surface opposite to the first surface of the support substrate of the first stacked body;
Furthermore, the method for manufacturing the semiconductor light emitting device includes:
Peeling off the semiconductor growth substrate to expose the second n-type semiconductor layer; and
14. The method of manufacturing a semiconductor light emitting device according to claim 13, further comprising a step E1 of forming a second electrode on the exposed surface of the second n-type semiconductor layer.   The method of manufacturing a semiconductor light emitting element according to claim 14, further comprising a step F1 of dicing and separating into individual semiconductor light emitting elements after the step E1. Step A includes
Step A2 of preparing a first stacked body in which a first p-type semiconductor layer, a first active layer, a first n-type semiconductor layer, and a first junction layer are formed in this order from the bottom on the first semiconductor growth substrate. And
Step B is
Step B2 of preparing a second stacked body in which a second n-type semiconductor layer, a second active layer, a second p-type semiconductor layer, and a second bonding layer are formed in this order from the bottom on the second semiconductor growth substrate. And
Step C includes
Step C21 of preparing a support substrate,
Step C22 for bonding the first bonding layer of the first laminate to one surface of the support substrate; and
Including the step C23 of bonding the second bonding layer of the second laminate to the other surface of the support substrate;
Furthermore, the method for manufacturing the semiconductor light emitting device includes:
Removing the first semiconductor growth substrate to expose the first p-type semiconductor layer D2,
Peeling off the second semiconductor growth substrate to expose the second n-type semiconductor layer E2,
Forming a first electrode on the exposed surface of the first p-type semiconductor layer, F2, and
14. The method of manufacturing a semiconductor light emitting device according to claim 13, further comprising a step G2 of forming a second electrode on the exposed surface of the second n-type semiconductor layer.   16. The method for manufacturing a semiconductor light emitting device according to claim 15, further comprising a step H2 of dicing and separating into individual semiconductor light emitting devices after the step F2 and the step G2. Step A includes
A first stacked body in which a first n-type semiconductor layer, a first active layer, a first p-type semiconductor layer, a third electrode, and a first bonding layer are formed in this order from the bottom on the first semiconductor growth substrate. Step A3 to prepare,
Step B is
Step B3 of preparing a second stacked body in which a second n-type semiconductor layer, a second active layer, a second p-type semiconductor layer, and a second junction layer are formed in this order from the bottom on the second semiconductor growth substrate. And
Step C includes
Step C31 for preparing a support substrate,
A step C32 of bonding the first bonding layer of the first stacked body to one surface of the support substrate; and
Including the step C33 of bonding the second bonding layer of the second laminate to the other surface of the support substrate;
Furthermore, the method for manufacturing the semiconductor light emitting device includes:
Removing the first semiconductor growth substrate to expose the first n-type semiconductor layer D3;
Peeling off the second semiconductor growth substrate to expose the second n-type semiconductor layer; E3;
Forming a first electrode on the exposed surface of the first n-type semiconductor layer, F3; and
14. The method of manufacturing a semiconductor light emitting device according to claim 13, further comprising a step G3 of forming a second electrode on the exposed surface of the second n-type semiconductor layer. After the step F3 and the step G3, a step H3 for dicing and separating into individual elements, and
Step I3 for removing the first electrode, the first n-type semiconductor layer, the first active layer, and the first p-type semiconductor layer from the first electrode side until a partial upper surface of the third electrode is exposed. The method of manufacturing a semiconductor light emitting element according to claim 18, wherein:

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