CN101853229A - Method and device for data transportation, and method of data reading operation and data writing operation - Google Patents
Method and device for data transportation, and method of data reading operation and data writing operation Download PDFInfo
- Publication number
- CN101853229A CN101853229A CN 201010173923 CN201010173923A CN101853229A CN 101853229 A CN101853229 A CN 101853229A CN 201010173923 CN201010173923 CN 201010173923 CN 201010173923 A CN201010173923 A CN 201010173923A CN 101853229 A CN101853229 A CN 101853229A
- Authority
- CN
- China
- Prior art keywords
- data
- word
- write
- read
- words
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Landscapes
- Bus Control (AREA)
Abstract
The embodiment of the invention provides a method and a device for data transportation, and a method of data reading operation and writing operation, in order to improve transportation efficiency. The data transportation method comprises the following steps: configuring a source address, a destination address and transported data length each time; selecting a burst transmission operation type with the longest burst read-write data length to read data from the source address according to the sequence of 16 bytes, 8 bytes,4 bytes and 1 byte and the transported data length; temporarily storing the read data, selecting a burst transmission operation type with the longest burst read-write data length to write the data into byte aligned destination address according to the sequence of 16 bytes, 8 bytes,4 bytes and 1 byte and the byte aligned read-write indicator position difference of the destination address. The invention is suitable for the occasion that the data in a communication device is carried to the destination address from the source address.
Description
Technical field
The present invention relates to data method for carrying and device, relate in particular to method for carrying and device at SoC.
Background technology
Along with wireless communication rate is more and more higher, among the SoC of wireless terminal (System on Chip writes a Chinese character in simplified form SOC (system on a chip)) protocol stack of operation institute data volume to be processed with increasing (as the downlink business of WCDMA by HSDPA 7.2Mbps when the 21Mbps of HSPA+ expands).Real-time for the processing of guarantee agreement stack, all there is hardware accelerator SoC inside at the very big business scenario of data processing usually, the carrying that pending data are need be between a plurality of hardware accelerators and storer frequent poses a big pressure to the system performance of SoC.The classic method that improves the data transporting capacity of SoC just is to use DMA (Direct Memory Access, the direct memory visit), the carrying of special disposal data and copy, in whole process, do not need CPU (CentralProcessing Unit, central processing unit) intervention, thereby discharge the processing power of CPU, promote the handling property of SoC.
At ahb bus (Advanced High-Performance Bus, advanced high performance bus) among the SoC of framework, use traditional DMA to finish data carryings and need configure following register parameters and just can start working, comprising: the use of source, destination address, carrying data total length, burst transfer data type, transmission direction, flow-control mechanism.
Through after the above-mentioned setting, can carry out burst transfers of data, in described burst transfers of data, by the once appointment of each address, with a collection of data of form transmission more than two sections.
Because the SoC chip internal has a plurality of tasks can carry out work simultaneously, before configuration DMA, need be according to system load and demand, CPU calculates the DMA parameter that will dispose.Configuration and computation process comprise step referring to shown in Figure 1: source of configuration, destination address and data carrying length; According to data carrying length computation burst operation type, be configured; Transmission bit wide according to source, the carrying of destination address computational data is configured; Selection is the still outer storer that is set to from the storer to the peripheral hardware; Whether configuration uses Flow Control.
The inventor finds that prior art has following defective at least in realizing process of the present invention: in all configuration parameters at traditional dma controller to what performance had considerable influence be: source, destination address, carrying data total length, burst transfer data type.The parameter that tradition DMA is disposed is all fixed, and be used for the SOC that wireless communication protocol stack is handled, the data carrying is ordinary, size of data does not wait, address arrangement is flexible, the configuration calculated amount is very big, and fixing transport-type also is unfavorable for the lifting of data handling efficiency and the reduction of overall power, so be not suitable for traditional dma operation.
Summary of the invention
The embodiment of the invention provides a kind of data method for carrying, can improve the data handling efficiency.
For solving the problems of the technologies described above, embodiment of the invention data method for carrying adopts following technical scheme:
A kind of data method for carrying comprises step:
The data length of source of configuration address, destination address and each carrying;
According to the length of data to be carried at every turn, carry out data read from source address according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst;
The described data that read are kept in;
To temporary data, poor according to the read-write pointer position that destination address press after the word alignment, according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word data are write the destination address that word aligns.
Embodiment of the invention data method for carrying, the data length that only needs source of configuration address, destination address and each carrying, do not need to calculate the control signal of handling process, and can select suitable burst operation length automatically, do not need to calculate the burst operation type, save the computational load of each configuration, improved the efficient of data carryings.
The embodiment of the invention also provides a kind of data Handling device, can improve the data handling efficiency.
For solving the problems of the technologies described above, embodiment of the invention data Handling device adopts following technical scheme:
A kind of data carrying control device comprises:
Read Controller, writing controller, and the memory buffer that links to each other with writing controller with described Read Controller; Wherein
Described Read Controller, be used to receive the read operation order, according to the length of data to be carried at every turn, carry out data read from source address according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst;
Described memory buffer is used for the described data that described Read Controller reads are kept in;
Described writing controller, be used to receive the write operation order, poor according to the read-write pointer position that destination address is pressed after word aligns, according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst, data temporary in the described memory buffer are write the destination address of word alignment.
Embodiment of the invention data Handling device, the Read Controller basis is the length of data to be carried at every turn, carry out data read according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst from source address, writing controller is then poor according to the read-write pointer position that destination address is pressed after word aligns, according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst, data temporary in the described memory buffer are write the destination address of word alignment.Like this, select suitable burst operation length automatically, do not need to calculate the burst operation type, save the computational load of each configuration, improved the efficient of data carryings.
The embodiment of the invention also provides a kind of read operation method, can improve the efficient of data reading operation.
For solving the problems of the technologies described above, embodiment of the invention data reading operation method adopts following technical scheme:
A kind of data reading operation method comprises step:
Source of configuration address and the data length that at every turn reads;
According to the length of each data to be read, carry out data read from source address according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word.
Embodiment of the invention data reading operation method, only need the data length of source of configuration address and each carrying, and can select suitable burst operation length automatically, do not need to calculate the burst operation type, save the computational load of each configuration, improved the efficient of data reading operation.
The embodiment of the invention also provides a kind of write operation method, can improve the efficient of data write operation.
For solving the problems of the technologies described above, embodiment of the invention data write operation method adopts following technical scheme:
A kind of method of data write operation comprises step:
The data length of configuration purpose address and each write operation;
To the temporary data for the treatment of write operation, poor according to the read-write pointer position that destination address is pressed after the word alignment, data are write the destination address of word alignment according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word.
Embodiment of the invention data write operation method, only need the data length of configuration purpose address and each carrying, and can select suitable burst operation length automatically, do not need to calculate the burst operation type, save the computational load of each configuration, improved the efficient of data write operation.
Description of drawings
In order to be illustrated more clearly in the embodiment of the invention or technical scheme of the prior art, to do to introduce simply to the accompanying drawing of required use in embodiment or the description of the Prior Art below, apparently, accompanying drawing in describing below only is some embodiments of the present invention, for those of ordinary skills, under the prerequisite of not paying creative work, can also obtain other accompanying drawing according to these accompanying drawings.
Fig. 1 is the layoutprocedure synoptic diagram of data Handling device in the prior art;
Fig. 2 is the schematic flow sheet of the embodiment of the invention one data method for carrying;
Fig. 3 is the selection course of burst transfer type in the data read process in the embodiment of the invention one data method for carrying;
Fig. 4 is the selection course of burst transfer type in the data writing process in the embodiment of the invention one data method for carrying;
Figure 5 shows that the word alignment procedure synoptic diagram of destination address when destination address is 2`b01;
Figure 6 shows that the word alignment procedure synoptic diagram of destination address when destination address is 2`b10;
Figure 7 shows that the word alignment procedure synoptic diagram of destination address when destination address is 2`b11;
Fig. 8 is described to be data shift synoptic diagram in the memory buffer in the embodiment of the invention;
Fig. 9 is that remaining data length was the data reading operation process of 28 bytes after destination address word alignd in the embodiment of the invention two;
Figure 10 is that remaining data length was the data write operation process of 28 bytes after destination address word alignd in the embodiment of the invention two;
The data Handling device block diagram that Figure 11 provides for the embodiment of the invention three;
The block diagram of the data Handling device that Figure 12 provides for inventive embodiments four;
The block diagram of Read Controller in the embodiment illustrated in fig. 12 four data Handling devices that provide is provided Figure 13;
The block diagram of writing controller in the embodiment illustrated in fig. 12 four data Handling devices that provide is provided Figure 14.
Embodiment
Below in conjunction with the accompanying drawing in the embodiment of the invention, the technical scheme in the embodiment of the invention is clearly and completely described, obviously, described embodiment only is the present invention's part embodiment, rather than whole embodiment.Based on the embodiment among the present invention, those of ordinary skills belong to the scope of protection of the invention not making the every other embodiment that is obtained under the creative work prerequisite.
Embodiment one
As shown in Figure 2, embodiment of the invention data method for carrying comprises step:
The data length of S11, source of configuration address, destination address and each carrying;
S12, according to the length of data to be carried at every turn, carry out data read according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word from source address;
S13, the described data that will read are kept in;
S14, data to keeping in, poor according to the read-write pointer position that destination address is pressed after the word alignment, data are write the destination address of word alignment according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word.
When carrying out read operation, according to the length of remaining data in the source address type that big bursty data reads of selecting to try one's best.Figure 3 shows that the selection course of burst transfer type among the step S12.Referring to shown in Figure 3, comprise the steps: according to the length of remaining data in the source address type that big bursty data reads of selecting to try one's best
Whether judge remaining data length smaller or equal to 16 words, if judged result is then initiated the transmission that the burst operation type is 16 words for not, if judged result is for being to judge further that then whether remaining data length is smaller or equal to 8 words;
Whether judge remaining data length smaller or equal to 8 words, if judged result is then initiated the transmission that the burst operation type is 8 words for not, if judged result is for being to judge further that then whether remaining data length is smaller or equal to 4 words;
Whether judge remaining data length smaller or equal to 4 words, if judged result is then initiated the transmission that the burst operation type is 4 words for not, if judged result is for being to judge further that then whether remaining data length is smaller or equal to 1 word;
Whether judge remaining data length smaller or equal to 1 word, if judged result is then initiated the transmission that the burst operation type is 1 word for not.
When carrying out write operation, carry out described write operation by the type that big bursty data writes of selecting to try one's best of the read-write pointer position difference after the word alignment according to destination address.Figure 4 shows that the selection course of burst transfer type among the S14.Referring to shown in Figure 4, comprise the steps: by the type that big bursty data writes of selecting to try one's best of the read-write pointer position difference after the word alignment according to destination address
Whether judge read-write pointer position difference smaller or equal to 16 words, if judged result is then initiated the transmission that the burst operation type is 16 words for not, if judged result is for being then further to judge and whether read and write the pointer position difference smaller or equal to 8 words;
Whether judge read-write pointer position difference smaller or equal to 8 words, if judged result is then initiated the transmission that the burst operation type is 8 words for not, if judged result is for being then further to judge and whether read and write the pointer position difference smaller or equal to 4 words;
Whether judge read-write pointer position difference smaller or equal to 4 words, if judged result is then initiated the transmission that the burst operation type is 4 words for not, if judged result is for being then further to judge and whether read and write the pointer position difference smaller or equal to 1 word;
Judge that whether read-write pointer position difference is smaller or equal to 1 word, if judged result is then initiated the transmission that the burst operation type is 1 word for not.
Embodiment of the invention data method for carrying, the data length that only needs source of configuration address, destination address and each carrying, do not need to calculate the control signal of handling process, and can select suitable burst operation length automatically, do not need to calculate the burst operation type, save the computational load of each configuration, improved the efficient of data carryings.
Embodiment of the invention data method for carrying is divided into two processes: read operation and write operation.
In the beginning write data,, finish the alignment of destination address earlier according to the drift condition of destination address.According to the low dibit of address, address offset can be divided into four kinds of situation: 2`b00 (the low dibit of expression destination address is 00), 2`b01 (the low dibit of expression destination address is 01), 2`b10 (the low dibit of expression destination address is 10), 2`b11 (the low dibit of expression destination address is 11).Wherein, 2`b00 represents word (Word) alignment, and 2`b01 and 2`b11 represent byte (Byte) alignment, and 2`b10 represents half-word (half-Word) alignment.If destination address Word alignment does not then need to carry out the Word registration process again; If the non-Word alignment in address then needs at first to pass through the Word registration process, guarantee that most of external visits are Word alignment.Wherein 2`b01,2`b10,2`b11 represent destination address right and wrong word alignment; 2`b00 is the destination address of word alignment.Wherein byte is a byte, and the start address of expression section is a byte address, and 1 byte equals 8 positions; Word is a word, and the start address of expression section is a word address, and a word accounts for four bytes.
According to three kinds of situations of non-word alignment, distinguish the word alignment procedure of illustration purpose address below.
Figure 5 shows that the word alignment procedure synoptic diagram of destination address when destination address is 2`b01.Referring to shown in Figure 5, when destination address is 2`b01, at first read in the data of at least one word to internal buffer memory from source address, the byte 0 (byte0) of the data in described at least one word is write the addr1 place according to the mode of byte address align, the byte1 of the data in described at least one word, byte2 writes the addr2 place according to the mode of half-word address align.Wherein, described addr1 represents that the destination address skew is 1, and addr2 represents that the destination address skew is 2.Correspondingly, addr0 represents that the destination address skew is 0.
Figure 6 shows that the word alignment procedure synoptic diagram of destination address when destination address is 2`b10.Referring to shown in Figure 6, when destination address is 2`b10, at first the data of reading at least one word from source address are to internal buffer memory, and the byte0 of the data in described at least one word, byte1 writes the addr2 place according to the mode of half-word address align.
Figure 7 shows that the word alignment procedure synoptic diagram of destination address when destination address is 2`b11.Referring to shown in Figure 7, when destination address was 2`b11, at first the data of reading at least one word from source address were write the addr3 place to the byte0 of the data in described at least one word according to the mode of byte address align to internal buffer memory.
Through behind the address function of above-mentioned three kinds of situations, destination address has just alignd according to word, and the data of a word of residue less than are placed in the memory buffer.When the follow-up control that reads and writes data is all sent the bursty data read-write according to address offset word alignment.The type of each bursty data read-write is 1 word, 4 words, 8 words, 16 words.Read-write controller all according to 16 word-＞8 word-＞4 words-＞order of individual 1 word selects the type of burst transfer to carry out the data carrying.
When carrying out read operation, Read Controller is according to the length of remaining data in the source address type that big bursty data reads of selecting to try one's best, and the data that at every turn read out are put into earlier in the memory buffer, and upgrade the read pointer and the remaining data length of memory buffer; When carrying out write operation, writing controller is according to the alternate position spike of reading and writing pointer, calculate the suitable data volume of writing out, and carry out described write operation according to the alternate position spike of the reading and writing pointer type that big bursty data writes of selecting to try one's best, after data are write out, upgrade the write pointer of memory buffer again and carried data length.
In memory buffer, adopt the data cache method of first in first out (FIFO).Figure 8 shows that in the embodiment of the invention data shift synoptic diagram in the memory buffer.Because after the word alignment operation, the data that also remain a word of less than are placed in the memory buffer.So after reading in data according to word alignment, the remaining data and the data of newly reading in are spliced, and the position of adjusting read pointer points to the address of word alignment, the remaining data after this splicing is finished is put into memory buffer, waits for next time splicing at every turn.After data after writing controller aligns each splicing are sent, adjust the position of write pointer when writing the last time the data of remaining non-word alignment are write out.
Adopting after data bit width is the data carrying of word,, last then described remaining data is write destination address according to the mode that address byte aligns if also have remaining data in the memory buffer.
Embodiment two
Be example with the carrying of the data in wireless terminal SoC chip below, embodiment of the invention data method for carrying is described.
In the present embodiment, in wireless terminal SoC chip, a HDLC (High-Level Data LinkControl, the high level data controlling links) handles the data length that to carry and be 3072bytes to the maximum, needing the configuration data carrying is 100 times, and the data volume of average each carrying is about 31bytes.The source address of each carrying is an External memory equipment, and destination address is the internal buffer of HDLC, and the skew of destination address does not wait from 2`b00-2`b11.
Consider that the alignment of destination address word needs 1-3 bytes, so after the destination address word alignment, remaining data length is between 28-30 bytes.After Fig. 9 showed destination address word alignment, remaining data length was the data reading operation process of 28 bytes.As can be seen from Figure 9, because remaining data length is 28 bytes, be equivalent to 7 words (accounting for four bytes according to a word calculates), the number of times of therefore initiating the burst operation type and be 16 and 8 transmission is 0 time, the number of times of initiating the burst operation type and be 4 transmission is 1 time, and the number of times of initiating the burst operation type and be 1 transmission is 3 times.
After Figure 10 showed destination address word alignment, remaining data length was the data write operation process of 28 bytes.The read-write pointer position that writing controller selects the burst transfer type to depend on after destination address aligns is poor.After having read a given data, read pointer can point to new address at every turn, and the read-write pointer subtracts each other and promptly constitutes alternate position spike.--＞8 words--＞4 words--selection of＞1 word obtains sending the burst transfer type of data through 16 words with alternate position spike.As can be seen from Figure 10, the number of times of initiating the burst operation type and be 4 transmission is 1 time, and the number of times of initiating the burst operation type and be 1 transmission is 3 times.
By top description as can be known, under the situation of destination address alignment, in the process of read operation, the burst transfer type that needs is that 4 number of times is 1, and the burst transfer type is that 1 number of times is 3; In the process of write operation, the burst transfer type that needs is that 4 number of times is 1, and the burst transfer type is that 1 number of times is 3.The data that remain non-word alignment are carried according to the byte alignment.
In the present embodiment, the carrying of 100 secondary data all only needs source of configuration, destination address and data length, does not need to calculate the control signal of handling process.According to the configuration in this example,, need the burst transfer type that repeatedly dispensed is different if when being configured to fixedly burst operation length with traditional DMA method for carrying; The present invention does not need to calculate the type of burst operation, saves the computational load of each configuration, has improved the data handling efficiency.
In addition, selected suitable burst operation length automatically.Because the data volume of the each carrying of the SOC that wireless communication protocol stack is handled is less, only be 31 bytes according to each carrying in the example two.Tradition DMA carrying is according to the difference of address offset, needing the burst transfer type at most is 1 for the number of times of 16 word, the burst transfer type is that the number of times of 4 words is 3, the burst transfer type is that the number of times of 1 word is 3, the minimum burst transfer type that needs is that the number of times of 4 words is 1, and the burst transfer type is that the number of times of 1 word is 5 and adds configuration operation; The present invention need not to consider address offset, and needing the burst transfer type is that the number of times of 4 words is 1, and the burst transfer type is that the number of times of 1 word is 5.Contrast is got off, and performance of the present invention is certain to be better than traditional DMA carrying, can promote 4 times at most.
Embodiment three
Figure 11 shows that a kind of data Handling device block diagram that the embodiment of the invention provides.Referring to shown in Figure 11, embodiment of the invention data Handling device 30 comprises: Read Controller 31, writing controller 32, and the memory buffer 33 that links to each other with writing controller with described Read Controller; Wherein said Read Controller 31, be used to receive the read operation order, according to the length of data to be carried at every turn, carry out data read from source address according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst; Described memory buffer 33 links to each other with described Read Controller, is used for the described data that described Read Controller reads are kept in; Described writing controller 32, be used to receive the write operation order, poor according to the read-write pointer position that destination address is pressed after word aligns, according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst, data temporary in the described memory buffer are write the destination address of word alignment.
Embodiment of the invention data Handling device, the Read Controller basis is the length of data to be carried at every turn, carry out data read according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst from source address, writing controller is then poor according to the read-write pointer position that destination address is pressed after word aligns, according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst, data temporary in the described memory buffer are write the destination address of word alignment.Like this, select suitable burst operation length automatically, do not need to calculate the burst operation type, save the computational load of each configuration, improved the efficient of data carryings.
Embodiment four
Figure 12 is the block diagram of another embodiment data Handling device of invention.Referring to shown in Figure 12, the present invention executes routine data Handling device 30, comprise: Read Controller 31 and read data path 310, be connected between ahb bus and the buffering storer, Read Controller is used to receive the read operation order, according to the length of data to be carried at every turn,, carry out data read from source address by described read data path according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst; Writing controller 32 and write data path 320, between connection and described ahb bus and the described memory buffer, writing controller is used to receive the write operation order, poor according to the read-write pointer position that destination address is pressed after word aligns, according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst, data temporary in the described memory buffer are write the destination address of word alignment by the write data path; Memory buffer 33 is used for the data that described Read Controller reads are kept in; Register 34 is set, is used for being provided with the length of source address, destination address and each data carrying that register is provided with data carryings at this.Certainly, in the embodiment of the invention, also can not have the described register that is provided with, in this case, the length of the source address of described data carrying, destination address and each data carrying can be from the input of the order of described data Handling device outside; Article one, ahb bus 35, and this ahb bus is used to connect source address and destination address.
In the present embodiment, the bus that connects source address and destination address is one, by same bus of same group of message reference, makes that like this structure of device is comparatively simple.Certainly, the present invention is not limited to this, also can adopt two buses to realize among other embodiment of the present invention, wherein a bus connects source address, this bus links to each other with memory buffer with read data path by Read Controller, another bus links to each other with destination address, and this another bus links to each other with described memory buffer with the write data path by writing controller.
Referring to shown in Figure 13, in above-mentioned data Handling device embodiment, further, described Read Controller 31 comprises: read operation order receiving element 311 is used to receive the read operation order; The first burst transfer action type selected cell 312 is used for according to the length of data to be carried at every turn, according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word; Read operation command executing unit 313 is used for carrying out data read according to the selected burst transfer action type of the described first burst transfer action type selected cell from source address.
Referring to shown in Figure 14, in above-mentioned data Handling device embodiment, further, described writing controller 32 comprises: write operation order receiving element 321 is used to receive the write operation order; The second burst transfer action type selected cell 322, it is poor by the read-write pointer position after the word alignment to be used for according to destination address, according to the order of 16 words, 8 words, 4 words, 1 word, selects the read and write data burst transfer action type of length maximum of burst; Write operation command executing unit 323 is used for according to the selected burst transfer action type of the described second burst transfer action type selected cell, data temporary in the described memory buffer is write the destination address of word alignment.
Wherein, in order to realize the alignment of destination address, described Read Controller comprises that also align data reads subelement, is used for reading from source address the data of at least one word that is used for the alignment of destination address word; Described writing controller comprises that also align data writes subelement, is used for the drift condition according to destination address, and described align data reads the data of described at least one word that subelement reads, and carries out the word alignment of destination address.
Should be understood that the Read Controller in the present embodiment and the inner structure of writing controller also can be applied in the foregoing description one.
Embodiment five
The embodiment of the invention provides a kind of read operation method, comprises step:
S51, source of configuration address and the data length that at every turn reads;
S52, according to the length of each data to be read, carry out data read according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word from source address.
Embodiment of the invention data reading operation method, only need the data length of source of configuration address and each carrying, and can select suitable burst operation length automatically, do not need to calculate the burst operation type, save the computational load of each configuration, improved the efficient of data reading operation.
For the ease of realizing the word registration process of destination address, then carrying out follow-up write operation handles, at destination address is under the situation of non-word alignment, after the data length of described source of configuration address and each carrying, carry out the data that also comprise step: S53 between the data read, read at least one word that is used for the alignment of destination address word from source address from source address.
Embodiment six
The embodiment of the invention provides a kind of write operation method, comprises step:
The data length of S61, configuration purpose address and each write operation;
S62, the data for the treatment of write operation to keeping in, poor according to the read-write pointer position that destination address is pressed after the word alignment, data are write the destination address of word alignment according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word.
Embodiment of the invention data write operation method, only need the data length of configuration purpose address and each carrying, and can select suitable burst operation length automatically, do not need to calculate the burst operation type, save the computational load of each configuration, improved the efficient of data write operation.
At destination address is under the situation of non-word alignment, in order to realize the word registration process of destination address, after the data length of described configuration purpose address and each carrying, data are write between the destination address of word alignment, described method also comprises S63: the destination address to the data of each carrying carries out the word registration process.Particularly, the destination address of described data to each carrying carries out the word registration process and comprises:
When destination address is 2`b01, the byte0 of the data at least one temporary word is write the addr1 place according to the mode of byte address align, the byte1 of the data at least one temporary word, byte2 writes the addr2 place according to the mode of half-word address align;
When destination address was 2`b10, the byte0 of the data at least one temporary word, byte1 write the addr2 place according to the mode of half-word address align; Perhaps
When destination address is 2`b11, the byte0 of the data at least one temporary word is write addr3 according to the mode of byte address align.
Should be understood that, though the carrying with data among the SoC of wireless terminal in the embodiment of the invention is that example is illustrated numerical control method for carrying of the present invention and device, but the present invention is not limited to this, and the numerical control method for carrying of the embodiment of the invention and device also can be applicable to the carrying of data in other communication facilities.
The above; only be the specific embodiment of the present invention, but protection scope of the present invention is not limited thereto, anyly is familiar with those skilled in the art in the technical scope that the present invention discloses; can expect easily changing or replacing, all should be encompassed within protection scope of the present invention.Therefore, protection scope of the present invention should be as the criterion by described protection domain with claim.
Claims (13)
1. a data method for carrying is characterized in that, comprises step:
The data length of source of configuration address, destination address and each carrying;
According to the length of data to be carried at every turn, carry out data read from source address according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst;
The described data that read are kept in;
To temporary data, poor according to the read-write pointer position that destination address press after the word alignment, according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word data are write the destination address that word aligns.
2. data method for carrying according to claim 1 is characterized in that, after the data length of described source of configuration address, destination address and each carrying, carries out also comprising between the data read step from source address:
Destination address to the data of each carrying carries out the word registration process.
3. data method for carrying according to claim 2 is characterized in that, the destination address of described data to each carrying carries out the word registration process and comprises:
When the low dibit of destination address is 01, the data of reading at least one word from source address are also kept in these data, the byte 0 of the data in described at least one word is write the addr1 place according to the mode of byte address alignment, the byte 1 of the data in described at least one word, byte 2 is write the addr2 place according to the mode of half-word address align; Perhaps
When the low dibit of destination address was 10, the data of reading at least one word from source address were also kept in these data, and the byte 0 of the data in described at least one word, byte 1 is write the addr2 place according to the mode of half-word address align; Perhaps
When the low dibit of destination address was 11, the data of reading at least one word from source address were also kept in these data, and the byte 0 of the data in described at least one word is write addr3 according to the mode of byte address alignment.
4. according to claim 2 or 3 described data method for carrying, it is characterized in that, to temporary data, poor according to the read-write pointer position that destination address is pressed after word aligns, data are write after the destination address of word alignment according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst, also comprised: remaining temporal data is write destination address by the mode of address byte alignment.
5. a data carrying control device is characterized in that, comprising:
Read Controller, writing controller, and the memory buffer that links to each other with writing controller with described Read Controller; Wherein
Described Read Controller, be used to receive the read operation order, according to the length of data to be carried at every turn, carry out data read from source address according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst;
Described memory buffer is used for the described data that described Read Controller reads are kept in;
Described writing controller, be used to receive the write operation order, poor according to the read-write pointer position that destination address is pressed after word aligns, according to the read and write data burst transfer action type of length maximum of the select progressively of 16 words, 8 words, 4 words, 1 word burst, data temporary in the described memory buffer are write the destination address of word alignment.
6. data carrying control device according to claim 5 is characterized in that described Read Controller comprises:
Read operation order receiving element is used to receive the read operation order;
The first burst transfer action type selected cell is used for according to the length of data to be carried at every turn, according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word;
The read operation command executing unit is used for carrying out data read according to the selected burst transfer action type of the described first burst transfer action type selected cell from source address.
7. according to claim 5 or 6 described data carrying control device, it is characterized in that described writing controller comprises:
Write operation order receiving element is used to receive the write operation order;
The second burst transfer action type selected cell, it is poor by the read-write pointer position after the word alignment to be used for according to destination address, according to the order of 16 words, 8 words, 4 words, 1 word, selects the read and write data burst transfer action type of length maximum of burst;
The write operation command executing unit is used for according to the selected burst transfer action type of the described second burst transfer action type selected cell, data temporary in the described memory buffer is write the destination address of word alignment.
8. data carrying control device according to claim 7 is characterized in that described Read Controller comprises that also align data reads subelement, is used for reading from source address the data of at least one word that is used for the alignment of destination address word;
Described writing controller comprises that also align data writes subelement, is used for the drift condition according to destination address, and described align data reads the data of described at least one word that subelement reads, and carries out the word alignment of destination address.
9. a data reading operation method is characterized in that, comprises step:
Source of configuration address and the data length that at every turn reads;
According to the length of each data to be read, carry out data read from source address according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word.
10. data reading operation method according to claim 9 is characterized in that, after the data length of described source of configuration address and each carrying, carries out also comprising between the data read step from source address:
Read the data of at least one word that is used for the alignment of destination address word from source address.
11. the method for a data write operation is characterized in that, comprises step:
The data length of configuration purpose address and each write operation;
To the temporary data for the treatment of write operation, poor according to the read-write pointer position that destination address is pressed after the word alignment, data are write the destination address of word alignment according to the read and write data burst transfer action type of length maximum of the select progressively burst of 16 words, 8 words, 4 words, 1 word.
12. the method according to right 11 described data write operations is characterized in that,
After the data length of described configuration purpose address and each carrying, data to be write between the destination address of word alignment, described method also comprises:
Destination address to the data of each carrying carries out the word registration process.
13. the method according to right 12 described data write operations is characterized in that, the destination address of described data to each carrying carries out the word registration process and comprises:
When the low dibit of destination address is 01, the byte 0 of the data of at least one temporary word is write the addr1 place according to the mode of byte address alignment, the byte 1 of the data at least one temporary word, byte 2 is write the addr2 place according to the mode of half-word address align;
When the low dibit of destination address was 10, the byte 0 of the data at least one temporary word, byte 1 was write the addr2 place according to the mode of half-word address align; Perhaps
When the low dibit of destination address is 11, the byte 0 of the data at least one temporary word is write addr3 according to the mode of byte address alignment.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101739239A CN101853229B (en) | 2010-05-17 | 2010-05-17 | Method and device for data transportation, and method of data reading operation and data writing operation |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN2010101739239A CN101853229B (en) | 2010-05-17 | 2010-05-17 | Method and device for data transportation, and method of data reading operation and data writing operation |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN101853229A true CN101853229A (en) | 2010-10-06 |
| CN101853229B CN101853229B (en) | 2012-08-08 |
Family
ID=42804727
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN2010101739239A Active CN101853229B (en) | 2010-05-17 | 2010-05-17 | Method and device for data transportation, and method of data reading operation and data writing operation |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN101853229B (en) |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102567258A (en) * | 2011-12-29 | 2012-07-11 | 中国科学院自动化研究所 | Multi-dimensional DMA (direct memory access) transmitting device and method |
| WO2012149775A1 (en) * | 2011-09-28 | 2012-11-08 | 华为技术有限公司 | Data processing method and device |
| CN107766079A (en) * | 2016-08-19 | 2018-03-06 | 北京百度网讯科技有限公司 | Processor and the method for execute instruction on a processor |
| CN107943727A (en) * | 2017-12-08 | 2018-04-20 | 深圳市德赛微电子技术有限公司 | A kind of high efficient DMA controller |
| CN108345431A (en) * | 2017-12-29 | 2018-07-31 | 杭州华为数字技术有限公司 | A kind of method and device of digital independent |
| CN105589815B (en) * | 2016-03-04 | 2018-10-12 | 北京左江科技股份有限公司 | A kind of method of data-moving between memory |
| WO2019127922A1 (en) * | 2017-12-29 | 2019-07-04 | 深圳云天励飞技术有限公司 | Data transfer method, computing device and computer readable storage medium |
| CN110018851A (en) * | 2019-04-01 | 2019-07-16 | 北京中科寒武纪科技有限公司 | Data processing method, relevant device and computer-readable medium |
| CN111159075A (en) * | 2019-12-31 | 2020-05-15 | 成都海光微电子技术有限公司 | Data transmission method and data transmission device |
| CN111178490A (en) * | 2019-12-31 | 2020-05-19 | 北京百度网讯科技有限公司 | Data output method, data acquisition method, data output device, data acquisition device and electronic equipment |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4370712A (en) * | 1980-10-31 | 1983-01-25 | Honeywell Information Systems Inc. | Memory controller with address independent burst mode capability |
| CN101241478A (en) * | 2008-03-07 | 2008-08-13 | 威盛电子股份有限公司 | Data transfer method |
-
2010
- 2010-05-17 CN CN2010101739239A patent/CN101853229B/en active Active
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4370712A (en) * | 1980-10-31 | 1983-01-25 | Honeywell Information Systems Inc. | Memory controller with address independent burst mode capability |
| CN101241478A (en) * | 2008-03-07 | 2008-08-13 | 威盛电子股份有限公司 | Data transfer method |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2012149775A1 (en) * | 2011-09-28 | 2012-11-08 | 华为技术有限公司 | Data processing method and device |
| CN102567258A (en) * | 2011-12-29 | 2012-07-11 | 中国科学院自动化研究所 | Multi-dimensional DMA (direct memory access) transmitting device and method |
| CN102567258B (en) * | 2011-12-29 | 2014-08-27 | 中国科学院自动化研究所 | Multi-dimensional DMA (direct memory access) transmitting device and method |
| CN105589815B (en) * | 2016-03-04 | 2018-10-12 | 北京左江科技股份有限公司 | A kind of method of data-moving between memory |
| CN107766079A (en) * | 2016-08-19 | 2018-03-06 | 北京百度网讯科技有限公司 | Processor and the method for execute instruction on a processor |
| CN107943727A (en) * | 2017-12-08 | 2018-04-20 | 深圳市德赛微电子技术有限公司 | A kind of high efficient DMA controller |
| CN107943727B (en) * | 2017-12-08 | 2021-02-09 | 深圳市德赛微电子技术有限公司 | High-efficient DMA controller |
| CN108345431A (en) * | 2017-12-29 | 2018-07-31 | 杭州华为数字技术有限公司 | A kind of method and device of digital independent |
| WO2019127922A1 (en) * | 2017-12-29 | 2019-07-04 | 深圳云天励飞技术有限公司 | Data transfer method, computing device and computer readable storage medium |
| CN110018851A (en) * | 2019-04-01 | 2019-07-16 | 北京中科寒武纪科技有限公司 | Data processing method, relevant device and computer-readable medium |
| CN111159075A (en) * | 2019-12-31 | 2020-05-15 | 成都海光微电子技术有限公司 | Data transmission method and data transmission device |
| CN111178490A (en) * | 2019-12-31 | 2020-05-19 | 北京百度网讯科技有限公司 | Data output method, data acquisition method, data output device, data acquisition device and electronic equipment |
Also Published As
| Publication number | Publication date |
|---|---|
| CN101853229B (en) | 2012-08-08 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101853229B (en) | Method and device for data transportation, and method of data reading operation and data writing operation | |
| CN108733600B (en) | Electronic system with direct memory access controller and method of operating the same | |
| CN103078895B (en) | Multi-functional pair of serial server of a kind of EPA based on MCF52233 chip | |
| EP2246777A3 (en) | Storage system and operation method of storage system | |
| CN113468090B (en) | PCIe communication method and device, electronic equipment and readable storage medium | |
| EP1535169B1 (en) | Improved inter-processor communication system for communication between processors | |
| EP2312457A2 (en) | Data processing apparatus, data processing method and computer-readable medium | |
| US20140006742A1 (en) | Storage device and write completion notification method | |
| CN104142907A (en) | Enhanced processor, processing method and electronic equipment | |
| EP2419831B1 (en) | Processor with assignable general purpose register set | |
| US20050141534A1 (en) | Packet processing method and device | |
| CN101814011B (en) | USB host controller and controlling method for USB host controller | |
| CN107948747B (en) | Power supply management method and unit and television | |
| CN101047721B (en) | Method for data filter process using DMA controller | |
| US8639860B2 (en) | Data transfer system and data transfer method | |
| CN112115096A (en) | Data transmission control method based on embedded microprocessor | |
| CN112783811B (en) | Microcontroller architecture and method for reading data in the same | |
| US11264065B2 (en) | Data transceiver device and operation method thereof | |
| KR101927255B1 (en) | Processing device of register window overflow/underflow | |
| JP2010262663A (en) | Memory interface device, memory interface method and modem device | |
| JPH05151177A (en) | Distributed processing system | |
| CN101958895B (en) | Network control method for multi-channel speech coding and decoding equipment | |
| CN103530259B (en) | The cross clock domain serial data exchange method of geophysical instrument, Apparatus and system | |
| CN105843106B (en) | Dedicated digital signal processor and its device and method for realizing data interaction conversion | |
| JP4937355B2 (en) | Data transfer apparatus and data transfer method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C06 | Publication | ||
| PB01 | Publication | ||
| C10 | Entry into substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| CP01 | Change in the name or title of a patent holder | ||
| CP01 | Change in the name or title of a patent holder |
Address after: 518129 Building 2, B District, Bantian HUAWEI base, Longgang District, Shenzhen, Guangdong. Patentee after: Huawei terminal (Shenzhen) Co.,Ltd. Address before: 518129 Building 2, B District, Bantian HUAWEI base, Longgang District, Shenzhen, Guangdong. Patentee before: HUAWEI DEVICE Co.,Ltd. |
|
| TR01 | Transfer of patent right | ||
| TR01 | Transfer of patent right |
Effective date of registration: 20181226 Address after: 523808 Southern Factory Building (Phase I) Project B2 Production Plant-5, New Town Avenue, Songshan Lake High-tech Industrial Development Zone, Dongguan City, Guangdong Province Patentee after: HUAWEI DEVICE Co.,Ltd. Address before: 518129 Building 2, B District, Bantian HUAWEI base, Longgang District, Shenzhen, Guangdong. Patentee before: Huawei terminal (Shenzhen) Co.,Ltd. |