WO2019127922A1 - Data transfer method, computing device and computer readable storage medium - Google Patents

Abstract

A data transfer method, a computing device and a computer readable storage medium. The method is applied in a computing device, and the computing device comprises a storage medium, a register unit, and a storage control unit, wherein the method comprises: the storage control unit acquiring a data transfer instruction, the data transfer instruction comprising target data to be transferred and the storage format of a first data block in which the target data is located (S202); the storage control unit, according to the storage format of the first data block, completing the transfer of the target data between the storage medium and the register unit (S204); The method may increase the speed and efficiency of data transfer, thereby improving the efficiency of data processing.

Description

Data carrying method, computing device and computer readable storage medium

This application claims the priority of the Chinese patent application filed on December 29, 2017, the Chinese Patent Office, the application number is 201711479137.X, the invention name is "a data handling method, related products and computer storage media", the entire contents thereof This is incorporated herein by reference.

Technical field

The present invention relates to the field of data processing technologies, and in particular, to a data handling method, a computing device, and a computer readable storage medium.

Background technique

With the development and in-depth research of Artificial Intelligence (AI), the demand for data supply from chips is getting higher and higher. In the prior art, the multi-dimensional direct memory access (DMA) data carrying method uses a continuous storage address to store the carried data, which only considers how to complete the data transfer, and does not consider the subsequent processing of the data. , brings unnecessary trouble to the read/write operations of subsequent data. For example, in the deep learning model, this data storage method can not be well matched with the operator, reducing the data read and write rate, thereby reducing the data processing efficiency.

Summary of the invention

The technical problem to be solved by the embodiments of the present invention is to provide a data carrying method, a computing device, and a computer readable storage medium, which can improve the efficiency of data transmission.

In a first aspect, an embodiment of the present invention provides a data handling method, which is applied to a computing device, where the computing device includes a storage medium, a register unit, and a storage control unit. The method includes:

The storage control unit acquires a data handling instruction, where the data handling instruction includes indication information, where the indication information is used to indicate target data to be carried and a storage format of the first data block where the target data is located;

The storage control unit completes the handling of the target data between the storage medium and the register unit according to a storage format of the first data block.

In a second aspect, an embodiment of the present invention further provides a computing device, including a storage medium, a register unit, and a storage control unit.

The storage medium and the register unit are both used to store data;

The storage control unit is configured to acquire a data handling instruction, where the data handling instruction includes indication information, where the indication information is used to indicate target data to be carried and a storage format of the first data block where the target data is located;

The storage control unit is further configured to complete the handling of the target data between the storage medium and the register unit according to a storage format of the first data block.

In a third aspect, an embodiment of the present invention further provides a computing device, including: a processor, a memory, a communication interface, and a bus; the processor, the memory, and the communication interface are connected through the bus and complete each other Inter-communication; the memory stores executable program code; the processor runs a program corresponding to the executable program code by reading executable program code stored in the memory to perform the first aspect as described above The method described.

In a fourth aspect, an embodiment of the present invention further provides a computer readable storage medium storing program code for data handling. The program code includes instructions for performing the method described in the first aspect above.

The storage control unit in the computing device in the embodiment of the present invention acquires a data handling instruction, where the data handling instruction includes indication information, where the indication information is used to indicate target data to be carried and storage of the first data block where the target data is located a format, and then the storage control unit completes the handling of the target data between the storage medium and the register unit according to a storage format of the first data block. By adopting the embodiment of the invention, data can be efficiently carried out and the efficiency of data handling can be improved.

DRAWINGS

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below. Obviously, the drawings in the following description are only It is a certain embodiment of the present invention, and other drawings can be obtained from those skilled in the art without any creative work.

1 is a schematic structural diagram of a computing device according to an embodiment of the present invention;

2A and 2B are schematic diagrams of two types of data storage provided by an embodiment of the present invention;

3 is a schematic flow chart of a data handling method according to an embodiment of the present invention;

4 is a schematic diagram of still another data storage provided by an embodiment of the present invention;

FIG. 5A is a schematic structural diagram of a first storage control unit according to an embodiment of the present invention; FIG.

FIG. 5B is a schematic flowchart diagram of still another data handling method according to an embodiment of the present invention; FIG.

6A is a schematic structural diagram of a second storage control unit according to an embodiment of the present invention;

FIG. 6B is a schematic flowchart diagram of still another data handling method according to an embodiment of the present invention; FIG.

FIG. 7 is a schematic structural diagram of still another computing device according to an embodiment of the present invention; FIG.

FIG. 8 is a schematic structural diagram of still another computing device according to an embodiment of the present invention.

Detailed ways

The technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the accompanying drawings in the embodiments of the present invention. It is an embodiment of the invention, but not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of the present invention.

The terms "first", "second" and "third" (if any) and the like in the description and claims of the present invention and the above drawings are used to distinguish different objects, and are not intended to describe a particular order. Moreover, the term "comprise" and any variants thereof are intended to cover a non-exclusive inclusion. For example, a process, method, system, product, or device that comprises a series of steps or units is not limited to the listed steps or units, but optionally also includes steps or units not listed, or alternatively Other steps or units inherent to these processes, methods, products or equipment.

In order to solve the problems of low data handling efficiency in the prior art, the present application proposes an efficient data handling method, which is applied to a computing device. A schematic diagram of the structure of one possible computing device is shown in FIG. As shown in FIG. 1, the computing device 100 includes a storage medium 102, a register unit 104, and a storage control unit 106;

The storage medium 102 is for storing external data; the external data refers to data stored outside the neural network processor. Correspondingly, the storage medium may be an external memory, a cache, and a Double Rate Synchronous Dynamic Random Access (DDR) memory independently of the neural network processor.

The register unit 104 is used to store internal data, where the internal data refers to data stored inside the neural network processor, and the register unit 104 may be a memory installed inside the neural network processor, such as a cache, a flash memory. and many more. In the present application, the external data and the internal data are collectively referred to as data, including but not limited to image data, text data, voice data, and the like. The neural network processor may also be referred to as a deep learning processor, or other processor/chip for processing big data, which is not limited herein.

The Enhanced Direct Memory Access (EDMA, also referred to as Enhanced Direct Memory Access) is used to implement data transfer between the storage medium and the register unit. Specifically, the storage control unit includes a first storage control unit 1062 (Enhanced Output Direct Memory Access, EoDMA, also referred to as enhanced output direct memory access) and a second storage control unit 1064 (Enhanced Iutput Direct Memory Access, EiDMA, also known as enhanced input direct memory access). The first storage control unit EoDMA is configured to transport data in the register unit to the storage medium for storage. The second storage control unit EiDMA is configured to carry data in the storage medium inward into the register unit for storage. How to carry out the handling of data between the register unit and the storage medium will be explained in detail below.

It should be understood that the granularity of data processing supported within the neural network processor is a channel, specifically a data block/data transmitted through a channel. Wherein, the channel comprises an input channel CI and an output channel CO. The CI is used to implement data transmission of the storage medium to the register unit; the CO is used to implement data transmission of the register unit to the storage medium. That is, the storage medium needs to carry data to the register unit through the input channel CI, and the register unit needs to carry data to the storage medium through the output channel CO for storage.

Furthermore, the minimum granularity of data storage supported in the register unit internal to the neural network processor is pixel pixels. Alternatively, a plurality of pixel combinations may be defined as a slice of data, and a plurality of slices of data may be combined and defined as a block of data. That is, the storage of data in the storage format of the data block bank is supported in the register unit.

The number of pixel pixels included in the data piece and the number of data slice slices included in the data block may be customized for the user side or the computing device side, which is not limited in this application. For example, a combination of 7 pixels is defined as a slice, and a combination of 2 slices is defined as a bank, etc., which is not limited in this application.

A schematic diagram of data storage in a register unit is shown in Figure 2A. 2A, the data blocks bank0 and bank1 corresponding to the two channels CI/CO are respectively shown, wherein each data block is composed of two data slice slices, and each data slice is composed of 7 pixel pixels. It is shown that each piece of data is composed of 7 pixels in the width direction (ie, in the row direction). Wherein, the portion corresponding to the black line indicates the storage of valid data (such as image data) in the register unit; the remaining portion indicates the invalid data stored in the register unit or no data storage. Taking the data as image data as an example, FIG. 2A shows a storage diagram of an 8*4 image data in a register unit.

The storage format supporting the data in the storage medium outside the neural network processor is continuous storage. Specifically, in the storage medium, data is sequentially stored in sequence according to a transmission sequence of the channel CI/CO (such as CI0, CI1, CI2, etc.). A schematic diagram of data storage in a storage medium is shown in Figure 2B. As shown in FIG. 2B, the data blocks in the two channels CI/CO are stored in the storage medium in a continuous storage manner. For example, in the first CI/CO0 channel, the CI/CO0 channel is continuously stored in the direction of the arrow shown in the figure. All the data in the data block, after storing the data block of the CI/CO0 channel, is then stored in the data block of the next CI/CO1 channel. For the data blocks of each channel, the data in the data block can be sequentially stored from the lower to the highest in the order of the rows. FIG. 2B shows a storage diagram of data blocks in the CI/CO0 channel. Specifically, the first row of data may be stored first, and then the second row of data may be stored.

Based on the computing device shown in FIG. 1, FIG. 3 is a schematic flowchart of a data handling method according to an embodiment of the present invention. The method shown in FIG. 3 includes the following implementation steps:

Step S202: The storage control unit 106 acquires a data handling instruction, where the data handling instruction includes indication information, where the indication information is used to indicate target data to be carried and a storage format of the first data block where the target data is located.

In the present application, the target data may be data in a first data block, and the first data block may be represented as C*H*W, that is, composed of C H*W data blocks. Where C is the number of channels required to transmit the data block, H and W are the height and width of the data block, respectively, and the height H and data of the data block in the height direction (ie, column direction) can be understood as shown in FIG. 2A. The width W of the block in the width direction (ie, in the row direction).

For example, an image is transmitted by a computing device, and image data corresponding to the image may be represented as C*H*W, where C represents the number of channels transmitting the image, and H*W represents the size of the image in a two-dimensional plane. . When C=1, the image can be a grayscale image; when C=3, the image can be a color image. For example, in the case of RGB image, red Red data of the image can be transmitted in one channel, and one channel is transmitted. The green Green data of the picture, one channel transmits the blue Blue data of the image. Accordingly, the RGB image can be formed from a combination of color data transmitted in the three channels, which is not described in detail herein.

Step S204: The storage control unit 106 completes the handling of the target data between the storage medium and the register unit according to the storage format of the first data block.

Specifically, the indication information in the data handling instruction includes, but is not limited to, a combination of any one or more of the following multi-dimensional information, where the multi-dimensional information is specifically:

Dimension 1: a first transport indication of the data block in the width direction (ie, in the row direction), the first transport indication being used to indicate that the target data for a required transport is determined for each successive K1 data. Where K1 is a positive integer, and when K1=1, it means that each data stored in the row direction in the data block is the target data, and all need to be carried.

Specifically, in a scenario in which data is transferred from the storage medium to the register unit, the first transport indication is specifically configured to indicate that each consecutive K1 data is stored in the width direction, and one read from the storage medium is stored. The target data to be handled. For example, when K1=1, it is specifically indicated that each data stored in the row direction in the data block is the continuous target data to be carried obtained by the computing device from the storage medium.

In the scenario of carrying data from the register unit to the storage medium, the first transport indication is specifically for indicating that one data is extracted for each consecutive K1 data in the width direction, as being carried into the storage medium The target data to be carried. For example, when K1=1, it specifically indicates that each data stored in the row direction in the data block is the target data to be carried, that is, the computing device needs to carry each data in the row direction to the storage. Stored in the media.

It should be understood that the target data is valid data, and the data stored in the data block may be valid data or invalid data, except for the target data, and may be invalid data, which is not limited in this application.

Optionally, the invalid data may be stored in the data block by using a preset character, a preset value, a preset letter, or the like. For example, the invalid data may be replaced with zero or invalid bubble data, etc., and the present application is not limited thereto.

Dimension 2: the width W of the data block in the width direction (ie, in the row direction), that is, the width of all data included in the width direction of the data block, wherein the data may be valid data and/or invalid data. . Optionally, the width may also be a width of valid data of the data block in a width direction or the like.

Dimension 3: a second transport indication of the data block in the height direction (ie, in the column direction), the second transport indication being used to indicate that the target data for a required transport is determined for each successive K2 data. That is, the data for each successive K2 line determines the target data to be carried in a row. Where K2 is a positive integer. When K2=1, it means that each row of data in the column direction in the data block is the target data, and needs to be carried.

Specifically, in the scenario of carrying data from the storage medium to the register unit, the second handling indication is specifically for indicating that one row of data is determined for each consecutive K2 rows of data in the height direction for storing from the storage medium. The target data to be carried in the read. For example, when K2=1, it is specifically indicated that each row of data in the height direction in the data block is used to store the target data to be carried by the computing device from the storage medium.

In the scenario of carrying data from the register unit to the storage medium, the second handling indication is specifically for indicating that one row of data is extracted for each consecutive K2 rows of data in the height direction, as being carried into the storage medium The target data to be carried. For example, when K2=1, it is specifically indicated that each row of data stored in the height direction in the data block is the target data to be transported, that is, the computing device needs to carry each row of data in the height direction to the location. Stored in a storage medium.

For the related description of the target data and the invalid data, refer to the foregoing embodiment, and details are not described herein again.

Dimension 4: The height H of the data block in the height direction (ie, in the column direction), that is, the height of all data included in the height direction of the data block. Optionally, the data may be valid data and/or invalid data. Optionally, the height may refer to a height of the valid data of the data block in the height direction, and the like.

It should be understood that the above dimension 1 to dimension 4 define the storage format of the data block of one channel CI/CO in the register unit. Optionally, the multi-dimensional information may further include:

Dimension 5: a storage interval between the two of the data blocks in the width direction (i.e., in the row direction), and/or a storage amount M1 of the data blocks in the width direction (i.e., in the row direction). Where M1 is a positive integer.

Dimension 6: a storage interval between the two data blocks in the height direction (i.e., in the column direction), and/or a storage amount M2 of the data blocks in the height direction (i.e., in the column direction). Where M2 is a positive integer.

It should be understood that the storage space of the register unit in the neural network processor is limited, and M1 and M2 may be customized for the computing device side or the user side, which is not limited herein. Optionally, limited by the processing capability of the neural network processor (ie, the data handling capability of the computing device, which may also be referred to as processing capability), the amount of data to be carried is limited each time, and thus may involve multiple tours. Round data handling. Optionally, the multi-dimensional information may further include:

Dimension 7: The storage interval of the batch data block in the height direction (ie, the column direction), that is, the storage interval between every two rounds. The total number of data blocks contained in each round (ie, the batch data block referred to in this application) is M1*M2.

Optionally, the data block M1*M2 included in each round (ie, each batch of data blocks) is customized for the user side or the computing device side, and is not limited in this application.

Optionally, the indication information may further include other parameter information, such as a priority of the data block, and the like, which is not limited in this application.

Accordingly, a schematic diagram of a data storage is given in FIG. As shown in FIG. 4, dimension 1 to dimension 7 respectively define the storage format of the channel CI/CO data block in the register unit, and also define the target data to be carried in the data block.

Based on this, correspondingly, the following two specific embodiments exist in step S204.

In a first embodiment, if the data transfer instruction is used to instruct to transfer data from the storage medium to the register unit, the storage control unit first proceeds from the storage medium according to the data transfer instruction. The target data to be carried is continuously read, and then the target data is stored into the register unit in a storage format of the first data block according to the indication of the indication information.

Specifically, after the storage control unit continuously reads the target data that needs to be transported from the storage medium, as shown in FIG. 4, first completes the channel in a channel CI/CO data block according to the dimension 1 and the dimension 2. Up to the storage of the target data, that is, as shown by the direction of the arrow in FIG. 4, the target data is sequentially stored from the low to the high in the row direction of one channel CI/CO block. Next, the storage of the target data in the column direction of one channel CI/CO data block is completed according to the dimension 3 and the dimension 4. At this point, the storage of the target data in a channel CI/CO data block can be completed. Then, according to the indication of the indication information, the storage of the target data in the other channel CI/CO data block in the row/column direction may be completed according to the dimension 5 or the dimension 6, that is, the subsequent reading according to the dimension 5 or the dimension 6 The target data is stored in other channel CI/CO data blocks in the row/column direction until a round of storage for the target data is completed. Then, according to the actual situation, that is, the data amount of the target data to be transported, it is determined whether or not the storage of the target data of the plurality of rounds is still required to be completed according to the dimension 7. The specific storage method for the target data in each round is the same, and will not be described here.

For example, in FIG. 4, the computing device stores the target data in the row direction to the data block CI/CO0 of the register unit according to the indication of the indication information according to the dimension 1 and the dimension 2, and then according to the dimension 3 and the dimension 4 storing the target data in the column direction in the data block CI/CO0 of the register unit. That is, the target data is first stored in the data block CI/CO0 of the register unit according to the dimension 1 to the dimension 4, that is, the storage for the target data in the data block CI/CO0 is completed first. The subsequently read target data is then stored in dimension 5 or dimension 6 to the data block CI/CO1 or CI/CO2 corresponding to the register unit in the row/column direction. By analogy, it is assumed that the number of data blocks defining the channel CI/CO for each round support processing is 4 according to the processing capability of the neural network processor in the present application. Correspondingly, if the amount of data of the target quantity to be handled in the storage medium is large, more than the amount of data stored in the 4 channel CI/CO data block for the target data, correspondingly, the storage The control unit also needs to complete the storage of the target data in the next round according to the dimension 7, that is, the target data to be subsequently carried is stored in the channel CI/CO data block of the next round.

In a second embodiment, if the data transfer instruction is used to instruct to transfer data from the register unit to the storage medium, the storage control unit is configured to perform an indication of the indication information in the data transfer instruction. First reading the first data block in which the target data is located from the register unit, and then extracting the target data to be transmitted from the first data block, and then sequentially transmitting the target data sequentially And stored in the storage medium.

Specifically, as shown in FIG. 4, the target data to be carried in the row direction of the channel CI/CO data block is first read and extracted according to the dimension 1 and the dimension 2, that is, as shown by the direction of the arrow in FIG. 4, in one channel CI/ The target data to be transported is sequentially read from the low position to the high level in the row direction of the CO data block. Next, the target data to be carried in the column direction of the channel CI/CO data block is read and extracted in accordance with dimension 3 and dimension 4. At this point, the acquisition of all the target data to be carried in a channel CI/CO data block can be completed. Afterwards, the storage control unit may perform reading of the target data block to be carried in other channel CI/CO data blocks in the row/column direction according to the indication of the indication information, and then according to the dimension 5 or the dimension 6 until Completing the reading of the target data in a round. Then, according to the actual situation, that is, the number C of the first data block and the number of batch data blocks M1*M2 supported by each round, whether to continue reading the target data in other rounds according to the dimension 7 And handling.

It should be understood that after the storage control unit reads the target data to be carried from the register unit, it may continuously send to the storage medium, so as to continuously store the target data to the storage. In the medium.

Correspondingly, for example, FIG. 4, the computing device reads the target data to be carried in the row direction of the data block CI/CO0 of the register unit according to the indication of the indication information according to the dimension 1 and the dimension 2, and The target data is continuously sent to the storage medium for storage, that is, the handling of the target data in the channel data block CI/CO0 row direction is completed first according to the dimension 1 and the dimension 2. Then, reading the target data to be carried in the data block CI/CO0 of the register unit along the column direction according to the dimension 3 and the dimension 4, and continuously transmitting the target data to the storage medium for storage. That is, the handling of the target data in the channel direction of the channel data block CI/CO0 is completed in accordance with the dimension 3 and the dimension 4. Correspondingly, the handling of the target data in the data block CI/CO0 can be completed first according to the dimension 1 to the dimension 4. Then, according to the dimension 5 or the dimension 6, the reading and carrying of the target data in the other channel CI/CO data block in the row/column direction are implemented, and so on, until the reading and handling of the target data in a round is completed. . It is assumed that the number of data blocks defining the channel CI/CO for each round support processing is 4 according to the processing capability of the neural network processor in the present application. Accordingly, if the target data to be carried in the register unit is stored in a 6-channel CI/CO data block, specifically in the data block CI/CO0 to the data block CI/CO5 of FIG. It can be seen that the storage control unit also needs to complete the reading and handling of the target data in the next round according to the dimension 7.

The structural framework of the storage control unit referred to in the present application and a specific embodiment of data handling based on the corresponding correspondence of the framework are described below.

FIG. 5A shows a schematic structural diagram of a first storage control unit EoDMA. The first storage control unit as shown in FIG. 5A includes a first control unit 202, a first read data unit 204, and a first write data unit 206. Optionally, a first first in first out (FIFO) unit 208 and a first authorization unit 210 may also be included. Optionally, the first control unit 202 includes an instruction storage unit and an instruction control unit, which are not shown. among them,

The instruction storage unit (EoDMA_iq) is configured to receive the data handling instruction sent by the neural network processor, which of course includes parameters such as indication information included in the data handling instruction.

The instruction control unit (EoDMA_ctrl) is configured to be responsible for distributing the data handling instruction (specifically, parameters in the instruction, such as indication information), starting EoDMA, and controlling completion of multi-dimensional information other than dimension 1 in the indication information. Switch between etc.

The first authorization unit (Rd_dm_grant) is responsible for reading the authorization of the register unit (ie, whether to support reading the target data to be carried from the register unit). It should be understood that the authorization of the register unit may be related to the following information, such as the target data to be carried in the register unit or the priority of the first data block in which the target data is located, for example, multiple pieces. When the data transfer instruction needs to transfer data from the register unit at the same time, it is limited by the data transmission capability, and the registration unit may consider the priority of the target data to be carried, and the higher the priority, the earlier the authorization is performed. If the priority is low, the target data with higher priority is processed, and the target data with lower priority is transported.

Optionally, the first authorization unit is further configured to: according to a read enable of the first FIFO (ie, learn the occupied storage space in the first FIFO unit by using a read enable command) and the first read data unit Read enable (ie, a data read instruction sent to the register unit to know the amount of data of the target data to be carried in the register unit) to predict whether the first FIFO will overflow or The storage space of the first FIFO unit exceeds a preset threshold or the like. Optionally, the method further includes: feeding back, to the first read data unit, a corresponding data read authorization indication, where the data read authorization indication is used to indicate whether to authorize reading data from the register unit, that is, Whether to authorize the reading of data. Specifically, when the register unit is not authorized, or the storage space of the first FIFO unit exceeds a preset threshold or overflow, the data read authorization indication that is fed back is used to indicate that the register unit is not authorized. Reading of data; otherwise used to indicate that the reading of data in the register unit is authorized.

The first read data unit is configured to read, from the register unit, the target data to be carried, according to the indication of the indication information in the instruction, when the data read authorization indication is used to indicate the authorization data reading, and The target data is continuously sent to the cache in the first FIFO unit.

Specifically, the first read data unit, which may also be referred to as an extract valid data, is used to read the first data block where the target data is located from the register unit through an interface (such as an Xbar interface). And responsible for implementing extraction of the target data based on dimension 1 in the indication information; and simultaneously buffering the extracted target data into the first FIFO unit.

The first FIFO unit is configured to continuously cache the target data to be carried.

The first write data unit, which may also be referred to as a data data unit, is used to continuously send the cached target data from the first FIFO unit to the storage medium for storage. Optionally, the first write data unit is further configured to be responsible for interfacing with a bus in the computing device, controlled by a bus, allowing/disabling the continuous writing of the target data to the storage medium for storage.

Based on the schematic diagram of the EoDMA structure shown in FIG. 5A, FIG. 5B is a schematic flowchart of still another data handling method according to an embodiment of the present invention. The method as shown in FIG. 5B may include the following implementation steps:

Step 301: The first control unit 202 receives the data handling instruction sent by the neural network processor, and sends the data handling instruction to the first read data unit 204. The data handling instruction includes the indication information, the indication information is used to indicate that data is transferred from the register unit to the storage medium, and optionally includes target data to be carried and the target For the storage format of the first data block where the data is located, refer to the related description in the foregoing embodiment, and details are not described herein again.

Step S302: The first authorization unit 210 determines a data read authorization indication according to an authorization factor. The data read authorization indication is used to indicate whether the first read data unit 204 is authorized to read the target data to be carried from the register unit, that is, whether to authorize data reading. The authorization factor includes a combination of any one or more of the following: whether the occupied storage space in the first FIFO unit exceeds a preset threshold, a priority of the target data, and the first data block Priority, or other factors used to affect data transmission, etc., are not limited in this application.

Step S303, the first read data unit 204 receives the data handling instruction, and in the case that the data read authorization indication is used to indicate authorization data reading, according to the first data block in the data handling instruction The storage format reads the target data to be carried from the register unit. Accordingly, the first read data unit 204 continuously caches the read target data into the first FIFO unit 208. For the reading of the target data, refer to related descriptions in the foregoing embodiments, and details are not described herein again.

Step S304, the first FIFO unit 208 continuously buffers the target data to be carried.

Step S305, the first write data unit 206 acquires the target data from the first FIFO unit 208, and continuously writes/stores the target data into the storage medium.

FIG. 6A shows a schematic structural diagram of a second storage control unit EiDMA. The second storage control unit as shown in FIG. 6A includes a second control unit 302, a second read data unit 304, and a second write data unit 306. Optionally, a second first in first out (FIFO) unit 308 and a second authorization unit 310 may also be included. Optionally, the second control unit 302 includes an instruction storage unit and an instruction control unit, which are not shown. among them,

The instruction storage unit (EiDMA_iq) is configured to receive the data handling instruction sent by the neural network processor, which of course includes parameters such as indication information included in the data handling instruction.

The instruction control unit (EiDMA_ctrl) is responsible for the distribution of the data handling instructions (specifically parameters in the instructions, such as indication information) and the initiation of EiDMA.

The second authorization unit (Rd_dm_grant) is responsible for reading the authorization of the storage medium (ie, whether to support reading the target data required for transportation from the storage medium). It should be understood that the authorization of the storage medium may be related to the following information, such as the target data to be transported stored in the storage medium or the priority of the first data block in which the target data is located, for example, multiple pieces. When the data handling instruction needs to carry data from the storage medium at the same time, it is limited by the data transmission capability, and the storage medium can take into consideration the priority of the target data to be carried, and the higher the priority, the earlier the authorization is performed. If the priority is low, the target data with higher priority is processed, and the target data with lower priority is transported.

Optionally, the second authorization unit is further configured to: according to a read enable of the second FIFO (ie, learn the occupied storage space in the second FIFO unit by using a read enable command) and the second read data unit Reading enable (ie, a data read instruction sent to the storage medium to know the amount of data of the target data to be carried in the storage medium) predicting whether the second FIFO will overflow or The storage space of the second FIFO unit exceeds a preset threshold or the like. Optionally, the method further includes: feeding back, to the second read data unit, a corresponding data read authorization indication, where the data read authorization indication is used to indicate whether to authorize reading data from the storage medium, that is, Whether to authorize the reading of data. Specifically, when the storage medium is not authorized, or the storage space of the second FIFO unit exceeds a preset threshold or overflow, the data read authorization indication that is fed back is used to indicate that the storage medium is not authorized. Reading of data; otherwise used to indicate that the reading of data in the storage medium is authorized.

The second read data unit (Rd_ext_data) is configured to read target data to be carried from the storage medium according to a data transfer instruction when the data read authorization indication is used to indicate authorization data reading, and The target data is sent to the second FIFO unit for buffering.

Optionally, it is further configured to be responsible for interfacing with a bus in the computing device, controlled by a bus, allowing/disabling reading of the target data.

The second FIFO unit is configured to cache the target data to be carried.

The second write data unit (Wr_dm_data) is configured to send the cached target data from the second FIFO unit to the indication in a storage format of the first data block according to the indication of the indication information in the instruction. Storage in the storage medium. Specifically, the second write data unit is configured to be responsible for controlling mutual switching between the multi-dimensional information in the indication information to complete storage of the target data in the register unit.

Based on the structural diagram shown in FIG. 6A, FIG. 6B is a schematic flowchart of still another data handling method according to an embodiment of the present invention. The method shown in FIG. 6B includes the following implementation steps:

Step S401: The second control unit 302 receives the data handling instruction sent by the neural network processor, and sends the data handling instruction to the second read data unit 304. Wherein the data handling instruction includes the indication information, the indication information is used to indicate that data is carried from the storage medium to the register unit, optionally further comprising target data to be carried and the target For the storage format of the data in the register unit, that is, the storage format of the first data block in which the target data is located in the present application, refer to the related description in the foregoing embodiment, and details are not described herein again.

Step S402: The second authorization unit 310 determines a data read authorization indication according to the authorization factor. The data read authorization indication is used to indicate whether the second read data unit 304 is authorized to read the target data to be carried from the storage medium, that is, whether to authorize data reading. The authorization factor includes a combination of any one or more of the following: whether the occupied storage space in the second FIFO unit exceeds a preset threshold, a priority of the target data, and the first data block Priority, or other factors used to affect data transmission, etc., are not limited in this application.

Step S403, the second read data unit 304 receives the data transfer instruction, and in the case that the data read authorization indication is used to indicate the authorization data read, continuously reading from the storage medium according to the data transfer instruction. Take the target data that needs to be transported. Correspondingly, the second read data unit 304 may further cache the target data according to the storage format of the first data block according to the storage format of the first data block indicated by the indication information in the instruction to In the second FIFO unit 308.

Step S404, the second FIFO unit 308 buffers the target data to be transported.

Step S405: The second write data unit 306 reads, from the second FIFO unit, the target data that needs to be transported according to the storage format of the first data block, and matches the first data block. The target data of the storage format is sent to the register unit for storage. For the storage of the target data according to the storage format of the first data block in the indication information, refer to the related description in the foregoing embodiment, and details are not described herein again.

It can be seen that the present application can design a storage format of the multi-dimensional DMA data according to the data format supported by the neural network processor, that is, the data storage format matched with the neural network processor can be used to store the data, which can be improved. The read/write rate of data enables efficient data handling and improves data handling/data processing efficiency.

FIG. 7 is a schematic structural diagram of still another computing device according to an embodiment of the present invention. The computing device as described in FIG. 7 includes a storage medium 70, a register unit 72, and a storage control unit 74, wherein

The storage medium 70 and the register unit 72 are both used to store data;

The storage control unit 74 is configured to acquire a data handling instruction, where the data handling instruction includes indication information, where the indication information is used to indicate target data to be carried and a storage format of the first data block where the target data is located;

The storage control unit 74 is further configured to complete the handling of the target data between the storage medium and the register unit according to a storage format of the first data block.

In an optional embodiment, the first data block is composed of C H*W data blocks, C represents the number of channels required to transmit the first data block, and H and W respectively represent the data block. Height and width;

The indication information includes at least one of the following information: a first transport indication of the data block in the width direction, a width W of the data block in the width direction, and a second transport of the data block in the height direction. An indication, a height H of the data block in the height direction, a storage interval between the data blocks in the width direction, a storage amount M1 of the data block in the width direction, and a height direction between the data blocks The upper storage interval, the storage amount M2 of the data block in the height direction, and the storage interval of the batch data block in the height direction, the total number of data blocks included in the batch data block is M1*M2, used to indicate The data handling capability of the computing device;

The first transport indication is used to indicate that the data block determines a target data to be transported for every consecutive K1 data in the width direction;

The second transport indication is used to indicate that the data block determines a target data to be transported for every consecutive K2 data in the height direction;

The target data is data in the data block, and M1, M2, K1, and K2 are all positive integers.

In an optional embodiment, the storage control unit 74 includes a first storage control unit 720 and a second storage control unit 730;

The first storage control unit 720 is configured to extract target data in the first data block from the register unit according to a storage format of the first data block, and continuously store the target data to the storage. In the medium;

The second storage control unit 722 is configured to acquire the continuously stored target data from the storage medium, and store the target data into the register unit according to a storage format of the first data block.

In an optional embodiment, the first storage control unit 720 includes a first control unit 721, a first read data unit 722, a first write data unit 723, a first FIFO FIFO unit 724, and a first authorization unit 725. ;

The first control unit 721 is configured to acquire the data handling instruction, and send the data handling instruction to the first read data unit 722;

The first authorization unit 725 is configured to determine, according to an authorization factor, a data read authorization indication, where the data read authorization indication is used to indicate whether to authorize reading the target data to be carried, the authorization factor includes the following At least one item: whether the occupied storage space in the first FIFO unit exceeds a preset threshold, a priority of the target data, and a priority of the first data block;

The first read data unit 722 is configured to extract the first from the register unit according to a storage format of the first data block if the data read authorization indication is used to indicate authorization data read Target data in the data block, and continuously buffering the target data into the first FIFO unit 724;

The first FIFO unit 724 is configured to continuously cache the target data that needs to be transported;

The first write data unit 723 is configured to continuously extract the target data to be transported from the first FIFO unit 724 and send the target data to the storage medium for storage.

In an optional embodiment, the second storage control unit 730 includes a second control unit 731, a second read data unit 732, a second write data unit 733, a second FIFO FIFO unit 734, and a second authorization unit 735. ;

The second control unit 731 is configured to acquire the data handling instruction, and send the data handling instruction to the second read data unit 732;

The second authorization unit 735 is configured to determine a data read authorization indication according to an authorization factor, and send the data read authorization indication to the second read data unit 732; wherein the data read authorization indication is used for Determining whether to authorize reading the target data to be carried, the authorization factor comprising at least one of: whether the occupied storage space in the second FIFO unit exceeds a preset threshold, and the target data is prioritized Level and priority of the first data block;

The second read data unit 732 is configured to continuously extract the target to be transported from the storage medium according to the data handling instruction, in a case where the data read authorization indication is used to indicate authorization data reading. Data, the target data is buffered into the second FIFO unit 734 according to a storage format of the first data block;

The second FIFO unit 734 is configured to cache the target data that meets the storage format;

The second write data unit 733 is configured to extract the target data conforming to the storage format from the second FIFO unit 734, and send the target data to the register unit for storage.

Referring to FIG. 8, FIG. 8 is a schematic structural diagram of a computing device according to an embodiment of the present invention. The computing device may be a device with a neural network processor and a communication network function, such as a smart phone, a tablet computer, or a smart wearable device. As shown in FIG. 8 , the computing device in the embodiment of the present invention may include a display screen and a button. a module, a speaker, a pickup, etc., and further comprising: at least one bus 501, at least one processor 502 connected to the bus 501, and at least one memory 503 connected to the bus 501, and a communication device 505 for implementing a communication function, which consumes power for each terminal Module powered power supply unit 504.

The processor 502 can call the code stored in the memory 503 to perform related functions via the bus 501, wherein the memory 503 includes an operating system, a data handling application. The processor 502 is configured to perform all or part of the implementation steps provided by the method embodiment as described above.

The embodiment of the present invention further provides a computer readable storage medium, wherein the computer readable storage medium can store a program, and the program includes some or all of the steps described in the foregoing method embodiments.

The embodiment of the present application further provides a computer program product, comprising: a non-transitory computer readable storage medium storing a computer program, the computer program being operative to cause a computer to perform the operations as recited in the foregoing method embodiments Some or all of the steps.

It should be noted that, for the foregoing method embodiments, for the sake of simple description, they are all expressed as a series of action combinations, but those skilled in the art should understand that the present invention is not limited by the described action sequence. Because certain steps may be performed in other sequences or concurrently in accordance with the present invention. In addition, those skilled in the art should also understand that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.

In the above embodiments, the descriptions of the various embodiments are different, and the details that are not detailed in a certain embodiment can be referred to the related descriptions of other embodiments.

In the several embodiments provided herein, it should be understood that the disclosed apparatus may be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the unit is only a logical function division. In actual implementation, there may be another division manner, for example, multiple units or components may be combined or may be Integrate into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interface, device or unit, and may be electrical or otherwise.

The units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, may be located in one place, or may be distributed to multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above integrated unit can be implemented in the form of hardware or in the form of a software functional unit.

The integrated unit, if implemented in the form of a software functional unit and sold or used as a standalone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention, which is essential or contributes to the prior art, or all or part of the technical solution, may be embodied in the form of a software product stored in a storage medium. A number of instructions are included to cause a computer device (which may be a personal computer, server or network device, etc.) to perform all or part of the steps of the methods described in various embodiments of the present invention. The foregoing storage medium includes: a U disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a removable hard disk, a magnetic disk, or an optical disk, and the like. .

The above embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to be limiting; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art will understand that The technical solutions described in the embodiments are modified, or some of the technical features are replaced by equivalents; and the modifications or substitutions do not deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims (12)

1. A data handling method, characterized in that it is applied to a computing device, the computing device comprising: a storage medium, a register unit, and a storage control unit, the method comprising:

   The storage control unit acquires a data handling instruction, where the data handling instruction includes indication information, where the indication information is used to indicate target data to be carried and a storage format of the first data block where the target data is located;

   The storage control unit completes the handling of the target data between the storage medium and the register unit according to a storage format of the first data block.
2. The method according to claim 1, wherein said first data block is composed of C H*W data blocks, wherein C represents the number of channels required to transmit said first data block, H and W represents the height and width of the data block, respectively;

   The indication information includes at least one of the following information: a first conveyance indication of the data block in the width direction, a width W of the data block in the width direction, and a second dimension of the data block in the height direction. a transport indication, a height H of the data block in the height direction, a storage interval between the data blocks in the width direction, a storage amount M _{1 of} the data block in the width direction, and a between the data blocks a storage interval in the height direction, a storage amount M ₂ of the data block in the height direction, and a storage interval of the batch data block in the height direction; wherein the total number of data blocks included in the batch data block is M ₁ * M ₂ for indicating data carrying capability of the computing device;

   The first indication for instructing conveyance of the data block in the width direction of each successive data K ₁ determines a target data handling required;

   The second transport indication is used to indicate that the data block determines a target data to be transported for every consecutive K ₂ data in a height direction;

   Wherein, the target data is data in the data block, and M ₁ , M ₂ , K ₁ and K ₂ are all positive integers.
3. The method according to claim 1 or 2, wherein the storage control unit comprises a first storage control unit and a second storage control unit;

   The storing, by the storage control unit, performing the handling of the target data between the storage medium and the register unit according to a storage format of the first data block includes:

   The first storage control unit extracts target data in the first data block from the register unit according to a storage format of the first data block, and continuously stores the target data into the storage medium; or,

   The second storage control unit acquires the target data continuously stored from the storage medium, and stores the target data into the register unit according to a storage format of the first data block.
4. The method according to any one of claims 1 to 3, wherein the first storage control unit comprises a first control unit, a first read data unit, a first write data unit, and a first FIFO FIFO. a unit and a first authorization unit;

   The storing, by the storage control unit, performing the handling of the target data between the storage medium and the register unit according to a storage format of the first data block includes:

   The first control unit sends the acquired data handling instruction to the first read data unit;

   Determining, by the first authorization unit, a data read authorization indication according to an authorization factor, and transmitting the data read authorization indication to the first read data unit; wherein the data read authorization indication is used to indicate whether to authorize reading Taking the target data to be carried, the authorization factor includes at least one of whether the occupied storage space in the first FIFO unit exceeds a preset threshold, a priority of the target data, and the The priority of the first data block;

   The first read data unit extracts the first data block from the register unit according to a storage format of the first data block, in a case where the data read authorization indication is used to indicate authorization data reading Target data, and continuously buffering the target data into the first FIFO unit;

   The first write data unit continuously extracts the target data to be transported from the first FIFO unit, and sends the target data to the storage medium for storage.
5. The method according to any one of claims 1 to 3, wherein the second storage control unit comprises a second control unit, a second read data unit, a second write data unit, and a second FIFO FIFO. a unit and a second authorization unit;

   The storing, by the storage control unit, performing the handling of the target data between the storage medium and the register unit according to a storage format of the first data block includes:

   The second control unit sends the acquired data handling instruction to the second read data unit;

   Determining, by the second authorization unit, a data read authorization indication according to an authorization factor, and transmitting the data read authorization indication to the second read data unit; wherein the data read authorization indication is used to indicate whether to authorize reading Taking the target data to be carried, the authorization factor includes at least one of whether the occupied storage space in the second FIFO unit exceeds a preset threshold, a priority of the target data, and the The priority of the first data block;

   The second read data unit continuously extracts the target data to be transported from the storage medium according to the data transfer instruction, in a case where the data read authorization indication is used to indicate authorization data reading, and Caching the target data into the second FIFO unit according to a storage format of the first data block;

   The second write data unit extracts the target data corresponding to the storage format from the second FIFO unit, and stores the target data in the register unit.
6. A computing device, comprising: a storage medium, a register unit, and a storage control unit,

   The storage medium and the register unit are both used to store data;

   The storage control unit is configured to acquire a data handling instruction, where the data handling instruction includes indication information, where the indication information is used to indicate target data to be carried and a storage format of the first data block where the target data is located;

   The storage control unit is further configured to complete the handling of the target data between the storage medium and the register unit according to a storage format of the first data block.
7. The computing device according to claim 6, wherein said first data block is composed of C H*W data blocks, and C represents the number of channels required to transmit said first data block, H and W Representing the height and width of the data block, respectively;

   The indication information includes at least one of the following information: a first transport indication of the data block in the width direction, a width W of the data block in the width direction, and a second transport of the data block in the height direction. An indication, a height H of the data block in the height direction, a storage interval between the data blocks in the width direction, a storage amount M _{1 of} the data block in the width direction, and a height between the data blocks a storage interval in the direction, a storage amount M ₂ of the data block in the height direction, and a storage interval of the batch data block in the height direction, the total number of data blocks included in the batch data block is M ₁ *M ₂ , Used to indicate data handling capabilities of the computing device;

   The first indication for instructing conveyance of the data block in the width direction of each successive data K ₁ determines a target data handling required;

   The second transport indication is used to indicate that the data block determines a target data to be transported for every consecutive K ₂ data in a height direction;

   Wherein, the target data is data in the data block, and M ₁ , M ₂ , K ₁ and K ₂ are all positive integers.
8. The computing device according to claim 6 or 7, wherein the storage control unit comprises a first storage control unit and a second storage control unit;

   The first storage control unit is configured to extract target data in the first data block from the register unit according to a storage format of the first data block, and continuously store the target data to the storage medium in;

   The second storage control unit is configured to acquire the continuously stored target data from the storage medium, and store the target data into the register unit according to a storage format of the first data block.
9. The computing device of claim 8, wherein the first storage control unit comprises a first control unit, a first read data unit, a first write data unit, a first first in first out FIFO unit, and a first authorization unit;

   The first control unit is configured to acquire the data handling instruction, and send the data handling instruction to the first read data unit;

   The first authorization unit is configured to determine a data read authorization indication according to an authorization factor, where the data read authorization indication is used to indicate whether to authorize reading the target data to be carried, and the authorization factor includes at least An item: whether the occupied storage space in the first FIFO unit exceeds a preset threshold, a priority of the target data, and a priority of the first data block;

   The first read data unit is configured to extract the first data from the register unit according to a storage format of the first data block if the data read authorization indication is used to indicate authorization data reading Target data in the block, and continuously buffering the target data into the first FIFO unit;

   The first FIFO unit is configured to continuously cache the target data that needs to be transported;

   The first write data unit is configured to continuously extract the target data to be transported from the first FIFO unit, and send the data to the storage medium for storage.
10. The computing device of claim 8, wherein the second storage control unit comprises a second control unit, a second read data unit, a second write data unit, a second first in first out FIFO unit, and a second authorization unit;

    The second control unit is configured to acquire the data handling instruction, and send the data handling instruction to the second read data unit;

    The second authorization unit is configured to determine a data read authorization indication according to an authorization factor, and send the data read authorization indication to the second read data unit, where the data read authorization indication is used to indicate whether Authorizing to read the target data to be carried, the authorization factor comprising at least one of: whether the occupied storage space in the second FIFO unit exceeds a preset threshold, a priority of the target data, and a priority of the first data block;

    The second read data unit is configured to continuously extract the target data to be transported from the storage medium according to the data handling instruction, in a case where the data read authorization indication is used to indicate authorization data reading Caching the target data into the second FIFO unit according to a storage format of the first data block;

    The second FIFO unit is configured to cache the target data that meets the storage format;

    The second write data unit is configured to extract the target data conforming to the storage format from the second FIFO unit, and send the target data to the register unit for storage.
11. A computing device, comprising: a processor, a memory, a communication interface, and a bus; the processor, the memory, and the communication interface are connected by the bus and complete communication with each other; the memory is stored Executing program code; the processor executing a program corresponding to the executable program code by reading executable program code stored in the memory to perform the method of any one of claims 1-5 .
12. A computer readable storage medium, characterized in that the computer storage medium stores a computer program, the computer program comprising program instructions, the program instructions, when executed by a processor, causing the processor to execute as claimed in claim 1. The method of any of item 5.

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