CN101833368A - Method for managing energy of local dynamic reconfigurable system by coordinatively processing software and hardware - Google Patents
Method for managing energy of local dynamic reconfigurable system by coordinatively processing software and hardware Download PDFInfo
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Abstract
The invention relates to a method for managing energy of a local dynamic reconfigurable system by coordinatively processing software and hardware. The conventional reconfigurable system has a high energy efficiency ratio. The method comprises the following steps of: performing task partitioning on application according to functional modules and establishing corresponding software task and hardware task; acquiring the power consumption of processing the software task and the hardware task, the time of processing the software task and the hardware task and the hardware task configuration time, and selecting the software task and the hardware task according to the principle of local energy optimum; constructing a directed acyclic graph of the application according to the relation constraint between the software task and the hardware task, and calculating the task priority level; and finally, coordinatively processing the software task and the hardware task. Due to the adoption of the method, an application example which is operated on a reconfigurable system of a dynamic part and comprises a plurality of tasks can realize effective energy management, so that the reconfigurable system of the dynamic part processes the application example and reduces energy consumption.
Description
Technical field
The invention belongs to the embedded system field, relate to field programmable gate array local dynamic reconfigurable system, being specifically related to is a kind of energy management method of local dynamic reconfigurable system of software and hardware Coordination Treatment.
Background technology
Appearance along with FPGA restructural technology, changed the method for traditional embedded design greatly, restructural calculates the computation schema as a kind of novel time-space domain, has application prospect widely in embedded and high performance calculating field, has become the trend of current embedded system development.The development of local dynamic reconfigurable technology, represented a kind of new reconfigurable design thought, constitute by microprocessor and reconfigurable hardware mostly, reconfigurable hardware can adopt the fine granularity logical block of FPGA, it also can be the coarseness module of specific function, make that the execution of hardware capability is more flexible, all the more not obvious of the wide gap between the software and hardware, hardware task can be according to demand as software task flexible invocation and configuration.But the energy utilization that how the local dynamic reconfigurable system utilizes the software and hardware coordinated operation to handle is improved system has become a factor of restriction restructural technical development.
Because simple relatively, the data access of the control task of the relatively large computation-intensive of standard, calculated amount relatively during reconfigurable hardware only be fit to carry out is used, though the execution time is short, but increase the power consumption expense of extra FPGA hardware resource and the power consumption expense of reshuffling, may increase the energy expense of total system; But also exist some control relative complex, calculated amount are simple relatively, hardware can't the be comprehensive calculation task and the configuration feature of reconfigurable hardware in actual applications, if carry out with application specific processor separately, though saved the power consumption expense of extra FPGA hardware resource, but the execution time increases greatly, also can increase the energy expense of total system.The hybrid structure of CPU+FPGA, because of the high-performance that has integrated circuit concurrently and the high flexibility of general processor, for the realization Energy Efficient of local dynamic part reconfigurable system provides may.
Because hardware resource utilization and system handles time are the principal elements of decision reconfigurable system power consumption, reconfigurable hardware is being carried out shortcoming and the advantage that exists on the different calculation tasks separately with microprocessor from the above mentioned, if do not have the effective energy management method of local reconfigurable technology and software and hardware coordinated operation advantages separately can't be got up use, the power consumption of dynamic part reconfigurable system is increased significantly.
Summary of the invention
The objective of the invention is at the problems referred to above, a kind of energy management method of local dynamic reconfigurable system of software and hardware Coordination Treatment is provided.A kind of local dynamic reconfigurable system of software and hardware Coordination Treatment, having at least on the restructural chip that embedded microprocessor constituted, the local dynamic reconfigurable system can carry out and dispose a plurality of difference in functionality hardware task (hardware configuration stream task is stored in the external memory storage), different hardware configuration tasks has different setup times, the different utilizations of resources, different processing times, therefore all has different power consumption separately.A common specific application can be resolved into several tasks and carried out, these tasks can be carried out also and can carry out by hardware by software, the Coordination Treatment of utilizing software and hardware to divide realizes the effective management to energy, is a kind of integral energy method that reduces embedded system.
In order to reach above-described purpose, the present invention solves the key point that its technical matters adopts: utilize software and hardware coordinated scheduling and processing that the energy of embedded system is effectively managed in the operational process of local dynamic reconfigurable system, promptly purpose is in order to reduce the energy expense of restructural embedded system.The inking device of microprocessor control hardware task also can move the software task identical with the hardware task function, and promptly software task moves on CPU, and hardware task utilizes the FPGA hardware resource to handle.The processing of software and hardware task choosing is the energy decision according to waiting task in using, dispatching device utilizes ICAP (internal configurations interface) can select the local reconfigurable district (PRR) of these hardware configuration task local configuration to the restructural chip, just discharges this regional hardware resource after hardware task is finished automatically.
The time of described hardware configuration task is weighed with the hardware task resource, and the configuration power consumption is incorporated hardware task operation power consumption into.
All tasks in the application of described local dynamic reconfigurable system can be handled by the software task of microprocessor and also can handle with the hardware resource of FPGA by local dynamic-configuration, but software task and hardware task executed in parallel, and when PRR is configured, to the not influence of other functions of moving; The running frequency f of total system remains unchanged.
Described software and hardware is coordinated the local dynamic reconfigurable system capacity management method of control, realizes possessing on the local dynamic reconfigurable of the support chip, and a plurality of configuring areas can be provided.
Described hardware configuration task has different setup times, the utilization of resources and hardware handles time, thereby has different energy consumptions.
Described software and hardware task is when starting operation, and software task was not terminated before finishing, and hardware task can not be terminated before configuration is finished, and adopts the non-scheduling of seizing.
Described microprocessor can not only be realized the function of software task with software, also available software scheduling and selection hardware configuration task.
The concrete steps of the inventive method are as follows:
Step (1) is carried out task division to using by functional module, forms R
1, R
2, R
3R
nAmount to n division, each is divided and realizes different functions.
Step (2) is divided R to n
1, R
2, R
3R
nSet up software task and hardware task, R
iCorresponding software task has identical realization function with hardware task, but it is different to handle required energy expense.
Software task is designated as: T
S1, T
S2, T
S3T
Sn
Hardware task is designated as: T
H1, T
H2, T
H3T
Hn
Step (3) is obtained time that power consumption (energy consumption in the unit interval), software, hardware task that software, hardware task handles handle and hardware task setup time.
1. obtain the power consumption that software task is handled, the power consumption P the when power consumption that software task is handled is moved by CPU
mQuiescent dissipation P with system
sForm (P
sBe defined as the power consumption unit, determine, by decisions such as bottom FPGA technologies).
2. obtain each hardware task and handle power consumption P
H1, P
H2, P
H3P
HnP
HiDefined Processing tasks T
HiThe power consumption in local configuration district.
3. obtain t setup time of each hardware task
C1, t
C2, t
C3T
Cn
4. obtain each hardware task processing time t
Hw1, t
Hw2, t
Hw3T
Hwn
5. obtain software task processing time t
Sw1, t
Sw2, t
Sw3T
Swn
Step (4) is to R
1, R
2, R
3R
nSelect the software and hardware task according to the local energy principle of optimality.
Described local energy principle of optimality is: if (P
m+ P
s) * t
Swi〉=(P
Hi+ P
s) * (t
Ci+ t
Hwi), select hardware task T
HiHandle R
iDivide.If (P
m+ P
s) * t
Swi＜(P
Hi+ P
s) * (t
Ci+ t
Hwi), select software task T
SiHandle R
iDivide, wherein 1≤i≤n.
Step (5) makes up the directed acyclic graph of using (DAG) according to relation constraint between the task, and this directed acyclic graph has an inlet task.Relation constraint is G between the task, G=(T
i, E
Ij), T wherein
iBe the software task or the hardware task of dividing, E
IjBe T in the directed acyclic graph
iTo T
jThe limit, T
iBe designated as T again
jThe direct precursor task, T
jBe designated as T
iThe immediate successor task;
Step (6) calculation task priority.Computation rule is: one, comprise T
iAfter all predecessor tasks in path dispose, just with T
iPut into ready tabulation, wait for scheduling; Two, software task and hardware task are dispatched task in the ready tabulation by the hardware task priority principle; Three, between the hardware task by long priority scheduling of execution time with keep out of the way principle.
Step (7) Coordination Treatment software and hardware task, concrete grammar is:
A, the enough systems of initialization dynamic part restructural, invocation step (4);
B, invocation step (5) are carried out the inlet task;
The priority of task is safeguarded ready task in c, the ready tabulation of updating task;
D, check whether current microprocessor is idle, if current microprocessor be free time, then execution in step e; Otherwise continue to carry out this step;
E, invocation step (6), scheduling is also carried out the highest task T of ready list medium priority
i, from ready list, delete T
i
If T among the f step e
iBe hardware task T
Hi, judge that then whether current PRR district hardware resource moves, if current PRR district hardware resource moves, then adds T from ready list
iJump to step c, otherwise the configure hardware resource distribution; Execution in step h then;
If T in the g step 5
iBe software task T
Si, process software task T then
SiBack execution in step h disposes;
H, judge whether to load follow-up work to ready tabulation:
1. T
iThe immediate successor task is arranged, then load the immediate successor task in ready tabulation, jump to step c; 2. T
iNo immediate successor task, execution in step i;
I. judge whether ready list is empty:
1. ready tabulation is not empty, jumps to steps d;
2. ready tabulation is empty, execution in step j;
J. all tasks of Ying Yonging dispose.
Can executed in parallel between the hardware task among the present invention, also can executed in parallel (hardware configuration time exception) in hardware task and the software task, and can not executed in parallel between the software task.Utilized the online method that recomputates of task priority in the ready tabulation.
Utilize the inventive method the application example that comprises a plurality of tasks that moves can be realized effective management of energy on the dynamic part reconfigurable system, thereby make the dynamic part reconfigurable system handle the expense that application example reduces energy.Be applicable to that handling complexity in the restructural platform changes tangible algorithm, data processing, application such as video and Flame Image Process, be in conjunction with additional hardware resources power consumption among the FPGA and processing time expense, the mode of employing software and hardware coordinated operation realizes the Energy Efficient management method of local dynamic reconfigurable system, realizes whole energy approximation optimum.
Description of drawings
Software and hardware task and task are placed synoptic diagram in Fig. 1 local dynamic reconfigurable system;
Divide the related power consumption and the time diagram of pairing software and hardware task in Fig. 2 Application Example;
Relation constraint figure between Fig. 3 software and hardware task choosing and task;
Fig. 4 task run and ready list update figure;
Fig. 5 software and hardware Coordination Treatment process flow diagram;
The task scheduling synoptic diagram of Fig. 6 application example;
Fig. 7 energy consumption comparison diagram.
Embodiment
The inventive method is to propose in conjunction with the thought of the restructural technology of FPGA and software and hardware Coordination Treatment.The energy efficiency that is intended to utilize the software and hardware coordinated scheduling in the operational process of local dynamic reconfigurable system and handles embedded system, promptly purpose is in order to reduce the energy expense of restructural embedded system.In the present embodiment by given application being carried out the division of software and hardware processing capacity, software task is stored on the internal storage, hardware task is stored in (for example CF card) on the external memory storage, and the scheduling that utilizes task to handle the local energy optimum is indicated and is selected software processes or hardware handles.The hardware task configuration store is loaded in the corresponding zone of FPFA by the internal configurations interface.
The specific implementation method of embodiment:
One, in the present embodiment a given application is divided into four difference in functionality module: R
1, R
2, R
3, R
4Each is divided the function of module correspondence and can handle with software task, also can handle with hardware task.
Two, set up corresponding software task and hardware task for the division in the present embodiment, as shown in Figure 1, software task for same division has identical processing capacity with hardware task, software task is handled with microprocessor by scheduling, and the hardware task resource allocation leaves on the external memory storage, by hardware task loader (internal configurations interface), be configured to PRR zone on the corresponding fpga chip, utilize the FPGA hardware resource to handle.
Three, obtain power consumption (unit interval in energy consumption), software and hardware task handling time and hardware task setup time of the software and hardware Processing tasks of given application among the embodiment.ISE, EDK, Xpore, Chipscope instrument by XILINX company obtain each software and hardware task processing time, handle power consumption and hardware configuration time.As shown in Figure 2, the needed processing time of different task is different with power consumption, and hardware task also needs extra setup time, wherein P
wBe the power consumption of software and hardware processing corresponding function, t
wBe the time that software and hardware is handled corresponding function, t
cBe the setup time of hardware task, P
sBe quiescent dissipation (by the device technology decision), the unit's of being defined as power consumption.
Four, to the division R of given Application Example
1, R
2, R
3, R
4, select the software and hardware task according to the local energy principle of optimality.As Fig. 3 is between software and hardware task choosing and task shown in the relation constraint figure, divides R
1Select software processes, divide R
3Select software processes, divide R
2Select hardware handles, divide R
4Select hardware handles.Relation constraint is determined after given application is confirmed between the task, and a task must just can be placed in the ready list after all predecessor tasks are handled, and has established when hierarchical relationship and front and back task are closed and tied up to Application Design and select between the task.
Five, the calculating of task priority.Comprise T
iAfter all predecessor tasks in path are handled, T
iJust be placed in the ready tabulation, wait for scheduling; Task priority is by the scheduling of hardware task priority principle in the ready tabulation; By long priority scheduling of execution time with keep out of the way principle, before each task scheduling, all upgrade priority update with corresponding task between the hardware task to leaving ready software task in the ready list and hardware task in.Be illustrated in figure 4 as the renewal of given embodiment ready list, increasing in the ready list of the task and the priority of renewal thereof, its task scheduling is in proper order: T
S1→ T
H4→ T
H2→ T
S3
Six, software and hardware task coordinate disposal route as shown in Figure 5.
A, the enough systems of initialization dynamic part restructural, invocation step four;
B, invocation step five, the inlet task is handled in scheduling;
The priority of task is safeguarded ready task among c, the ready tabulation of the updating task RDYList, and task is only ready and unallocated;
D, check whether current microprocessor is idle:
1. if: execution in step e;
2. if not: repeat this steps d;
E, invocation step five, the highest task T of scheduled for executing ready list RDYList medium priority
iAnd at the highest task T of the ready tabulation of task RDYList deletion
i
If T among the f step e
iBe hardware task T
Hi:
If 1. current PRR district hardware resource moves, the ready tabulation of task RDYList increases task T
iReturn c, otherwise below carrying out 2.;
2. hardware resource configuration;
2. execution in step h is finished in configuration;
If T in the g step 5
iBe software task T
Si:
1. process software task T
Si
2. be finished execution in step h;
H, whether load follow-up work to ready tabulation:
1. T
iThe immediate successor task is arranged, be loaded in the ready tabulation, return step c;
2. T
iNo immediate successor task, execution in step i;
I, judge that whether ready list is empty:
1. ready tabulation is not empty, returns task d;
2. ready tabulation is empty, execution in step j;
All tasks of j, application dispose.
At above-mentioned implementation method to given embodiment, can executed in parallel between the hardware task in the inventive method, also can executed in parallel (hardware configuration time slot exception) in hardware task and the software task, and executed in parallel that can not be truly between the software task.Utilized the online method that recomputates of task priority in the ready tabulation.Figure 6 shows that parallel task carries out the synoptic diagram in timeslice, it is favourable carrying out that a plurality of tasks reduce the quiescent dissipation of system on a timeslice simultaneously.The executing tasks parallelly that has reflected software task and hardware task as timeslice 25-30 and 30-35 among Fig. 6.
Utilize the inventive method the application example that comprises a plurality of tasks that moves can be realized effective management of energy on the dynamic part reconfigurable system, thereby make the dynamic part reconfigurable system handle the expense that application example reduces energy.The mode of employing software and hardware coordinated operation realizes the energy management method of local dynamic reconfigurable system, realizes whole energy approximation optimum.Can verify the energy expense that obtains to reduce whole application to the implementation method that given application example adopts the software and hardware task coordinate to handle, be the management method and traditional comparison that the software and hardware task coordinate is handled as shown in Figure 7, show that management method that the software and hardware task coordinate is handled handles the energy expense minimizing of whole application example based on independent hardware or software processing method.For given application example, reduced energy consumption 75 than the hardware individual processing, reduced energy consumption 51 with respect to the software individual processing.
Claims (1)
1. the local dynamic reconfigurable system capacity management method of a software and hardware Coordination Treatment is characterized in that this method comprises the steps:
Step (1) is carried out task division to using by functional module, forms R
1, R
2, R
3R
nAmount to n division, each is divided and realizes different functions;
Step (2) is divided R to n
1, R
2, R
3R
nSet up software task and hardware task, R
iCorresponding software task has identical realization function with hardware task, but it is different to handle required energy expense;
Software task is designated as: T
S1, T
S2, T
S3T
Sn
Hardware task is designated as: T
H1, T
H2, T
H3T
Hn
Step (3) is obtained time that power consumption, software, hardware task that software, hardware task handles handle and hardware task setup time;
1. obtain the power consumption that software task is handled, the power consumption P the when power consumption that software task is handled is moved by CPU
mQuiescent dissipation P with system
sForm;
2. obtain each hardware task and handle power consumption P
H1, P
H2, P
H3P
HnP
HiDefined Processing tasks T
HiThe power consumption in local configuration district;
3. obtain t setup time of each hardware task
C1, t
C2, t
C3T
Cn
4. obtain each hardware task processing time t
Hw1, t
Hw2, t
Hw3T
Hwn
5. obtain software task processing time t
Sw1, t
Sw2, t
Sw3T
Tsn
Step (4) is to R
1, R
2, R
3R
nSelect the software and hardware task according to the local energy principle of optimality;
Described local energy principle of optimality is: if (P
m+ P
s) * t
Swi〉=(P
Hi+ P
s) * (t
Ci+ t
Hwi), select hardware task T
HiHandle R
iDivide; If (P
m+ P
s) * t
Swi＜(P
Hi+ P
s) * (t
Ci+ t
Hwi), select software task T
SiHandle R
iDivide, wherein 1≤i≤n;
Step (5) makes up the directed acyclic graph of using according to relation constraint between the task, and this directed acyclic graph has an inlet task; Relation constraint is G between the task, G=(T
i, E
Ij), T wherein
iBe the software task or the hardware task of dividing, E
IjBe T in the directed acyclic graph
iTo T
jThe limit, T
iBe designated as T again
jThe direct precursor task, T
jBe designated as T
iThe immediate successor task;
Step (6) calculation task priority; Computation rule is: 1. comprise T
iAfter all predecessor tasks in path dispose, just with T
iPut into ready tabulation, wait for scheduling; 2. software task and hardware task are dispatched task in the ready tabulation by the hardware task priority principle; 3. between the hardware task by long priority scheduling of execution time with keep out of the way principle;
Step (7) Coordination Treatment software and hardware task, concrete grammar is:
A. initialization dynamic part restructural reaches system, invocation step (4);
B. invocation step (5) is carried out the inlet task;
C. the priority of task in the ready tabulation of updating task is safeguarded ready task;
D. check whether current microprocessor is idle, if current microprocessor is free time, then execution in step e; If current microprocessor for busy, then continues to carry out this step;
E. invocation step (6) is dispatched the highest task of ready list medium priority of also carrying out, then this task of deletion from ready list;
If f. the highest task of step e medium priority is hardware task T
Hi, judge that then whether current PRR district hardware resource moves, if current PRR district hardware resource moves, then adds T from ready list
iJump to step c, otherwise the configure hardware resource distribution; Execution in step h then;
If g. step (5) task that medium priority is the highest is software task T
Si, process software task T then
SiBack execution in step h disposes;
H. judge whether to load follow-up work and arrive ready tabulation:
T
iThe immediate successor task is arranged, then load the immediate successor task in ready tabulation, jump to step c;
T
iNo immediate successor task, execution in step i;
I. judge whether ready list is empty:
Ready tabulation is not empty, jumps to steps d;
Ready tabulation is empty, execution in step j;
J. all tasks of Ying Yonging dispose.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101944049A (en) * | 2010-09-16 | 2011-01-12 | 四川大学 | Unified dispatching algorithm of reconfigurable system software/ hardware task based on placement cost |
| CN102360313A (en) * | 2011-09-29 | 2012-02-22 | 中国科学技术大学苏州研究院 | Performance acceleration method of heterogeneous multi-core computing platform on chip |
| CN102413036A (en) * | 2011-08-22 | 2012-04-11 | 复旦大学 | Real-time partially and dynamically reconfigurable system |
| CN102681901A (en) * | 2012-05-08 | 2012-09-19 | 西安交通大学 | Segmental reconfigurable hardware task arranging method |
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6370496B1 (en) * | 1999-01-04 | 2002-04-09 | Intelect Communications, Inc. | System for intelligent visualization and control of computer hardware |
| US20050262379A1 (en) * | 2002-07-24 | 2005-11-24 | Koninkilijke Phillips N.V. | Forestalling long time-outs in processes |
| CN101154186A (en) * | 2007-10-11 | 2008-04-02 | 北京中星微电子有限公司 | Self-diagnosing system and method for coordination processing of software and hardware |
| CN101272052A (en) * | 2008-05-16 | 2008-09-24 | 清华大学 | Event coordination control method of advanced energy management system |
-
2010
- 2010-04-13 CN CN2010101459350A patent/CN101833368B/en not_active Expired - Fee Related
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6370496B1 (en) * | 1999-01-04 | 2002-04-09 | Intelect Communications, Inc. | System for intelligent visualization and control of computer hardware |
| US20050262379A1 (en) * | 2002-07-24 | 2005-11-24 | Koninkilijke Phillips N.V. | Forestalling long time-outs in processes |
| CN101154186A (en) * | 2007-10-11 | 2008-04-02 | 北京中星微电子有限公司 | Self-diagnosing system and method for coordination processing of software and hardware |
| CN101272052A (en) * | 2008-05-16 | 2008-09-24 | 清华大学 | Event coordination control method of advanced energy management system |
Cited By (36)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101944049B (en) * | 2010-09-16 | 2014-04-02 | 四川大学 | Unified dispatching algorithm of reconfigurable system software/ hardware task based on placement cost |
| CN101944049A (en) * | 2010-09-16 | 2011-01-12 | 四川大学 | Unified dispatching algorithm of reconfigurable system software/ hardware task based on placement cost |
| CN102413036A (en) * | 2011-08-22 | 2012-04-11 | 复旦大学 | Real-time partially and dynamically reconfigurable system |
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