CN101833368B - Method for managing energy of local dynamic reconfigurable system by coordinatively processing software and hardware - Google Patents
Method for managing energy of local dynamic reconfigurable system by coordinatively processing software and hardware Download PDFInfo
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- CN101833368B CN101833368B CN2010101459350A CN201010145935A CN101833368B CN 101833368 B CN101833368 B CN 101833368B CN 2010101459350 A CN2010101459350 A CN 2010101459350A CN 201010145935 A CN201010145935 A CN 201010145935A CN 101833368 B CN101833368 B CN 101833368B
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Abstract
The invention relates to a method for managing energy of a local dynamic reconfigurable system by coordinatively processing software and hardware. The conventional reconfigurable system has a high energy efficiency ratio. The method comprises the following steps of: performing task partitioning on application according to functional modules and establishing corresponding software task and hardware task; acquiring the power consumption of processing the software task and the hardware task, the time of processing the software task and the hardware task and the hardware task configuration time, and selecting the software task and the hardware task according to the principle of local energy optimum; constructing a directed acyclic graph of the application according to the relation constraint between the software task and the hardware task, and calculating the task priority level; and finally, coordinatively processing the software task and the hardware task. Due to the adoption of the method, an application example which is operated on a reconfigurable system of a dynamic part and comprises a plurality of tasks can realize effective energy management, so that the reconfigurable system of the dynamic part processes the application example and reduces energy consumption.
Description
Technical field
The invention belongs to the embedded system field, relate to field programmable gate array local dynamic reconfigurable system, being specifically related to is a kind of energy management method of local dynamic reconfigurable system of software and hardware Coordination Treatment.
Background technology
Appearance along with FPGA restructural technology; Big about-face the method for traditional embedded design; Restructural calculates the computation schema as a kind of novel time-space domain, has application prospect widely in embedded and high performance computing field, has become the current embedded system Development Trend.The development of local dynamic reconfigurable technology; Represented a kind of new reconfigurable design thought, be made up of microprocessor and reconfigurable hardware mostly, reconfigurable hardware can adopt the fine granularity logical block of FPGA; It also can be the coarseness module of specific function; Make that the execution of hardware capability is more flexible, all the more not obvious of the wide gap between the software and hardware, hardware task can be according to demand as software task flexible invocation and configuration.But the energy utilization that how the local dynamic reconfigurable system utilizes the software and hardware coordinated operation to handle is improved system has become a factor of restriction restructural technical development.
Because simple relatively, the data access of the control task of the relatively large computation-intensive of standard, calculated amount relatively during reconfigurable hardware only be fit to carry out is used; Though the execution time is short; But increase the power consumption expense of extra FPGA hardware resource and the power consumption expense of reshuffling, may increase the energy expense of total system; But in practical application, also exist some control relative complex, calculated amount are simple relatively, hardware can't the be comprehensive calculation task and the configuration feature of reconfigurable hardware; If carry out with application specific processor separately; Though practiced thrift the power consumption expense of extra FPGA hardware resource; But the execution time increases greatly, also can increase the energy expense of total system.The hybrid structure of CPU+FPGA, because of the high-performance that has integrated circuit concurrently and the high flexibility of general processor, for the realization Energy Efficient of local dynamic part reconfigurable system provides maybe.
Because hardware resource utilization and system handles time are the principal elements of decision reconfigurable system power consumption; Reconfigurable hardware exists shortcoming and advantage separately with microprocessor on the different calculation task of execution from the above mentioned; If do not have the effective energy management method of local reconfigurable technology and software and hardware coordinated operation can't advantages separately got up to use, the power consumption of dynamic part reconfigurable system is increased significantly.
Summary of the invention
The objective of the invention is provides a kind of energy management method of local dynamic reconfigurable system of software and hardware Coordination Treatment to the problems referred to above.A kind of local dynamic reconfigurable system of software and hardware Coordination Treatment; Having at least on the restructural chip that embedded microprocessor constituted; The local dynamic reconfigurable system can carry out and dispose a plurality of difference in functionality hardware task (Hardware configuration stream task is stored in the external memory storage); Different Hardware configuration tasks has different setup times, different resources utilization, different processing time, therefore all has different power consumption separately.A common certain applications can resolve into several tasks to be carried out; These tasks can software executing also can be carried out by hardware; The Coordination Treatment of utilizing software and hardware to divide realizes the effective management to energy, is a kind of integral energy method that reduces embedded system.
In order to reach above-described purpose; The present invention solves the key point that its technical matters adopts: in the operational process of local dynamic reconfigurable system, utilize the software and hardware coordinated scheduling with handling the energy of embedded system effectively to be managed, promptly purpose is in order to reduce the energy expense of restructural embedded system.The inking device of microprocessor control hardware task also can move the software task identical with the hardware task function, and promptly software task moves on CPU, and hardware task utilizes the FPGA hardware resource to handle.It is the energy decision according to waiting task in using that the software and hardware task choosing is handled; Dispatching device utilizes ICAP (internal configurations interface) can select the local reconfigurable district (PRR) of these Hardware configuration task local configuration to the restructural chip, just discharges this regional hardware resource after hardware task is accomplished automatically.
The time of described Hardware configuration task is weighed with the hardware task resource, and the configuration power consumption is incorporated hardware task operation power consumption into.
All tasks in the application of described local dynamic reconfigurable system can be handled through the software task of microprocessor and also can handle with the hardware resource of FPGA through local dynamic-configuration; But software task and hardware task executed in parallel; And when PRR is configured, to the not influence of other functions of moving; The running frequency f of total system remains unchanged.
Described software and hardware is coordinated the local dynamic reconfigurable system capacity management method of control, realizes possessing on the local dynamic reconfigurable of the support chip, and a plurality of configuring areas can be provided.
Described Hardware configuration task has different setup times, the utilization of resources and hardware handles time, thereby has different energy consumption.
Described software and hardware task is when starting operation, and software task was not terminated before accomplishing, and hardware task can not be terminated before configuration is accomplished, and adopts the non-scheduling of seizing.
Described microprocessor can not only be realized the function of software task with software, also available software scheduling and selection Hardware configuration task.
The concrete steps of the inventive method are following:
Step (1), carry out task division by functional module, to form R using
1, R
2, R
3R
nAmount to n division, each is divided and realizes different functions.
Step (2), divide R to n
1, R
2, R
3R
nSet up software task and hardware task, R
iCorresponding software task has identical realization function with hardware task, but it is different to handle required energy expense.
Software task is designated as: T
S2, T
S2, T
S3T
Sn
Hardware task is designated as: T
H1, T
H2, T
H3T
Hn
Step (3), obtain the power consumption (energy consumption in the unit interval) that software, hardware task are handled, the time that software, hardware task are handled and hardware task setup time, specifically:
3-1. obtain the power consumption that software task is handled, the power consumption P the when power consumption that software task is handled is moved by CPU
mQuiescent dissipation P with system
sForm (P
sBe defined as the power consumption unit, confirm, by decisions such as bottom FPGA technologies).
Handle power consumption P 3-2. obtain each hardware task
H1, P
H2, P
H3P
HnP
HiDefined Processing tasks T
HiThe power consumption in local configuration district.
3-3. obtain t setup time of each hardware task
C1, t
C2, t
C3T
Cn
3-4. obtain each hardware task processing time t
Hw1, t
Hw2, t
Hw3T
Hwn
3-5. obtain software task processing time t
Sw1, t
Sw2, t
Sw3T
Swn
Step (4), to R
1, R
2, R
3R
n, select the software and hardware task according to the local energy principle of optimality.
Described local energy principle of optimality is: if (P
m+ P
s) * t
Swi>=(P
Hi+ P
s) * (t
Ci+ t
Hwi), select hardware task T
HiHandle R
iDivide.If (P
m+ P
s) * t
Swi＜(P
Hi+ P
s) * (t
Ci+ t
Hwi), select software task T
SiHandle R
iDivide, wherein 1≤i≤n.
Step (5), according to the directed acyclic graph (DAG) that relation constraint between the task make up to be used, this directed acyclic graph has an inlet task.Relation constraint is G between the task, G=(T
i, E
Ij), T wherein
iBe the software task or the hardware task of dividing, E
IjBe T in the directed acyclic graph
iTo T
jThe limit, T
iBe designated as T again
jThe direct precursor task, T
jBe designated as T
iThe immediate successor task;
Step (6), calculation task priority.Computation rule is: one, comprise T
iAfter all predecessor tasks in path dispose, just with T
iPut into ready tabulation, wait for scheduling; Two, software task and hardware task are dispatched task in the ready tabulation by the hardware task priority principle; Three, between the hardware task by long priority scheduling of execution time with keep out of the way principle.
Step (7), Coordination Treatment software and hardware task, concrete grammar is:
A, initialization dynamic part reconfigurable system, invocation step (4);
B, invocation step (5) are carried out the inlet task;
The priority of task is safeguarded ready task in c, the ready tabulation of updating task;
Whether d, the current microprocessor of inspection be idle, if current microprocessor be free time, then execution in step e; Otherwise continue to carry out this step;
E, invocation step (6), scheduling is also carried out the highest task T of ready list medium priority
i, from ready list, delete T
i
If T among the f step e
iBe hardware task T
Hi, judge that then whether current PRR district hardware resource moves, if current PRR district hardware resource moves, then adds T from ready list
iJump to step c, otherwise the configure hardware resource distribution; Execution in step h then;
If T in the g step (6)
iBe software task T
Si, process software task T then
SiBack execution in step h disposes;
H, judge whether to load follow-up work to ready tabulation:
1. T
iThe immediate successor task is arranged, then load the immediate successor task in ready tabulation, jump to step c;
2. T
iNo immediate successor task, execution in step i;
I. judge whether ready list is empty:
1. ready tabulation is not empty, jumps to steps d;
2. ready tabulation is empty, execution in step j;
J. all tasks of using dispose.
Can executed in parallel between the hardware task among the present invention, also can executed in parallel (Hardware configuration time exception) in hardware task and the software task, and can not executed in parallel between the software task.Utilized the online method that recomputates of task priority in the ready tabulation.
Utilize the inventive method can the application example that comprises a plurality of tasks that on the dynamic part reconfigurable system, moves be realized effective management of energy, thereby make the dynamic part reconfigurable system handle the expense that application example reduces energy.Be applicable to that processing complexity changes tangible algorithm in the restructural platform; Data processing; Application such as video and Flame Image Process; Be to additional hardware resources power consumption and processing time expense among the combination FPGA, the mode of employing software and hardware coordinated operation realizes the Energy Efficient management method of local dynamic reconfigurable system, realizes that whole energy approximation is optimum.
Description of drawings
Software and hardware task and task are placed synoptic diagram in Fig. 1 local dynamic reconfigurable system;
Divide the related power consumption and the time diagram of pairing software and hardware task in Fig. 2 application implementation example;
Relation constraint figure between Fig. 3 software and hardware task choosing and task;
Fig. 4 task run and ready list update figure;
Fig. 5 software and hardware Coordination Treatment process flow diagram;
The task scheduling synoptic diagram of Fig. 6 application example;
Fig. 7 energy consumption comparison diagram.
Embodiment
The inventive method is to combine the restructural technology of FPGA and the thought of software and hardware Coordination Treatment to propose.Be intended to utilize software and hardware coordinated scheduling and the energy efficiency of handling embedded system in the operational process of local dynamic reconfigurable system, promptly purpose is in order to reduce the energy expense of restructural embedded system.In the present embodiment through given application being carried out the division of software and hardware processing capacity; Software task is stored on the internal storage; Hardware task is stored in (for example CF card) on the external memory storage, and the scheduling that utilizes task to handle the local energy optimum is indicated and is selected software processes or hardware handles.The hardware task configuration store is loaded in the corresponding zone of FPFA through the internal configurations interface.
The practical implementation method of embodiment:
One, in the present embodiment a given application is divided into four difference in functionality module: R
1, R
2, R
3, R
4Each is divided the corresponding function of module and can handle with software task, also can handle with hardware task.
Two, set up corresponding software task and hardware task for the division in the present embodiment; As shown in Figure 1, have identical processing capacity for the software task and the hardware task of same division, software task is handled with microprocessor through scheduling; And the hardware task resource allocation leaves on the external memory storage; Through hardware task loader (internal configurations interface), be configured to PRR zone on the corresponding fpga chip, utilize the FPGA hardware resource to handle.
Three, obtain power consumption (unit interval in energy consumption), software and hardware task handling time and hardware task setup time of the software and hardware Processing tasks of given application among the embodiment.ISE, EDK, Xpore, Chipscope instrument through XILINX company obtain each software and hardware task processing time, handle power consumption and Hardware configuration time.As shown in Figure 2, the needed processing time of different task is different with power consumption, and hardware task also needs extra setup time, wherein P
wBe the power consumption of software and hardware processing corresponding function, t
wBe the time that software and hardware is handled corresponding function, t
cBe the setup time of hardware task, P
sBe quiescent dissipation (by the device technology decision), the unit's of being defined as power consumption.
Four, to the routine division R of given application implementation
1, R
2, R
3, R
4, select the software and hardware task according to the local energy principle of optimality.Like Fig. 3 is between software and hardware task choosing and task shown in the relation constraint figure, divides R
1Select software processes, divide R
3Select software processes, divide R
2Select hardware handles, divide R
4Select hardware handles.Relation constraint is confirmed after given application is confirmed between the task, and a task must just can be placed in the ready list after all predecessor tasks are handled, and has established when hierarchical relationship and front and back task are closed and tied up to Application Design and select between the task.
Five, make up the directed acyclic graph of using according to relation constraint between the task, this directed acyclic graph has an inlet task; Relation constraint is G between the task, G=(T
i, E
Ij), T wherein
iBe the software task or the hardware task of dividing, E
IjBe T in the directed acyclic graph
iTo T
jThe limit, T
iBe designated as T again
jThe direct precursor task, T
jBe designated as T
iThe immediate successor task;
Six, the calculating of task priority.Comprise T
iAfter all predecessor tasks in path are handled, T
iJust be placed in the ready tabulation, wait for scheduling; Task priority is by the scheduling of hardware task priority principle in the ready tabulation; Between the hardware task by long priority scheduling of execution time with keep out of the way principle, before each task scheduling, all upgrade the priority update with corresponding task to leaving ready software task and hardware task in the ready list in.Be illustrated in figure 4 as the renewal of given embodiment ready list, increasing in the ready list of the task and the priority of renewal thereof, its task scheduling is in proper order: T
S1→ T
H4→ T
H2→ T
S3
Seven, software and hardware task coordinate disposal route is as shown in Figure 5.
A, initialization dynamic part reconfigurable system, invocation step four;
B, invocation step five, the inlet task is handled in scheduling;
The priority of task is safeguarded ready task among c, the ready tabulation of the updating task RDYList, and task is only ready and unallocated;
Whether d, the current microprocessor of inspection be idle:
1. if: execution in step e;
If 2. deny: continue to carry out this steps d;
E, invocation step six, the highest task T of scheduled for executing ready list RDYList medium priority
iAnd at the highest task T of the ready tabulation of task RDYList deletion
i
If T among the f step e
iBe hardware task T
Hi:
If 1. current PRR district hardware resource moves, the ready tabulation of task RDYList increases task T
iReturn c, otherwise below carrying out 2.;
2. hardware resource configuration;
2. execution in step h is accomplished in configuration;
If T in the g step 6
iBe software task T
Si:
1. process software task T
Si
2. be finished execution in step h;
H, whether load follow-up work to ready tabulation:
1. T
iThe immediate successor task is arranged, be loaded in the ready tabulation, return step c;
2. T
iNo immediate successor task, execution in step i;
I, judge that whether ready list is empty:
1. ready tabulation is not empty, returns task d;
2. ready tabulation is empty, execution in step j;
All tasks of j, application dispose.
To above-mentioned implementation method to given embodiment; Can executed in parallel between the hardware task in the inventive method; Also can executed in parallel (Hardware configuration time slot exception) in hardware task and the software task, and executed in parallel that can not be truly between the software task.Utilized the online method that recomputates of task priority in the ready tabulation.Shown in Figure 6ly is that parallel task carries out the synoptic diagram in timeslice, it is favourable carrying out that a plurality of tasks reduce the quiescent dissipation of system on a timeslice simultaneously.The executing tasks parallelly that has reflected software task and hardware task like timeslice 25-30 and 30-35 among Fig. 6.
Utilize the inventive method can the application example that comprises a plurality of tasks that on the dynamic part reconfigurable system, moves be realized effective management of energy, thereby make the dynamic part reconfigurable system handle the expense that application example reduces energy.The mode of employing software and hardware coordinated operation realizes the energy management method of local dynamic reconfigurable system, realizes that whole energy approximation is optimum.Can verify the energy expense that obtains to reduce whole application to the implementation method that given application example adopts the software and hardware task coordinate to handle; As shown in Figure 7 is the management method and traditional comparison based on independent hardware or software processing method that the software and hardware task coordinate is handled, and shows that management method that the software and hardware task coordinate is handled handles the energy expense minimizing of whole application example.For given application example, reduced energy consumption 75 than the hardware individual processing, reduced energy consumption 51 with respect to the software individual processing.
Claims (1)
1. the local dynamic reconfigurable system capacity management method of a software and hardware Coordination Treatment is characterized in that this method comprises the steps:
Step (1), carry out task division by functional module, to form R using
1, R
2, R
3R
nAmount to n division, each is divided and realizes different functions;
Step (2), divide R to n
1, R
2, R
3R
nSet up software task and hardware task, R
iCorresponding software task has identical realization function with hardware task, but it is different to handle required energy expense, wherein 1≤i≤n;
Software task is designated as: T
S1, T
S2, T
S3T
Sn
Hardware task is designated as: T
H1, T
H2, T
H3T
Hn
Step (3), obtain the power consumption that software, hardware task are handled, the time that software, hardware task are handled and hardware task setup time, be specially:
3-1. obtain the power consumption that software task is handled, the power consumption P the when power consumption that software task is handled is moved by CPU
mQuiescent dissipation P with system
sForm;
Handle power consumption P 3-2. obtain each hardware task
H1, P
H2, P
H3P
HnP
HiDefined Processing tasks T
HiThe power consumption in local configuration district;
3-3. obtain t setup time of each hardware task
C1, t
C2, t
C3T
Cn
3-4. obtain each hardware task processing time t
Hw1, t
Hw2, t
Hw3T
Hwn
3-5. obtain software task processing time t
Sw1, t
Sw2, t
Sw3T
Swn
Step (4), to R
1, R
2, R
3R
n, select the software and hardware task according to the local energy principle of optimality;
Described local energy principle of optimality is: if (P
m+ P
s) * t
Swi>=(P
Hi+ P
s) * (t
Ci+ t
Hwi), select hardware task T
HiHandle R
iDivide; If (P
m+ P
s) * t
Swi＜(P
Hi+ P
s) * (t
Ci+ t
Hwi), select software task T
SiHandle R
iDivide, wherein 1≤i≤n;
Step (5), according to the directed acyclic graph that relation constraint between the task make up to be used, this directed acyclic graph has an inlet task; Relation constraint is G between the task, G=(T
i, E
Ij), T wherein
iBe the software task or the hardware task of dividing, E
IjBe T in the directed acyclic graph
iTo T
jThe limit, T
iBe designated as T again
jThe direct precursor task, T
jBe designated as T
iThe immediate successor task;
Step (6), calculation task priority; Computation rule is: 1. comprise T
iAfter all predecessor tasks in path dispose, just with T
iPut into ready tabulation, wait for scheduling; 2. software task and hardware task are dispatched task in the ready tabulation by the hardware task priority principle; 3. between the hardware task by long priority scheduling of execution time with keep out of the way principle;
Step (7), Coordination Treatment software and hardware task, concrete grammar is:
A, initialization dynamic reconfigurable system, invocation step (4);
B, invocation step (5) are carried out the inlet task;
The priority of task is safeguarded ready task in c, the ready tabulation of updating task;
Whether d, the current microprocessor of inspection be idle, if current microprocessor be free time, then execution in step e; If current microprocessor for busy, then continues to carry out this step;
E, invocation step (6), scheduling is also carried out the highest task of ready list medium priority, then this task of deletion from ready list;
F, the highest task type of judgement priority:
If the type of the task that 1. priority is the highest is hardware task T
HiJudge then whether current local reconfigurable district hardware resource moves,, then from ready list, add the highest task of priority and jump to step c if current local reconfigurable district hardware resource moves; Otherwise carry out the hardware task configuration, then execution in step h;
If the task type that 2. priority is the highest is software task T
Si, execution in step g then;
G, process software task T
SiBack execution in step h disposes;
H, judge whether to load follow-up work to ready tabulation:
1. T
iThe immediate successor task is arranged, then load the immediate successor task in ready tabulation, jump to step c;
2. T
iNo immediate successor task, execution in step i;
I. judge whether ready list is empty:
1. ready tabulation is not empty, jumps to steps d;
2. ready tabulation is empty, execution in step j;
J. all tasks of using dispose.
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| CN101272052A (en) * | 2008-05-16 | 2008-09-24 | 清华大学 | Event coordination control method of advanced energy management system |
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