CN101819449B - Subthreshold MOSFET band-gap reference source - Google Patents

Abstract

The invention discloses a sub-threshold MOSFET bandgap reference source that is resistant to process fluctuations. It is composed of a negative temperature coefficient current generation circuit, a start-up circuit, a positive temperature coefficient current generation circuit, and a reference voltage generation circuit. The negative temperature coefficient of the present invention is The coefficient current generating circuit adopts the body potential modulation technology, and the body terminal of the subthreshold NMOSFET (used to generate the negative temperature coefficient voltage) is separated from the substrate and connected to the output terminal of the modulation voltage generator of the present invention. According to the actual process fluctuations, by adjusting the rheostat in the modulation voltage generator, an appropriate modulation voltage is generated to compensate the change of the threshold voltage of the sub-threshold NMOSFET due to process fluctuations, thereby greatly reducing the impact of process fluctuations on the sub-threshold MOSFET bandgap detrimental effect on the output reference voltage of the reference source.

Description

Subthreshold MOSFET Bandgap Reference

Technical field

The invention relates to a sub-threshold MOSFET bandgap reference source, which belongs to the technical field of integrated circuits.

Background technique

In terms of bandgap reference voltage sources, the problems that need to be solved include: 1. With the continuous shrinking of CMOS process size, the performance degradation and compatibility problems of bipolar transistors in traditional bandgap reference sources are becoming more and more serious; 2. When the power supply voltage is low When the bandgap voltage value (1.26V), the traditional voltage mode bandgap reference source circuit is difficult to apply. In view of the above problems, a sub-threshold MOSFET bandgap reference source structure has been proposed and widely studied. For example, Xia Xiaojuan, Xie Liang and Sun Weifeng, "A CMOS Voltage Reference Based on V _GS and ΔV _GS in the Weak InversionRegion," Chinese Journal of Semiconductors, vol.29(8), pp.1523-1528, 2008. Since The transmission characteristics of MOSFET in the subthreshold region are similar to those of bipolar transistors. The above structure uses subthreshold MOSFETs instead of bipolar transistors, which greatly reduces circuit complexity and power consumption. At the same time, the sub-threshold MOSFET bandgap reference source can use current mode to achieve an arbitrarily low reference output voltage without being limited by the bandgap voltage. In addition, like traditional bandgap references, the output voltage of subthreshold MOSFET bandgap references can achieve good temperature coefficient.

However, since the threshold voltage and other parameters of the MOSFET in the sub-threshold MOSFET structure are greatly affected by process fluctuations, there is a large deviation in the reference output voltage value under different process corners (the maximum deviation reaches ±13.1%), which is difficult to apply to many pairs. It is suitable for occasions where high circuit accuracy is required.

Contents of the invention

The technical problem to be solved by the present invention is to propose a sub-threshold MOSFET bandgap reference source that is resistant to process fluctuations, so as to overcome the fact that the output voltage of the sub-threshold MOSFET bandgap reference source in the prior art is greatly affected by process deviation and is difficult to apply It is a shortcoming in many occasions that require high circuit precision.

The sub-threshold MOSFET bandgap reference source of the present invention adopts the following technical scheme, which is composed of the negative temperature coefficient current generating circuit of the present invention, the prior art starting circuit, the positive temperature coefficient current generating circuit, and the reference voltage generating circuit. The start-up circuit ensures that the entire reference voltage source is in the on-state at all times after power-on. The positive temperature coefficient current generation circuit is used to generate a current branch proportional to the absolute temperature, and the negative temperature coefficient current generation circuit is used to generate a current branch proportional to the absolute temperature. Inversely proportional to the current branch, the above two branch currents converge in the reference voltage generating circuit and cancel the influence of temperature (that is, the current mode), and finally generate a reference voltage with zero temperature coefficient through the resistance. Wherein the negative temperature coefficient current generating circuit of the present invention adopts the body potential modulation technology, and it includes an NMOSFET for monitoring, a bias resistor, two current mirrors and a pole adjustment capacitor in the prior art, and is characterized in that it also include:

A bulk potential-tunable NMOSFET operating in the subthreshold region for generating a negative temperature coefficient voltage;

A modulation voltage generator for generating the modulation voltage.

The body terminal of the NMOSFET used to generate the negative temperature coefficient voltage is separated from the substrate and connected to the output terminal of the modulation voltage generator.

The modulation voltage generator is composed of a rheostat, an operational amplifier and two filter capacitors, wherein the rheostat is used to change the output voltage of the modulation voltage generator, the operational amplifier is used for voltage buffering, and the two filter capacitors are used to filter out Noise and other disturbances introduced by circuits.

The modulation voltage output by the modulation voltage generator is connected to the body terminal of the sub-threshold NMOSFET (used to generate negative temperature coefficient voltage), which can change the parameters such as the threshold voltage of the NMOSFET, and then change the negative temperature coefficient voltage generated by it and the module in which it is located The generated negative temperature coefficient current value finally achieves the purpose of changing the output reference voltage of the bandgap reference source. In practical applications, according to the deviation of the output reference voltage due to process fluctuations, the rheostat in the modulation voltage generator can be adjusted in a targeted manner to generate a suitable modulation voltage, which greatly reduces the impact of process fluctuations on the sub-threshold MOSFET bandgap reference source adverse effect on the output reference voltage.

The advantages and positive effects of the present invention: by modulating the output voltage of the voltage generator to the body potential modulation of the sub-threshold NMOSFET (used to generate negative temperature coefficient voltage), the output reference voltage of the sub-threshold MOSFET bandgap reference source is finally made in different processes It is relatively consistent in the corner case, thereby avoiding the adverse effects of process deviations, and greatly improving the stability and robustness of the circuit without significantly increasing the circuit complexity.

Description of drawings

Fig. 1 is the sub-threshold MOSFET bandgap reference source circuit diagram of prior art;

FIG. 2 is a curve diagram of the reference voltage variation with temperature of the prior art bandgap reference source under different process angles;

Fig. 3 is the circuit diagram of sub-threshold MOSFET bandgap reference source (not including modulation voltage generator) of the present invention;

Fig. 4 is the modulation voltage generator circuit diagram of the present invention;

FIG. 5 is a graph showing the variation of the reference voltage with temperature at different process angles of the bandgap reference source of the present invention.

Detailed ways

Embodiments of the invention:

The prior art subthreshold MOSFET bandgap reference source circuit diagram is shown in FIG. 1 , which consists of a start-up circuit 11 , a positive temperature coefficient current generation circuit 12 , a negative temperature coefficient current generation circuit 13 and a reference voltage generation circuit 14 .

The start-up circuit 11 is composed of PMOSFET MP1, MP2 and NMOSFET MN1, which is used to ensure that the entire bandgap reference source is in the conduction working state at all times after power-on. If the circuit enters the zero current state, the gate terminals of MP1, MP2 and MN1 are all at high level, at this time, the inverter composed of MP1 and MN1 will forcibly pull down the drain terminal of MP1 (gate terminal of MP2) to low level, and MP2 is turned on And the current is injected into the positive temperature coefficient current generating circuit 12, and the entire bandgap reference source is restarted immediately. After being turned on, the potential of the gate terminal of MP3 drops, MP1 is turned on, and MP2 is turned off, so that the influence of the start-up circuit 11 can be ignored when the bandgap reference source is working normally.

Positive temperature coefficient current generation circuit 12 is made up of PMOSFET MP3, MP4, NMOSFET MN2, MN3 and resistor R1, wherein MP3, MP4 form current mirror structure, and MN2, MN3 work in the sub-threshold region, its transmission characteristics (I _D -V _GS ) is similar to a bipolar transistor, so it can replace a bipolar transistor in a traditional bandgap reference, and its transfer characteristic ( _ID -V _GS ) satisfies the relationship (1):

${\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; do</span>}}\mathrm{<span\; class="notranslate">\; Sex</span>}<span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; GS</span>}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; the\; th</span>}}<span\; class="notranslate">\; |</span>}{\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; T</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 1</span>}<span\; class="notranslate">\; )</span>$

Where V _GS , V _th and S are the gate-source voltage, threshold voltage and width-to-length ratio of the MOSFET respectively, V _T =kT/q is the thermal voltage, n is the slope factor, I _D0 is V _GS =V _th , S=1 time leakage current. According to the formula (1), the current I _R1 on R1 (that is, the output current I _PTAT of the positive temperature coefficient current generating circuit 12 ) can be deduced as:

${\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; PTAT</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; GSN</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}<span\; class="notranslate">\; -</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; GSN</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}<span\; class="notranslate">\; \&cong;</span>\mathrm{<span\; class="notranslate">\; no</span>}\frac{\mathrm{<span\; class="notranslate">\; kT</span>}}{\mathrm{<span\; class="notranslate">\; QUR</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}\mathrm{<span\; class="notranslate">\; ln</span>}<span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; P</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; N</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}}{{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; P</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; N</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; )</span>$

Where V _GSN2 and V _GSN3 are the gate-source voltages of MN2 and MN3 respectively, and _SP3 , _SP4 , _SN2 and _SN3 are the width-to-length ratios of MP3, MP4, MN2 and MN3 respectively. It can be known from formula (2) that the output current I _PTAT of the positive temperature coefficient current generating circuit 12 is proportional to the temperature.

The negative temperature coefficient current generating circuit 13 is composed of PMOSFETs MP5, MP6, MP7, NMOSFETMN4, MN5, a bias resistor R2 and a pole adjustment capacitor C1. Wherein MP5 and MP3, MP4 in the positive temperature coefficient current generation circuit 12 constitute a group of current mirror structures, MP6, MP7 constitute another group of current mirror structures, MN5 is used for monitoring (detailed below), and MN4 works in the subthreshold region, it The transmission characteristic ( _ID -V _GS ) of the MN4 satisfies the formula (1), and it can be deduced that the gate-source voltage V _GSN4 of MN4 is:

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; GSN</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}<span\; class="notranslate">\; \&cong;</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; the\; th</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; no</span>}\frac{\mathrm{<span\; class="notranslate">\; kT</span>}}{\mathrm{<span\; class="notranslate">\; q</span>}}\mathrm{<span\; class="notranslate">\; ln</span>}<span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}}}{{\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; D.</span>}\mathrm{<span\; class="notranslate">\; 0</span>}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; N</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; )</span>$

Among them, V _GSN4 is the gate-source voltage of MN4, and S _N4 is the width-to-length ratio of MN4. Since _ID is definitely smaller than I _D0 S _N4 when the MOSFET is in the sub-threshold region, the gate-source voltage V _GSN4 of MN4 decreases with the increase of temperature, and the output current I _CTAT of the negative temperature coefficient current generation circuit 13 is inversely proportional to the temperature, see the formula (4):

${\mathrm{<span\; class="notranslate">\; I</span>}}_{\mathrm{<span\; class="notranslate">\; CTAT</span>}}<span\; class="notranslate">\; =</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; GSN</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; P</span>}\mathrm{<span\; class="notranslate">\; 7</span>}}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; P</span>}\mathrm{<span\; class="notranslate">\; 6</span>}}}<span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 4</span>}<span\; class="notranslate">\; )</span>$

Where S _P6 and S _P7 are the width-to-length ratios of MP6 and MP7 respectively. In addition, there is a negative feedback in the negative temperature coefficient current generation circuit 13: since the leakage current on MN4 is provided by the current mirror composed of MP3, MP4 and MP5, the current value is relatively fixed, so MN5 can monitor the bias resistance through the gate terminal potential The voltage on R2, once an error occurs, MN5 will adjust the current and voltage on R2 through the current mirror composed of MP6 and MP7. The pole adjustment capacitor C1 is used to adjust the dominant pole on the feedback loop.

The reference voltage generating circuit 14 is composed of PMOSFETs MP8 and MP9, a resistor R3 and a capacitor C2. The output current I _PTAT of the positive temperature coefficient current generation circuit 12 and the output current I _CTAT of the negative temperature coefficient current generation circuit 13 are respectively mirrored to the reference voltage generation circuit 14 through MP8 and MP9 to cancel the influence of temperature and generate The final reference voltage Vref, see formula (5)

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; ref</span>}}<span\; class="notranslate">\; =</span>\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 3</span>}<span\; class="notranslate">\; [</span>\frac{\mathrm{<span\; class="notranslate">\; no</span>}{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; T</span>}}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 1</span>}}\mathrm{<span\; class="notranslate">\; ln</span>}<span\; class="notranslate">\; (</span>\frac{{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; P</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; N</span>}\mathrm{<span\; class="notranslate">\; 3</span>}}}{{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; P</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; N</span>}\mathrm{<span\; class="notranslate">\; 2</span>}}}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; +</span>\frac{{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; GSN</span>}\mathrm{<span\; class="notranslate">\; 4</span>}}{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; P</span>}\mathrm{<span\; class="notranslate">\; 7</span>}}}{\mathrm{<span\; class="notranslate">\; R</span>}\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; \&Center\; Dot;</span>{\mathrm{<span\; class="notranslate">\; S</span>}}_{\mathrm{<span\; class="notranslate">\; P</span>}\mathrm{<span\; class="notranslate">\; 6</span>}}}<span\; class="notranslate">\; ]</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 5</span>}<span\; class="notranslate">\; )</span>$

It can be seen from formula (5) that by adjusting the ratio of R1, R2 and R3 reasonably, a reference voltage Vref close to zero temperature coefficient can be obtained finally. Capacitor C2 is used to filter out the influence of high frequency noise on the reference voltage Vref.

Under the 0.13μm CMOS mixed-signal process, the power supply voltage Vdd = 1.2V, and the reference voltage variation curves of the existing bandgap reference source at different process angles with temperature are shown in Figure 2. It can be seen from FIG. 2 that under each process corner (ss, tt and ff), the reference voltage Vref has a good temperature coefficient, and the temperature coefficient TC is 30.38ppm, 31.35ppm and 44.33ppm respectively. However, the difference of reference voltage values under different process angles is close to ±100mV, and the deviation reaches ±13.1%, which is difficult to apply to many occasions that require high circuit accuracy.

Sub-threshold MOSFET bandgap reference source (not including modulation voltage generator) circuit diagram of the present invention as shown in Figure 3, wherein start-up circuit 31, positive temperature coefficient current generation circuit 32 and reference voltage generation circuit 34 and prior art 11, 12 and 14 are the same, the innovation is that in the negative temperature coefficient current generation circuit 33, the body terminal of the subthreshold NMOSFET MN4 (used to generate the negative temperature coefficient voltage) is independent from the substrate, and is used for body potential modulation, and the modulation voltage is defined as Vadjust is connected with the output end of the modulation voltage generator newly added in the present invention.

The modulation voltage generator circuit diagram of the present invention is shown in Fig. 4, and it is made up of rheostat 41, operational amplifier 42 and filter capacitance C3, C4. Among them, the variable resistor 41 enables the modulation voltage output by the modulation voltage generator to vary within the range of 0-Vdd, the operational amplifier 42 can enhance the load capacity of the modulation voltage generator, and ensure the accuracy of the modulation voltage Vadjust, and the filter capacitors C3 and C4 are used for filtering In addition to the noise and other interferences introduced by the circuit, the value of the filter capacitor C4 should not be too large, generally in the range of several hundred fF to several nF, and the value of C3 is generally in the range of several hundred nF to several μF in consideration of the capacitive load effect of the operational amplifier 42 between.

We know that there is a relationship between the threshold voltage V _th of the MOSFET and the body potential as in formula (6)

${\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; the\; th</span>}}<span\; class="notranslate">\; =</span>{\mathrm{<span\; class="notranslate">\; V</span>}}_{\mathrm{<span\; class="notranslate">\; the\; th</span>}\mathrm{<span\; class="notranslate">\; 0</span>}}<span\; class="notranslate">\; +</span>\mathrm{<span\; class="notranslate">\; \&gamma;</span>}<span\; class="notranslate">\; (</span>\sqrt{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; \&phi;</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}<span\; class="notranslate">\; |</span><span\; class="notranslate">\; +</span>{\mathrm{<span\; class="notranslate">\; v</span>}}_{\mathrm{<span\; class="notranslate">\; SB</span>}}}<span\; class="notranslate">\; -</span>\sqrt{\mathrm{<span\; class="notranslate">\; 2</span>}<span\; class="notranslate">\; |</span>{\mathrm{<span\; class="notranslate">\; \&phi;</span>}}_{\mathrm{<span\; class="notranslate">\; f</span>}}<span\; class="notranslate">\; |</span>}<span\; class="notranslate">\; )</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; -</span><span\; class="notranslate">\; (</span>\mathrm{<span\; class="notranslate">\; 6</span>}<span\; class="notranslate">\; )</span>$

Where v _SB is the source-to-body voltage of the MOSFET, V _th0 is the threshold voltage when v _SB =0, γ is the body effect coefficient, and φ _F is the Fermi potential. It can be known from the above formula that the threshold voltage of the MOSFET can be changed through body potential modulation (adjusting v _SB ).

Therefore, connecting the modulation voltage Vadjust to the body terminal of the sub-threshold NMOSFET MN4 can effectively change the threshold voltage of MN4. From equations (3) to (5), it can be seen that the change of the threshold voltage of MN4 will lead to a decrease in the gate-source voltage V _GSN4 of MN4 Change, and then change the reference voltage Vref output by the bandgap reference source. Utilizing this feature, we can adjust the rheostat 41 in the modulation voltage generator to generate a suitable modulation voltage Vadjust to compensate the change of the threshold voltage of MN4 due to process fluctuations, thereby greatly reducing the impact of process fluctuations on the sub-threshold MOSFET bandgap Adverse effects of the reference voltage Vref output by the reference source.

Fig. 5 shows the variation curves of the reference voltage versus temperature of the bandgap reference source of the present invention under different process angles. Due to the introduction of body potential modulation technology, the difference of reference voltage values under different process angles is only ±25mV, and the deviation is ±3.2%, which shows a significant improvement. The temperature coefficient TC of the bandgap reference source of the present invention is slightly worse than that of the prior art at the ff and ss process angles, because the symmetry between MN4 and MN2 and MN3 in the positive temperature coefficient current generation circuit 12 is different after MN4 is modulated by the body potential. becomes worse, but the temperature coefficient index of the bandgap reference source of the present invention is still applicable to most high-precision circuit occasions.

In summary, it is only a preferred embodiment of the present invention, and is not used to limit the implementation scope of the present invention, that is, all equivalent changes and modifications made according to the content of the patent scope of the present invention shall be included in the scope of the present invention. technology category.

Claims (1)

1. A sub-threshold MOSFET bandgap reference source comprising Start the circuit (31) to ensure that the entire reference source is in a conduction working state at all times after power-on; A positive temperature coefficient current generating circuit (32), used to generate a branch current proportional to the absolute temperature; Negative temperature coefficient current generating circuit (33), used to generate a branch current inversely proportional to the absolute temperature; The reference voltage generating circuit (34) merges the above two branch currents and offsets the influence of temperature, and finally generates a reference voltage with zero temperature coefficient; It is characterized in that: the negative temperature coefficient current generating circuit (33) is composed of a first PMOSFET (MP5), a second PMOSFET (MP6), a third PMOSFET (MP7), a first NMOSFET (MN4), a second NMOSFET (MN5 ), a bias resistor (R2), a pole adjustment capacitor (C1) and a modulation voltage generator circuit, wherein the modulation voltage generator circuit is composed of a rheostat (41), an operational amplifier (42) and the first filter capacitor (C3), the first Two filter capacitors (C4) are formed; the first NMOSFET (MN4) works in the subthreshold region, and the bulk terminal of the first NMOSFET (MN4) is connected to the output terminal of the operational amplifier (42) in the modulation voltage generator, and the first NMOSFET ( The source terminal of MN4) is connected to the reference ground (GND), the drain terminal of the first NMOSFET (MN4) is connected to the drain terminal of the first PMOSFET (MP5), the gate terminal of the second NMOSFET (MN5), and one terminal of the pole adjustment capacitor (C1) The other end of the pole adjustment capacitor (C1) is connected to the reference ground (GND), the gate end of the first NMOSFET (MN4) is connected to one end of the bias resistor (R2) and the drain end of the second PMOSFET (MP6), and the bias The other end of the resistor (R2) is connected to the reference ground (GND), the drain end of the second NMOSFET (MN5) is connected to the drain end of the third PMOSFET (MP7) and the gate end of the third PMOSFET (MP7), and the second NMOSFET (MN5) ) are connected to the reference ground (GND), the source and body of the first PMOSFET (MP5) are connected to the reference power supply (Vdd), the gate of the second PMOSFET (MP6) is connected to the third PMOSFET (MP7 ) is connected to the drain terminal of the third PMOSFET (MP7), and the source terminal and body terminal of the second PMOSFET (MP6) and the third PMOSFET (MP7) are connected to the reference power supply (Vdd); when the modulation voltage occurs In the converter circuit, the first end of the rheostat (41) is connected to the reference power supply (Vdd), the second end is connected to the reference ground (GND), and the third end is connected to the positive input end of the operational amplifier (42) and the first filter capacitor (C3). One end of the first filter capacitor (C3) is connected to the reference ground (GND), the output terminal of the operational amplifier (42) is connected to its own negative input terminal and one end of the second filter capacitor (C4), and the operational amplifier (42) ) is also the output end of the modulation voltage generator circuit, and the other end of the second filter capacitor (C4) is connected to the reference ground (GND).

Images