CN101814278B - Dual-gate liquid crystal display device and driving method thereof - Google Patents
Dual-gate liquid crystal display device and driving method thereof Download PDFInfo
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- CN101814278B CN101814278B CN 201010146208 CN201010146208A CN101814278B CN 101814278 B CN101814278 B CN 101814278B CN 201010146208 CN201010146208 CN 201010146208 CN 201010146208 A CN201010146208 A CN 201010146208A CN 101814278 B CN101814278 B CN 101814278B
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Abstract
The invention relates to a dual-gate liquid crystal display device and a driving method thereof, and the driving method of the dual-gate liquid crystal display device adjusts main charging time and pre-charging time according to the polarity of data driving signals of a pixel unit in a main charging period and a pre-charging period to enable the pixel unit to have enough time to reach target potential. And simultaneously, the driving method utilizes an output feedback signal to control the time for the data driving signal to be written in the pixel unit in the main charging period, thus enabling the charge quantity written in each pixel unit to be equal. The device and the method solve the problem that bad picture display of the pixel units in the liquid crystal display device owing to undercharge.
Description
Technical field
The present invention is relevant to a kind of dual-gate liquid crystal display device and driving method thereof, espespecially a kind of dual-gate liquid crystal display device and driving method thereof that improves display quality.
Background technology
Liquid crystal display (liquid crystal display, LCD) have low radiation, volume is little and the advantage such as low power consuming, replace gradually traditional cathode-ray tube (CRT) (cathode ray tube, CRT) display, and then be widely used in mobile computer, personal digital assistant (personal digital assistant, PDA), flat-surface television, or on the information products such as mobile phone.The type of drive of liquid crystal display generally can use time schedule controller (timing controller) to produce various control signal, so that source electrode drive circuit (source driver) and gate drive circuit (gate driver) can drive pixel on the panel according to this with show image.According to the difference of drive pattern, the dot structure of display panels mainly can be divided into two kinds of single lock type (single-gate) dot structure and double-gate type (double-gate) dot structures.Under identical resolution, compared to the display panels that adopts single lock type dot structure, adopt the gate line number of the display panels of double-gate type dot structure can increase twice, the data line number then can be reduced to 1/2nd, therefore adopts the display panels of double-gate type dot structure to use more gate drive chip and less source driving chip.Because cost and the power consumption of gate drive chip are low than source driving chip all, therefore adopt the design of double-gate type dot structure can reduce production costs and power consumption.
Please refer to Fig. 1, Fig. 1 is the synoptic diagram that adopts the liquid crystal indicator 100 of double-gate type dot structure in the prior art.Liquid crystal indicator 100 comprises a display panels 110, one source pole driving circuit 120, a gate drive circuit 130, and time schedule controller 140.Display panels 110 is provided with a plurality of data lines DL
1～DL
m, a plurality of gate lines GL
1～GL
n, and a picture element matrix.Picture element matrix comprises a plurality of pixel cell P
LAnd P
R, each pixel cell comprises a thin film transistor switch TFT, a liquid crystal capacitance C
LCWith a storage capacitors C
ST, be respectively coupled to corresponding data line, corresponding gate line, and a common voltage V
COMIn liquid crystal indicator 100, two adjacent capable pixel cell P
LAnd P
RBe coupled to the corresponding data line of same, wherein odd-numbered line pixel cell P
LBe coupled to corresponding odd number bar gate line GL
1, GL
3..., GL
N-1, and even number line pixel cell P
RThen be coupled to corresponding even number bar gate line GL
2, GL
4..., GL
n
Please refer to Fig. 2, the sequential chart when Fig. 2 is liquid crystal indicator 100 running of prior art.Fig. 2 has shown bolt-lock pulse signal TP, gate trigger signal SG
1～SG
4, and the current potential V of pixel cell
+-, V
--, V
-+, V
++Bolt-lock pulse signal TP is equifrequent pulse signal, is used for allowing interior pixel cell of each cycle that fixedly duration of charging T is all arranged
ONV
+-, V
--, V
-+, V
++Represent the two adjacent pixel cell P that are coupled to same data line in a certain row pixel cell
LAnd P
RCurrent potential.Suppose in cycle T 1～T5, the data-driven signal sequentially present positive polarity, negative polarity, negative polarity, positive polarity and positive polarity (by among Fig. 2 "+" and "-" represent).To be coupled to gate line GL
1～GL
4Two row pixel cells explain: in cycle T 1, gate trigger signal SG
1Tool activation current potential (noble potential), positive polarity data-driven signal can see through the transistor switch TFT of conducting to the odd-numbered line pixel cell P in the first row pixel cell
LCarry out precharge; In cycle T 2, gate trigger signal SG
1And SG
2While tool activation current potential, negative polarity data-driven signal can see through the transistor switch TFT of conducting to the odd-numbered line pixel cell P in the first row pixel cell
LLead charging, simultaneously to the even number line pixel cell P in the first row pixel cell
RCarry out precharge; In cycle T 3, gate trigger signal SG
2And SG
3While tool activation current potential, negative polarity data-driven signal can see through the transistor switch TFT of conducting to the even number line pixel cell P in the first row pixel cell
RLead charging, simultaneously to the odd-numbered line pixel cell P in the secondary series pixel cell
LCarry out precharge; In cycle T 4, gate trigger signal SG
3And SG
4While tool activation current potential, positive polarity data-driven signal can be to the odd-numbered line pixel cell P in the secondary series pixel cell
LLead charging, simultaneously to the even number line pixel cell P in the secondary series pixel cell
RCarry out precharge; In cycle T 5, gate trigger signal SG
4Tool activation current potential, positive polarity data-driven signal can see through the transistor switch TFT of conducting to the even number line pixel cell P in the secondary series pixel cell
RLead charging.
In other words, the odd-numbered line pixel cell P in the first row pixel cell
LBe to receive positive polarity data-driven signal in its precharge cycle T1, then receive negative polarity data-driven signal in its main charge cycle T2, its current potential can be by V
+-Represent; Even number line pixel cell P in the first row pixel cell
RAll receive negative polarity data-driven signal in its precharge cycle T2 and main charge cycle T3, its current potential can be by V
--Represent; Odd-numbered line pixel cell P in the secondary series pixel cell
LBe to receive negative polarity data-driven signal in its precharge cycle T3, then receive positive polarity data-driven signal in its main charge cycle T4, its current potential can be by V
-+Represent; Even number line pixel cell P in the secondary series pixel cell
RAll receive positive polarity data-driven signal in its precharge cycle T2 and main charge cycle T3, its current potential is by V
++Represent.
If pixel cell is identical with the polarity of data-driven signal in the precharge cycle in its main charging, pixel cell has enough time and reaches predetermined voltage (such as V
++And V
--Shown in), this moment, the quantity of electric charge of writing pixel unit was represented by the hatched example areas that A2 among Fig. 2 and A4 indicate.If the polarity of pixel cell data-driven signal in its main charging and precharge cycle is opposite, pixel cell needs a period of time reversal potential to reach predetermined voltage (such as V
+-And V
-+Shown in), this moment, the quantity of electric charge of writing pixel unit was represented by the hatched example areas that A1 among Fig. 2 and A3 indicate.As shown in Figure 2, for the image of same GTG value, some pixel cell can cause picture disply bad because of undercharge (area of A1 and A3 is less than the area of A2 and A4).
Summary of the invention
The object of the present invention is to provide a kind of dual-gate liquid crystal display device and driving method thereof, solved in the liquid crystal indicator pixel cell and can cause because of undercharge the bad problem of picture disply.
A kind of driving method of dual-gate liquid crystal display device, it comprises: export the first data-driven signal within the period 1, and then the first pixel cell is carried out precharge; Output the second data-driven signal in second round after this period 1 of continuing, and then this first pixel cell led charging, simultaneously the second pixel cell is carried out precharge, wherein this first pixel cell system is coupled to a data line and the first gate line, and this second pixel cell system is coupled to this data line and the second gate line; Export one the 3rd data-driven signal in period 3 after this second round of continuing, and then this second pixel cell is led charging; And the main duration of charging of adjusting this first pixel cell in precharge time of this first pixel cell in this period 1 and this second round according to the polarity of this first data-driven signal and this second data-driven signal; And adjust that this second data-driven signal writes time of this first pixel cell and the 3rd data-driven signal writes the time of this second pixel cell, and then equated in the main duration of charging of this second pixel cell in main duration of charging of this first pixel cell in this second round and this period 3.
A kind of dual-gate liquid crystal display device, it comprises the first gate line, is used for transmitting the first gate trigger signal; The second gate line, adjacent and be parallel to this first gate line, be used for transmitting the second gate trigger signal; One data line perpendicular to this first and second gate line, is used for transmitting one first data-driven signal and one second data-driven signal; The first pixel cell is coupled to this data line and this first gate line, and it comes display frame according to this first gate trigger signal and this first data-driven signal within the period 1; The second pixel cell is coupled to this data line and this second gate line, in its second round after this period 1 of continuing according to this second gate trigger signal and this second data-driven signal with display frame; One gate drive circuit, it exports this first gate trigger signal and this second gate trigger signal according to bolt-lock pulse signal and output enable signal; Source electrode drive circuit, it produces this first data-driven signal and this second data-driven signal according to image data; And time schedule controller.This time schedule controller comprises a judging unit, and whether the duration of charging that its polarity according to this first data-driven signal and this second data-driven signal is judged the first pixel cell and this second pixel cell pixel cell is enough; And Circuit tuning, its judged result according to this judging unit is adjusted this bolt-lock pulse signal and this output enable signal, so that the quantity of electric charge that writes the quantity of electric charge of this first pixel cell and write this second pixel cell within this period 1 within this second round equates.
The invention solves in the liquid crystal indicator some pixel cells and can cause because of undercharge the bad problem of picture disply, the present invention makes the pixel cell in the liquid crystal indicator have enough time to reach the target current potential, the quantity of electric charge that writes each pixel cell all can be equated, improved the quality of picture disply.
Description of drawings
Fig. 1 is the synoptic diagram of a kind of double-gate type liquid crystal indicator in the prior art.
Fig. 2 is the sequential chart in liquid crystal indicator when running of prior art.
Fig. 3 is the synoptic diagram of a kind of double-gate type liquid crystal indicator among the present invention.
Fig. 4 is the sequential chart when a kind of double-gate type liquid crystal indicator operates among the present invention.
Accompanying drawing meets explanation:
100,200 liquid crystal indicators; 110,210 display panels;
120,220 source electrode drive circuits; 130,230 gate drive circuits;
140,240 time schedule controllers; P
L, P
RPixel cell;
250 judging units; 260 Circuit tunings;
DL
1～DL
mData line; GL
1～GL
nGate line;
C
LCLiquid crystal capacitance; C
STStorage capacitors;
V
COMCommon voltage; The TFT thin film transistor switch.
Embodiment
Please refer to Fig. 3, Fig. 3 is the synoptic diagram that adopts double-gate type liquid crystal indicator 200 among the present invention.Liquid crystal indicator 200 comprises display panels 210, source electrode drive circuit 220, gate drive circuit 230, and time schedule controller 240.Display panels 210 is provided with a plurality of data lines DL
1～DL
m, a plurality of gate lines GL
1～GL
n, and picture element matrix.Picture element matrix comprises a plurality of pixel cell P
LAnd P
R, each pixel cell comprises a thin film transistor switch TFT, a liquid crystal capacitance C
LCWith a storage capacitors C
ST, be respectively coupled to corresponding data line, corresponding gate line, and a common voltage V
COMIn liquid crystal indicator 200, two adjacent capable pixel cell P
LAnd P
RBe coupled to the corresponding data line of same, wherein be arranged at the odd-numbered line pixel cell P in data line left side
LBe coupled to corresponding odd number bar gate line GL
1, GL
3..., GL
N-1, and be arranged at the even number line pixel cell P on data line right side
RThen be coupled to corresponding even number bar gate line GL
2, GL
4..., GL
n
Time schedule controller 240 among the present invention comprises judging unit 250 and Circuit tuning 260, can produce source electrode drive circuit 220 and the required control signal of gate drive circuit 230 runnings, such as bolt-lock pulse signal TP', output enable signal OE and image data DATA etc.Gate drive circuit 230 can be according to bolt-lock pulse signal TP ' and output enable signal OE scan-data line GL sequentially
1～GL
n, and source electrode drive circuit 320 can be exported respectively data-driven signal SD corresponding to the image gray scale value according to image data DATA
1～SD
nTo data line DL
1～DL
m, and then the liquid crystal capacitance C in the corresponding capable pixel cell that charges
LCWith storage capacitors C
STAccording to display frame and type of drive, the polarity of pixel cell data-driven signal in main charge cycle and precharge cycle also can be different, judging unit 250 can judge whether the duration of charging of pixel cell is enough according to display frame and type of drive, Circuit tuning 260 is adjusted bolt-lock pulse signal TP' and output enable signal OE according to judged result again, allows the quantity of electric charge that writes each pixel cell equate.
Please refer to Fig. 4, the sequential chart when Fig. 4 is double-gate type liquid crystal indicator 200 running of the present invention.Fig. 4 has shown bolt-lock pulse signal TP ', output enable signal OE, gate trigger signal SG
1～SG
4, and the current potential V of pixel cell
+-, V
--, V
-+, V
++The pulsed frequency of Circuit tuning 260 capable of regulating bolt-lock pulse signal TP ', so interior pixel cell of each cycle can have the duration of charging T of different length
ON1～T
ON5V
+-, V
--, V
-+, V
++Represent the two adjacent pixel cell P that are coupled to same data line in a certain row pixel cell
LAnd P
RCurrent potential.Suppose in cycle T 1～T5, the data-driven signal sequentially present positive polarity, negative polarity, negative polarity, positive polarity and positive polarity (by among Fig. 4 "+" and "-" represent).To be coupled to gate line GL
1～GL
4Two row pixel cells explain: in cycle T 1, gate trigger signal SG
1Tool activation current potential (noble potential), positive polarity data-driven signal can see through the transistor switch TFT of conducting to the odd-numbered line pixel cell P in the first row pixel cell
LCarry out precharge; In cycle T 2, gate trigger signal SG
1And SG
2While tool activation current potential, negative polarity data-driven signal can see through the transistor switch TFT of conducting to the odd-numbered line pixel cell P in the first row pixel cell
LLead charging, simultaneously to the even number line pixel cell P in the first row pixel cell
RCarry out precharge; In cycle T 3, gate trigger signal SG
2And SG
3While tool activation current potential, negative polarity data-driven signal can see through the transistor switch TFT of conducting to the even number line pixel cell P in the first row pixel cell
RLead charging, simultaneously to the odd-numbered line pixel cell P in the secondary series pixel cell
LCarry out precharge; In cycle T 4, gate trigger signal SG
3And SG
4While tool activation current potential, positive polarity data-driven signal can be to the odd-numbered line pixel cell P in the secondary series pixel cell
LLead charging, simultaneously to the even number line pixel cell P in the secondary series pixel cell
RCarry out precharge; In cycle T 5, gate trigger signal SG
4Tool activation current potential, positive polarity data-driven signal can see through the transistor switch TFT of conducting to the even number line pixel cell P in the secondary series pixel cell
RLead charging.
To the odd-numbered line pixel cell P in the first row pixel cell
L, system receives positive polarity data-driven signal in its precharge cycle T1, and is to receive negative polarity data-driven signal in its main charge cycle T2, and its current potential can be by V
+-Represent.When the polarity of data-driven signal was opposite in judging unit 250 is judged main charging and precharge cycle, Circuit tuning 260 can be adjusted the pulsed frequency of bolt-lock pulse signal TP ', allowed the duration of charging T of pixel cell in precharge cycle T1
ON1Be shorter than the duration of charging T in main charge cycle T2
ON2, and then shorten the required time of reversal potential.Simultaneously, Circuit tuning 260 also can see through the quantity of electric charge B1 that output enable signal OE adjusts the writing pixel unit.
To the even number line pixel cell P in the first row pixel cell
R, all receiving negative polarity data-driven signal in its precharge cycle T2 and the main charge cycle T3, its current potential can be by V
--Represent.Judge main charging when identical with the polarity of data-driven signal in the precharge cycle when judging unit 250, Circuit tuning 260 can be adjusted the pulsed frequency of bolt-lock pulse signal TP ', allows the duration of charging T of pixel cell in precharge cycle T2
ON2Be longer than the duration of charging T in main charge cycle T3
ON3, also can see through the quantity of electric charge B2 that output enable signal OE adjusts the writing pixel unit simultaneously.
To the odd-numbered line pixel cell P in the secondary series pixel cell
L, system receives negative polarity data-driven signal in its precharge cycle T3, and is to receive positive polarity data-driven signal in its main charge cycle T4, and its current potential can be by V
-+Represent.When the polarity of data-driven signal was opposite in judging unit 250 is judged main charging and precharge cycle, Circuit tuning 260 can be adjusted the pulsed frequency of bolt-lock pulse signal TP ', allowed the duration of charging T of pixel cell in precharge cycle T3
ON3Be shorter than the duration of charging T in main charge cycle T4
ON4, and then shorten the required time of reversal potential.Simultaneously, Circuit tuning 260 also can see through the quantity of electric charge B3 that output enable signal OE adjusts the writing pixel unit.
To the even number line pixel cell P in the secondary series pixel cell
R, all receiving positive polarity data-driven signal in its precharge cycle T4 and the main charge cycle T5, its current potential can be by V
++Represent.Judge main charging when identical with the polarity of data-driven signal in the precharge cycle when judging unit 250, Circuit tuning 260 can be adjusted the pulsed frequency of bolt-lock pulse signal TP ', allows the duration of charging T of pixel cell in precharge cycle T4
ON4Be longer than the duration of charging T in main charge cycle T5
ON5, also can see through the quantity of electric charge B4 that output enable signal OE adjusts the writing pixel unit simultaneously.
As shown in Figure 4, pixel cell which kind of polarity of data-driven signal tool in main charge cycle and precharge cycle no matter, the present invention can adjust main duration of charging and precharge time according to type of drive, so that pixel cell has enough time to reach the target current potential.Simultaneously, the time (for example data-driven signal ability writing pixel unit when output enable signal OE tool electronegative potential) that the present invention also provides output enable signal OE to control data-driven signal writing pixel unit in the main charge cycle, the quantity of electric charge that writes each pixel cell all can be equated, therefore can improve the picture disply quality.
The above only is preferred embodiment of the present invention, and all equalizations of doing according to the present patent application claim change and modify, and all should belong to covering scope of the present invention.
Claims (4)
1. the driving method of a dual-gate liquid crystal display device is characterized in that, it comprises:
Within the period 1, export the first data-driven signal, and then the first pixel cell is carried out precharge;
Output the second data-driven signal in second round after this period 1 of continuing, and then this first pixel cell led charging, simultaneously the second pixel cell is carried out precharge, wherein this first pixel cell is coupled to a data line and the first gate line, and this second pixel cell system is coupled to this data line and the second gate line;
Export the 3rd data-driven signal in period 3 after this second round of continuing, and then this second pixel cell is led charging; And the main duration of charging of adjusting this first pixel cell in precharge time of this first pixel cell in this period 1 and this second round according to the polarity of this first data-driven signal and this second data-driven signal; And adjust that this second data-driven signal writes time of this first pixel cell and the 3rd data-driven signal writes the time of this second pixel cell, and then equated in the main duration of charging of this second pixel cell in main duration of charging of this first pixel cell in this second round and this period 3;
Other comprises: when the polarity of this first data-driven signal and this second data-driven signal is opposite, shortens the precharge time of this first pixel cell in this period 1 and increase main duration of charging of this first pixel cell in this second round;
Other comprises: when the polarity of this first data-driven signal and this second data-driven signal is identical, increases the precharge time of this first pixel cell in this period 1 and shorten main duration of charging of this first pixel cell in this second round;
Other comprises: output the 3rd data-driven signal is to carry out precharge to the 3rd pixel cell within this period 3, and wherein the 3rd pixel cell is coupled to this data line and the 3rd gate line.
2. the driving method of a kind of dual-gate liquid crystal display device according to claim 1, it is characterized in that it comprises in addition: the main duration of charging of adjusting this second pixel cell in precharge time of this second pixel cell in this second round and this period 3 according to the polarity of this second data-driven signal and the 3rd data-driven signal.
3. liquid crystal indicator that adopts double-gate-electrode drive architecture is characterized in that it comprises:
The first gate line is used for transmitting the first gate trigger signal;
The second gate line, adjacent and be parallel to this first gate line, be used for transmitting the second gate trigger signal;
The 3rd gate line, adjacent and be parallel to this second gate line, be used for transmitting the 3rd gate trigger signal;
Data line perpendicular to this first, second, and third gate line, is used for transmitting the first data-driven signal, the second data-driven signal and the 3rd data-driven signal;
The first pixel cell is coupled to this data line and this first gate line, and it comes display frame according to this first gate trigger signal and this first data-driven signal within the period 1;
The second pixel cell is coupled to this data line and this second gate line, in its second round after this period 1 of continuing according to this second gate trigger signal and this second data-driven signal with display frame;
The 3rd pixel cell is coupled to this data line and the 3rd gate line, in its period 3 after this second round of continuing according to the 3rd gate trigger signal and the 3rd data-driven signal with display frame;
Gate drive circuit, it exports this first gate trigger signal, this second gate trigger signal and the 3rd gate trigger signal according to a bolt-lock pulse signal and an output enable signal;
Source electrode drive circuit, it produces this first data-driven signal, this second data-driven signal and the 3rd data-driven signal according to an image data;
Output the first data-driven signal carries out precharge to the first pixel cell within the period 1; Output the second data-driven signal is led charging to the first pixel cell within second round, simultaneously the second pixel cell is carried out precharge; Output the 3rd data-driven signal is led charging to the second pixel cell within the period 3, simultaneously the 3rd pixel cell is carried out precharge;
Time schedule controller, it comprises:
Judging unit, its polarity according to this first data-driven signal and this second data-driven signal judges whether the duration of charging of the first pixel cell is enough, judges according to the polarity of this second data-driven signal and the 3rd data-driven signal whether the duration of charging of the second pixel cell pixel cell is enough; And
Circuit tuning, its judged result according to this judging unit is adjusted this bolt-lock pulse signal and this output enable signal, when judgment unit judges goes out the polarity of the first data-driven signal and the second data-driven signal when opposite, Circuit tuning is adjusted the pulsed frequency of bolt-lock pulse signal, make the first pixel cell be shorter than main duration of charging within second round the precharge time within the period 1, Circuit tuning sees through the quantity of electric charge that output enable signal adjustment writes the first pixel cell simultaneously; When judgment unit judges goes out the polarity of the first data-driven signal and the second data-driven signal when identical, Circuit tuning is adjusted the pulsed frequency of bolt-lock pulse signal, make the first pixel cell be longer than main duration of charging within second round the precharge time within the period 1, Circuit tuning sees through the quantity of electric charge that output enable signal adjustment writes the first pixel cell simultaneously; So that the quantity of electric charge that writes the quantity of electric charge of this first pixel cell and write this second pixel cell within second round within the period 3 equates.
4. a kind of liquid crystal indicator that adopts double-gate-electrode drive architecture according to claim 3 is characterized in that, wherein
This first pixel cell comprises:
The first film transistor switch, it comprises:
One control end is coupled to this first gate line;
First end is coupled to this data line; And
The second end;
The first liquid crystal capacitance is coupled between transistorized the second end of this first film and the common voltage; And
The first storage capacitors is coupled between transistorized the second end of this first film and this common voltage; And
This second pixel cell comprises:
The second thin film transistor switch, it comprises:
Control end is coupled to this second gate line;
First end is coupled to this data line; And
The second end;
The second liquid crystal capacitance is coupled between second end and this common voltage of this second thin film transistor (TFT); And
The second storage capacitors is coupled between second end and this common voltage of this second thin film transistor (TFT).
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|---|---|---|---|
| CN 201010146208 CN101814278B (en) | 2010-04-14 | 2010-04-14 | Dual-gate liquid crystal display device and driving method thereof |
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|---|---|---|---|
| CN 201010146208 CN101814278B (en) | 2010-04-14 | 2010-04-14 | Dual-gate liquid crystal display device and driving method thereof |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN102074181B (en) * | 2010-09-07 | 2013-07-03 | 福建华映显示科技有限公司 | Time sequence control method of display panel |
| CN102737591A (en) * | 2011-04-12 | 2012-10-17 | 联咏科技股份有限公司 | Gate driver of dual-gate display and frame control method thereof |
| CN102930809B (en) * | 2011-08-12 | 2016-02-10 | 上海中航光电子有限公司 | The transversely arranged dot structure that bigrid drives and display panel |
| CN104519296A (en) * | 2013-09-27 | 2015-04-15 | 联咏科技股份有限公司 | Digital television, television chip and display method |
| CN103680454A (en) * | 2013-12-20 | 2014-03-26 | 深圳市华星光电技术有限公司 | Display device and display driving method |
| CN104317086A (en) * | 2014-11-14 | 2015-01-28 | 深圳市华星光电技术有限公司 | Method for driving liquid crystal display panel |
| CN105590609B (en) * | 2016-03-11 | 2019-01-22 | 深圳市华星光电技术有限公司 | Driving method for liquid crystal display panel and liquid crystal display panel drive system |
| CN106683629B (en) * | 2016-12-28 | 2019-10-25 | 武汉华星光电技术有限公司 | The driving device and driving method of liquid crystal display panel |
| CN107507575A (en) * | 2017-10-24 | 2017-12-22 | 惠科股份有限公司 | A kind of display device and its driving method and drive system |
| CN109243393B (en) * | 2018-10-29 | 2020-08-04 | 惠科股份有限公司 | Drive circuit and display drive device |
| CN109377927B (en) * | 2018-11-05 | 2022-03-01 | Oppo（重庆）智能科技有限公司 | Driving method, driving circuit, display panel and storage medium |
| CN109658869A (en) * | 2019-01-30 | 2019-04-19 | 惠科股份有限公司 | A kind of display panel, driving method and display device |
| CN109658892A (en) * | 2019-01-30 | 2019-04-19 | 惠科股份有限公司 | The driving method and display device of a kind of display panel, display panel |
| CN113870809B (en) * | 2021-10-19 | 2022-08-16 | 常州欣盛半导体技术股份有限公司 | Pulse frequency modulation time sequence control method, time sequence controller and display device |
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| TW552573B (en) * | 2001-08-21 | 2003-09-11 | Samsung Electronics Co Ltd | Liquid crystal display and driving method thereof |
| KR101032948B1 (en) * | 2004-04-19 | 2011-05-09 | 삼성전자주식회사 | Liquid crystal display and driving method thereof |
| KR101142995B1 (en) * | 2004-12-13 | 2012-05-08 | 삼성전자주식회사 | Display device and driving method thereof |
| US7586476B2 (en) * | 2005-06-15 | 2009-09-08 | Lg. Display Co., Ltd. | Apparatus and method for driving liquid crystal display device |
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