Summary of the invention
The purpose of this invention is to provide a kind of TFT-LCD array base palte and manufacture method and LCD, effectively solve prior art and move technological deficiencies such as causing light leak because of the cylindrical spacer position.
To achieve these goals, the invention provides a kind of TFT-LCD array base palte, comprise the grid line and the data wire that are formed on the substrate, form pixel electrode and thin-film transistor in the pixel region that described grid line and data wire limit, the overlapping place of described grid line and data wire is formed with cylindrical spacer.
The top, end of described cylindrical spacer is located in the recess area that forms on the color membrane substrates.
Described cylindrical spacer and pixel electrode are forming with in a composition technology, and described cylindrical spacer is made up of transparent conductive film that is positioned at lower floor and the photoresist that is positioned at the upper strata.
To achieve these goals, the invention provides a kind of LCD, comprise array base palte and color membrane substrates to box, described array base palte comprises grid line and data wire, described color membrane substrates comprises black matrix, and in the position of black matrix formation recess area, the overlapping place of described grid line and data wire is formed with cylindrical spacer, and the top, end of described cylindrical spacer is located in the described recess area.
Described cylindrical spacer and pixel electrode are forming with in a composition technology, and described cylindrical spacer is made up of transparent conductive film that is positioned at lower floor and the photoresist that is positioned at the upper strata.
To achieve these goals, the present invention also provides a kind of TFT-LCD manufacturing method of array base plate, comprising:
Step 10, form the figure of grid line, gate electrode, data wire, drain electrode, source electrode, TFT raceway groove and passivation layer via hole on substrate, described passivation layer via hole is positioned at the top of drain electrode;
Step 20, on the substrate of completing steps 10 the deposit transparent conductive film, form the figure that comprises pixel electrode and cylindrical spacer by composition technology, described pixel electrode is connected with drain electrode by passivation layer via hole, and described cylindrical spacer is positioned at the overlapping place of grid line and data wire.
Described step 10 can comprise:
Step 11, on substrate deposition grid metallic film, form the figure that comprises grid line and gate electrode by composition technology;
Step 12, on the substrate of completing steps 11, deposit gate insulation layer, semiconductive thin film, doped semiconductor films and metallic film is leaked in the source, form the figure that comprises data wire, drain electrode, source electrode and TFT raceway groove by composition technology;
Step 13, on the substrate of completing steps 12 deposit passivation layer, form the figure comprise passivation layer via hole by composition technology, described passivation layer via hole is positioned at the top of drain electrode.
Described step 10 also can comprise:
Step 21, on substrate deposition grid metallic film, form the figure that comprises grid line and gate electrode by composition technology;
Step 22, on the substrate of completing steps 21, deposit gate insulation layer, semiconductive thin film and doped semiconductor films, form the figure that comprises active layer by composition technology;
Step 23, sedimentary origin leaks metallic film on the substrate of completing steps 22, forms the figure that comprises data wire, drain electrode, source electrode and TFT raceway groove by composition technology;
Step 24, on the substrate of completing steps 23 deposit passivation layer, form the figure comprise passivation layer via hole by composition technology, described passivation layer via hole is positioned at the top of drain electrode.
On the technique scheme basis, described step 20 comprises:
On the substrate of completing steps 10, adopt the method for magnetron sputtering or thermal evaporation, the deposit transparent conductive film;
On transparent conductive film, apply one deck photoresist;
Adopt the exposure of halftoning or gray mask plate, make the complete reserve area of photoresist formation photoresist, photoresist remove zone and photoresist half reserve area fully, the complete reserve area of photoresist is corresponding to cylindrical spacer figure region, photoresist half reserve area is corresponding to pixel electrode figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, and photoresist is removed the photoresist in zone fully and removed the photoresist thickness attenuation of photoresist half reserve area fully;
Etch away the transparent conductive film that photoresist is removed the zone fully fully by etching technics;
Remove the photoresist of photoresist half reserve area by cineration technics, form pixel electrode and cylindrical spacer figure, described pixel electrode is connected with drain electrode by passivation layer via hole, described cylindrical spacer is positioned at the overlapping place of grid line and data wire, is made up of transparent conductive film that is positioned at lower floor and the photoresist that is positioned at the upper strata.
Wherein, the deposit transparent conductive film is: depositing a layer thickness is 100
~3000
Transparent conductive film; At coating one deck photoresist on the transparent conductive film be: applying a layer thickness on transparent conductive film is the photoresist of 3 μ m~5 μ m.
The invention provides a kind of TFT-LCD array base palte and manufacture method and LCD, cylindrical spacer is arranged on the overlapping place of grid line and data wire, and the top, end is located in the recess area that forms on the color membrane substrates, make cylindrical spacer be in a kind of metastable state, even array base palte or color membrane substrates are subjected to the external force extruding or impact, the end of cylindrical spacer also is difficult to move, the dislocation of array base palte and color membrane substrates can not occur, effectively avoid the generation of display defects such as light leak, contact watermark.In addition, because cylindrical spacer of the present invention and pixel electrode have effectively reduced preparation technology forming with in a composition technology, improved production efficiency.
Embodiment
Below by drawings and Examples, technical scheme of the present invention is described in further detail.
Fig. 1 is the plane graph of TFT-LCD array base palte of the present invention, Fig. 2 be among Fig. 1 A1-A1 to profile, Fig. 3 be among Fig. 1 B1-B1 to profile.As Fig. 1~shown in Figure 3, the agent structure of TFT-LCD array base palte of the present invention comprises the grid line 11 that is formed on the substrate 1, data wire 12, pixel electrode 13 and thin-film transistor, orthogonal grid line 11 and data wire 12 have defined pixel region, thin-film transistor and pixel electrode 13 are formed in the pixel region, grid line 11 is used for providing start signal to thin-film transistor, data wire 12 is used for providing data-signal to pixel electrode 13, the overlapping region of grid line 11 and data wire 12 is provided with cylindrical spacer 16, and cylindrical spacer 16 is used to keep the distance between array base palte behind the box and the color membrane substrates.Particularly, thin-film transistor comprises gate electrode 2, gate insulation layer 3, semiconductor layer 4, doping semiconductor layer (ohmic contact layer) 5, source electrode 6, drain electrode 7 and passivation layer 8, and gate electrode 2 is formed on the substrate 1, and is connected with grid line 11; Gate insulation layer 3 is formed on gate electrode 2 and the grid line 11 and covers whole base plate 1, and active layer (semiconductor layer 4 and doping semiconductor layer 5) is formed on the gate insulation layer 3 and is positioned at the top of gate electrode 2; One end of source electrode 6 is positioned at the top of gate electrode 2, the other end is connected with data wire 12, one end of drain electrode 7 is positioned at the top of gate electrode 2, the other end is connected with pixel electrode 13 by the passivation layer via hole of offering on the passivation layer 89, form the TFT channel region between source electrode 6 and the drain electrode 7, the doping semiconductor layer 5 of TFT channel region is etched away fully, exposes semiconductor layer 4; Passivation layer 8 is formed on data wire 12, source electrode 6 and the drain electrode 7 and covers whole base plate 1, offers the passivation layer via hole 9 that drain electrode 7 is connected with pixel electrode 13 in drain electrode 7 positions.Cylindrical spacer 16 is forming with in a composition technology with pixel electrode 13, is made up of transparent conductive film that is positioned at lower floor and the photoresist that is positioned at the upper strata, is positioned at the crossover position of grid line 11 and data wire 12.
In technique scheme of the present invention, can comprise public electrode wire 14 figures, public electrode wire 14 constitutes storage capacitances with pixel electrode 13, forms storage capacitance structure of (Cs onCommon) on public electrode wire.In addition, can also comprise shield bars 15 figures, according to actual needs, shield bars 15 both can be arranged on pixel electrode 13 around, also can only be arranged on the both sides of pixel electrode 13, promptly be positioned at the both sides of data wire 12.In the practical application, public electrode wire 14 and shield bars 15 are arranged to and grid line 11 layer together, and interconnect, and form integrative-structure.
Fig. 4~Figure 20 is the schematic diagram of TFT-LCD array base palte manufacture process of the present invention, can further specify technical scheme of the present invention, in the following description, the alleged composition technology of the present invention comprises technologies such as photoresist coating, mask, exposure, etching, photoresist lift off, and photoresist is example with the positive photoresist.
Fig. 4 is TFT-LCD array base palte of the present invention plane graph after the composition technology for the first time, Fig. 5 be among Fig. 4 A2-A2 to profile, Fig. 6 be among Fig. 4 B2-B2 to profile.At first adopt the method for magnetron sputtering or thermal evaporation, go up deposition one deck grid metallic film at substrate 1 (as glass substrate or quartz base plate), the grid metallic film can adopt metals such as Mo, Al, also can adopt the laminated film (as the Mo/Al/Mo laminated film) that is made of the multiple layer metal film.Adopt normal masks plate (also claiming dull mask plate) that the grid metallic film is carried out composition, on substrate 1, form the figure that comprises gate electrode 2 and grid line 11, as Fig. 4~shown in Figure 6.Present embodiment for the first time in the composition technology, can also be formed with public electrode wire 14 and shield bars 15 figures simultaneously in the pixel region, form storage capacitance structure of (Cs onCommon) on public electrode wire.Public electrode wire 14 is formed between two grid lines 11 with skewed, vertically the shield bars 15 of shape is positioned at the both sides of pixel region, the two ends of public electrode wire 14 are connected with two shield bars 15 respectively, form integrative-structure, make shield bars 15 also participate in forming storage capacitance.In addition, for identical pixel column, the shield bars of adjacent pixel regions 15 interconnects by intercell connector, and the public electrode wire 14 of same pixel row and shield bars 15 are linked into an integrated entity.
Fig. 7 is TFT-LCD array base palte of the present invention plane graph after the composition technology for the second time, Fig. 8 be among Fig. 7 A3-A3 to profile, Fig. 9 be among Fig. 7 B3-B3 to profile.On the substrate of finishing the said structure figure, at first using plasma strengthens chemical vapour deposition (CVD) (being called for short PECVD) method, deposit gate insulation layer 3, semiconductive thin film and doped semiconductor films successively, adopt the method for magnetron sputtering or thermal evaporation then, metallic film is leaked in deposition one deck source.Gate insulation layer 3 can adopt oxide, nitride or oxynitrides, and metallic film is leaked in the source can adopt metals such as Mo, Al, also can adopt the laminated film (as the Mo/Al/Mo laminated film) that is made of the multiple layer metal film.Adopt halftoning or gray mask plate to form data wire 12, source electrode 6, drain electrode 7 and TFT channel region figure, as Fig. 7~shown in Figure 9 by composition technology.The present invention's composition technology for the second time is a kind of composition technology that adopts the multistep lithographic method, with form data wire in four composition technologies of prior art, the source electrode, drain electrode is identical with the process of TFT channel region figure, technical process is specially: at first leak coating one deck photoresist on the metallic film in the source, adopt halftoning or gray mask plate that photoresist is exposed, make photoresist form complete exposure area, unexposed area and half exposure area, wherein unexposed area is corresponding to data wire, source electrode and drain electrode figure region, half exposure area is corresponding to TFT channel region figure region between source electrode and the drain electrode, and complete exposure area is corresponding to the zone beyond the above-mentioned figure.After the development treatment, the photoresist thickness of unexposed area does not change, and forms the complete reserve area of photoresist, the photoresist of complete exposure area is removed fully, form photoresist and remove the zone fully, the photoresist thickness attenuation of half exposure area forms photoresist half reserve area.Leak metallic film, doped semiconductor films and semiconductive thin film by the source that the first time, etching technics etched away complete exposure area fully, form data wire, source electrode and drain electrode figure.By cineration technics, remove the photoresist of half exposure area, expose this regional source and leak metallic film.Leak metallic film and doped semiconductor films by the source that the second time, etching technics etched away half exposure area fully, and etch away the semiconductive thin film of segment thickness, expose semiconductive thin film, form TFT channel region figure.Peel off remaining photoresist at last, finish TFT-LCD array base palte of the present invention composition technology for the second time.After this composition technology, grid line 11 and data wire 12 define pixel region, data wire 12 is between two shield bars 15, one end of source electrode 6 is positioned at the top of gate electrode 2, the other end is connected with data wire 12, and an end of drain electrode 7 is positioned at the top of gate electrode 2, is oppositely arranged with source electrode 6, the doping semiconductor layer 5 of TFT channel region is etched away fully between source electrode 6 and the drain electrode 7, exposes semiconductor layer 4.In addition, the below of data wire 12, source electrode 6 and drain electrode 7 remains with doping semiconductor layer 5 and semiconductor layer 4.
Figure 10 is TFT-LCD array base palte of the present invention plane graph after the composition technology for the third time, Figure 11 be among Figure 10 A4-A4 to profile, Figure 12 be among Figure 10 B4-B4 to profile.On the substrate of finishing the said structure figure, adopt PECVD method deposition one deck passivation layer 8.Passivation layer 8 can adopt oxide, nitride or oxynitrides.Adopt the normal masks plate that passivation layer is carried out composition, form passivation layer via hole 9, passivation layer via hole 9 is positioned at the top of drain electrode 7, as Figure 10~shown in Figure 12.In this composition technology, also be formed with the grid line interface via hole in grid line interface zone (grid line PAD) and the data line interface via hole figures of data line interface zone (data wire PAD) simultaneously, the technology that forms grid line interface via hole and data line interface via pattern by composition technology has been widely used in repeating no more here in the present composition technology.
At last, on the substrate of finishing the said structure figure, adopt the method for magnetron sputtering or thermal evaporation, the deposit transparent conductive film, adopt halftoning or gray mask plate to form pixel electrode 13 and cylindrical spacer 16 figures by composition technology, pixel electrode 13 is formed in the pixel region, is connected with drain electrode 7 by passivation layer via hole 9, cylindrical spacer 16 is formed on the overlapping place of grid line 11 and data wire 12, as Fig. 1~shown in Figure 3.
The 4th composition technology of the present invention is a kind of composition technology that adopts the multistep lithographic method, and Figure 13~Figure 20 describes the process of the 4th composition technology of TFT-LCD array base palte of the present invention in detail.
Figure 13 for deposit transparent conductive film in the 4th composition technology of TFT-LCD array base palte of the present invention after A1-A1 to profile, Figure 14 for deposit transparent conductive film in the 4th composition technology of TFT-LCD array base palte of the present invention after B1-B1 to profile.On the substrate of finishing the said structure figure, adopt the method for magnetron sputtering or thermal evaporation, depositing a layer thickness is 100
~3000
Transparent
conductive film 18, transparent
conductive film 18 can adopt materials such as tin indium oxide (ITO), indium zinc oxide (IZO) or aluminum zinc oxide, also can adopt other metal and metal oxide, as Figure 13 and shown in Figure 14.
Figure 15 for exposure imaging in the 4th composition technology of TFT-LCD array base palte of the present invention after A1-A1 to profile, Figure 16 for exposure imaging in the 4th composition technology of TFT-LCD array base palte of the present invention after B1-B1 to profile.Apply one deck photoresist 19 on transparent conductive film 18, the thickness of photoresist 19 is 3 μ m~5 μ m, can be provided with according to the design height of cylindrical spacer.Adopt the exposure of halftoning or gray mask plate, make photoresist form complete exposure area A, unexposed area B and half exposure area C.Unexposed area B is corresponding to cylindrical spacer figure region, and half exposure area C is corresponding to pixel electrode figure region, and complete exposure area A is corresponding to the zone beyond the above-mentioned figure.After the development treatment, the photoresist thickness of unexposed area B does not change, form the complete reserve area of photoresist, the photoresist of complete exposure area A is removed fully, form photoresist and remove the zone fully, the photoresist thickness attenuation of half exposure area C forms photoresist half reserve area, as Figure 15 and shown in Figure 16.
Figure 17 for etching technics in the 4th composition technology of TFT-LCD array base palte of the present invention after A1-A1 to profile, Figure 18 for etching technics in the 4th composition technology of TFT-LCD array base palte of the present invention after B1-B1 to profile.Etch away the transparent conductive film 18 of complete exposure area A fully by etching technics, form pixel electrode 13 figures, as Figure 17 and shown in Figure 180.After this technology, pixel electrode 13 tops are coated with photoresist 19.
Pass through cineration technics afterwards, remove the photoresist of half exposure area, expose this regional pixel electrode 13 figures, pixel electrode 13 is connected with drain electrode 7 by passivation layer via hole 9, form cylindrical spacer 16 figures at unexposed area, cylindrical spacer 16 is positioned at the overlapping place of grid line 11 and data wire 12, is made up of transparent conductive film that is positioned at lower floor and the photoresist that is positioned at the upper strata, as depicted in figs. 1 and 2.
Four composition technologies discussed above only are a kind of implementation methods of preparation TFT-LCD array base palte of the present invention, can also be by increasing or reduce composition technology number of times, selecting different material or combinations of materials to realize the present invention in actual the use.For example, TFT-LCD array base palte of the present invention composition technology for the second time can adopt the composition technology of normal masks plate to finish by two, promptly form active layer pattern, adopt the composition technology of normal masks plate to form data wire, source electrode, drain electrode and TFT channel region figure by another time by the composition technology that once adopts the normal masks plate.
Figure 19 is the structural representation of LCD of the present invention.LCD comprises establishes therebetween array base palte 10 and color membrane substrates 20 to box together and with liquid crystal folder, array base palte 10 adopts the structure of TFT-LCD array base palte technique scheme of the present invention, color membrane substrates 20 comprises the black matrix 21 that is formed on the substrate, color resin 22 and public electrode 23, color resin comprises redness, blue and green three chromoresins, the main purpose of black matrix 21 is to isolate color resin 22, block the light in light leak zone simultaneously, public electrode 23 is formed on black matrix 21 and the color resin 22, with respect to the higher color resin 22 of location about, the position of black matrix 21 is lower, so color membrane substrates 20 forms recess area in the position of black matrix 21.Cylindrical spacer 16 of the present invention is arranged on the overlapping place of grid line and data wire, and its top, end is located in the recess area, and end face contacts with the bottom surface of recess area.That is to say, cylindrical spacer 16 of the present invention is positioned at the position of black matrix 21, and this position is because black matrix 21 and the color resin around it 22 form recess area, so top, the end of cylindrical spacer 16 is located at lower zone, position, cylindrical spacer 16 forms a kind of metastable structure with recess area, make cylindrical spacer be in a kind of metastable state, even array base palte 10 or color membrane substrates 20 are subjected to the external force extruding or impact, the end of cylindrical spacer 16 also is difficult to move.
The invention provides a kind of TFT-LCD array base palte and LCD, cylindrical spacer is arranged on the overlapping place of grid line and data wire, and the top, end is located in the recess area that forms on the color membrane substrates, make cylindrical spacer be in a kind of metastable state, even array base palte or color membrane substrates are subjected to the external force extruding or impact, the end of cylindrical spacer also is difficult to move, and the dislocation of array base palte and color membrane substrates can not occur, has effectively avoided the generation of display defects such as light leak, contact watermark.In addition, because cylindrical spacer of the present invention and pixel electrode have effectively reduced preparation technology forming with in a composition technology, improved production efficiency.
Figure 20 is the flow chart of TFT-LCD manufacturing method of array base plate of the present invention, comprising:
Step 10, form the figure of grid line, gate electrode, data wire, drain electrode, source electrode, TFT raceway groove and passivation layer via hole on substrate, described passivation layer via hole is positioned at the top of drain electrode;
Step 20, on the substrate of completing steps 10 the deposit transparent conductive film, form the figure that comprises pixel electrode and cylindrical spacer by composition technology, described pixel electrode is connected with drain electrode by passivation layer via hole, and described cylindrical spacer is positioned at the overlapping place of grid line and data wire.
The invention provides a kind of TFT-LCD manufacturing method of array base plate, by cylindrical spacer being arranged on the overlapping place of grid line and data wire, after making array base palte and color membrane substrates to box, the top, end of cylindrical spacer is located in the recess area that forms on the color membrane substrates, make cylindrical spacer be in a kind of metastable state, even array base palte or color membrane substrates are subjected to the external force extruding or impact, the end of cylindrical spacer also is difficult to move, the dislocation of array base palte and color membrane substrates can not occur, effectively avoid the generation of display defects such as light leak, contact watermark.Because cylindrical spacer of the present invention and pixel electrode have effectively reduced preparation technology forming with in a composition technology, have improved production efficiency.
Figure 21 is the flow chart of TFT-LCD manufacturing method of array base plate first embodiment of the present invention, comprising:
Step 11, on substrate deposition grid metallic film, form the figure that comprises grid line and gate electrode by composition technology;
Step 12, on the substrate of completing steps 11, deposit gate insulation layer, semiconductive thin film, doped semiconductor films and metallic film is leaked in the source, form the figure that comprises data wire, drain electrode, source electrode and TFT raceway groove by composition technology;
Step 13, on the substrate of completing steps 12 deposit passivation layer, form the figure comprise passivation layer via hole by composition technology, described passivation layer via hole is positioned at the top of drain electrode;
Step 14, on the substrate of completing steps 13 the deposit transparent conductive film, form the figure that comprises pixel electrode and cylindrical spacer by composition technology, described pixel electrode is connected with drain electrode by passivation layer via hole, and described cylindrical spacer is positioned at the overlapping place of grid line and data wire.
In the present embodiment step 11, at first adopt the method for magnetron sputtering or thermal evaporation, go up deposition one deck grid metallic film at substrate (as glass substrate or quartz base plate), the grid metallic film can adopt metals such as Mo, Al, also can adopt the laminated film (as the Mo/Al/Mo laminated film) that is made of the multiple layer metal film.Adopt the normal masks plate that the grid metallic film is carried out composition, on substrate, form the figure that comprises gate electrode and grid line.In the practical application, can also be formed with public electrode wire and shield bars figure simultaneously in the step 11.Its preparation process is introduced in earlier figures 4~technical scheme shown in Figure 6 in detail.
In the present embodiment step 12, on the substrate of finishing the said structure figure, at first adopt the PECVD method, deposit gate insulation layer, semiconductive thin film and doped semiconductor films successively, adopt the method for magnetron sputtering or thermal evaporation then, metallic film is leaked in deposition one deck source.Gate insulation layer can adopt oxide, nitride or oxynitrides, and metallic film is leaked in the source can adopt metals such as Mo, Al, also can adopt the laminated film (as the Mo/Al/Mo laminated film) that is made of the multiple layer metal film.Adopt halftoning or gray mask plate to form data wire, source electrode, drain electrode and TFT channel region figure by composition technology.Its preparation process is introduced in earlier figures 7~technical scheme shown in Figure 9 in detail.
In the present embodiment step 13, adopt PECVD method deposition one deck passivation layer.Passivation layer can adopt oxide, nitride or oxynitrides.Adopt the normal masks plate that passivation layer is carried out composition, form passivation layer via hole, passivation layer via hole is positioned at the top of drain electrode.Its preparation process is introduced in aforementioned Figure 10~technical scheme shown in Figure 12 in detail.
Figure 22 forms the flow chart of pixel electrode and cylindrical spacer for TFT-LCD manufacturing method of array base plate of the present invention.In technical scheme shown in Figure 21, described step 14 comprises:
Step 141, on the substrate of completing
steps 13, adopt the method for magnetron sputtering or thermal evaporation, depositing a layer thickness is 100
~3000
Transparent conductive film;
Step 142, to apply a layer thickness on described transparent conductive film be the photoresist of 3 μ m~5 μ m;
Step 143, employing halftoning or the exposure of gray mask plate, make the complete reserve area of photoresist formation photoresist, photoresist remove zone and photoresist half reserve area fully, the complete reserve area of photoresist is corresponding to cylindrical spacer figure region, photoresist half reserve area is corresponding to pixel electrode figure region, and photoresist is removed the zone fully corresponding to the zone beyond the above-mentioned figure; After the development treatment, the photoresist thickness of the complete reserve area of photoresist does not change, and photoresist is removed the photoresist in zone fully and removed the photoresist thickness attenuation of photoresist half reserve area fully;
Step 144, by etching technics etch away fully photoresist remove fully the zone transparent conductive film;
Step 145, remove the photoresist of photoresist half reserve area by cineration technics, form pixel electrode and cylindrical spacer figure, described pixel electrode is connected with drain electrode by passivation layer via hole, described cylindrical spacer is positioned at the overlapping place of grid line and data wire, is made up of transparent conductive film that is positioned at lower floor and the photoresist that is positioned at the upper strata.
Present embodiment is a kind of technical scheme that adopts halftoning or gray mask plate to form pixel electrode and cylindrical spacer figure simultaneously by composition technology, its preparation process is introduced in aforementioned Figure 13~technical scheme shown in Figure 180 in detail, repeats no more here.
Figure 23 is the flow chart of TFT-LCD manufacturing method of array base plate second embodiment of the present invention, comprising:
Step 21, on substrate deposition grid metallic film, form the figure that comprises grid line and gate electrode by composition technology;
Step 22, on the substrate of completing steps 21, deposit gate insulation layer, semiconductive thin film and doped semiconductor films, form the figure that comprises active layer by composition technology;
Step 23, sedimentary origin leaks metallic film on the substrate of completing steps 22, forms the figure that comprises data wire, drain electrode, source electrode and TFT raceway groove by composition technology;
Step 24, on the substrate of completing steps 23 deposit passivation layer, form the figure comprise passivation layer via hole by composition technology, described passivation layer via hole is positioned at the top of drain electrode;
Step 25, on the substrate of completing steps 24 the deposit transparent conductive film, form the figure that comprises pixel electrode and cylindrical spacer by composition technology, described pixel electrode is connected with drain electrode by passivation layer via hole, and described cylindrical spacer is positioned at the overlapping place of grid line and data wire.
Present embodiment is a kind of composition technology that adopts the normal masks plate, main flow process and aforementioned first embodiment are basic identical, difference is, the step 12 of aforementioned first embodiment adopts the composition technology of normal masks plate to finish by two, promptly form active layer pattern, adopt the composition technology of normal masks plate to form data wire, source electrode, drain electrode and TFT channel region figure by another time by the composition technology that once adopts the normal masks plate.Adopt the composition technical process of normal masks plate to be well known to those skilled in the art, repeat no more here.
It should be noted that at last: above embodiment is only unrestricted in order to technical scheme of the present invention to be described, although the present invention is had been described in detail with reference to preferred embodiment, those of ordinary skill in the art is to be understood that, can make amendment or be equal to replacement technical scheme of the present invention, and not break away from the spirit and scope of technical solution of the present invention.