CN101795128A

CN101795128A - Detection circuit and sensor device

Info

Publication number: CN101795128A
Application number: CN201010003909A
Authority: CN
Inventors: 杉浦正一; 五十岚敦史
Original assignee: Seiko Instruments Inc
Current assignee: Ablic Inc
Priority date: 2009-01-13
Filing date: 2010-01-13
Publication date: 2010-08-04
Anticipated expiration: 2030-01-13
Also published as: CN101795128B; TW201040557A; CN103762965A; US8183907B2; CN103762965B; JP5283078B2; JP2010166183A; TWI461713B; US20100180059A1; KR101445424B1; KR20100083729A

Abstract

Provided is a detection circuit for monitoring a power supply voltage with a circuit configuration in which power consumption is reduced, and a sensor device including the detection circuit. A detection circuit (100) detects an input signal input thereto to output an output signal. An interrupt condition generating circuit (10a) directly detects a power supply voltage (VDD) supplied thereto from a power supply, and outputs an interrupt signal until the power supply voltage makes a transition to a predetermined voltage range. An interrupt condition reception circuit outputs, as an output signal, a given voltage without allowing an input signal (Vtemp) to be output until an interrupt caused by the interrupt signal is released, and outputs, as an output signal, the input signal by allowing the input signal to be output when the interrupt caused by the interrupt signal is released.

Description

Testing circuit and sensor device

Technical field

The present invention relates to guarantee the testing circuit and the sensor device of the reliability of the signal when power connection, exported.

Background technology

In the testing circuit of uses such as sensor device, stipulated to be suitable for the moved supply voltage scope of this circuit.In this can move the supply voltage scope, can guarantee the regular event of this circuit, guarantee from the reliability of the signal of this circuit output.

When power connection,, thereby occur in the state-transition before the moved supply voltage that reaches above-mentioned because this supply voltage can move that transient state rises before the supply voltage reaching.In testing circuit,, implement the disposal (for example, with reference to patent documentation 1) of control and definite output signal therebetween in order to ensure the reliability of the signal of exporting.

As such disposal, take such disposal sometimes: supply voltage monitoring circuit is set, monitors the supply voltage of being imported, detect the low supply voltage state.For example, in the voltage detection circuit shown in Figure 1 of patent documentation 1,, provide the permission actuating signal to electronic circuit 20 when the supply voltage that will monitor reaches predetermined set value when above.Thus, can prevent that electronic circuit 20 from carrying out misoperation.

And, expectation be that the sensor device of detected state moves with low consumption electric power.Particularly in the temperature sensor of the temperature of detected state, the self-heating owing to sensor device hinders accurate mensuration sometimes.

[patent documentation 1] Japanese kokai publication hei 08-279739 communique

Yet the supply voltage monitoring circuit shown in the patent documentation 1 comprises bleeder resistance.Therefore, although supply voltage monitoring circuit is to detect the circuit that drops to purpose of supply voltage, yet there is such problem: even supply voltage can move in the supply voltage scope, also can be and consume electric power in vain owing to being located at bleeder resistance in the supply voltage monitoring circuit etc.

And, in order to carry out the low consumption electrification, need to improve the impedance of bleeder resistance with the structure that comprises such bleeder resistance.The impedance that improves bleeder resistance becomes the chip area cause of increased, has the problem that causes that cost increases.

Summary of the invention

The present invention finishes in order to address the above problem just, the invention provides a kind of by having cut down the sensor device that the circuit structure that consumes electric power carries out the testing circuit of supply voltage monitoring and has this testing circuit.

In order to address the above problem, the invention provides a kind of testing circuit, this testing circuit detects the input signal imported and output signal is exported, it is characterized in that, this testing circuit has: the interrupt condition generative circuit, supply voltage that is provided directly is provided for it, and exports interrupt signal be converted to the voltage range of regulation at this supply voltage before; And interrupt condition is accepted circuit, it is before the interruption based on described interrupt signal is disengaged, do not allow to export described input signal and export predetermined voltage as output signal, when the interruption based on this interrupt signal was disengaged, permission was exported described input signal and it is exported as output signal.

And, the present invention is in foregoing invention, it is characterized in that, described interrupt condition generative circuit has decision circuit, this decision circuit will be set at an input by the drift potential that the potential difference of predesignating is represented, do not reach the described interrupt signal of output under the situation of this drift potential in the potential difference of two signals being imported, reach in this potential difference under the situation of this drift potential and remove described interrupt signal.

And the present invention is characterized in that in foregoing invention described interrupt condition generative circuit is being removed described interrupt signal playing from power connection through the described interrupt signal of output till the time of predesignating through after this time.

And, the present invention is in foregoing invention, it is characterized in that, described interrupt condition generative circuit is by the comparison based on the threshold potential of predesignating, do not reach the described interrupt signal of output under the situation of this threshold potential at described supply voltage, reach at this supply voltage under the situation of this threshold potential and remove described interrupt signal.

And the present invention is characterized in that in foregoing invention the described threshold potential of predesignating is by the semiconductor element preset threshold current potential that carries out switch motion.

And the present invention is characterized in that in foregoing invention described interrupt condition generative circuit has the holding circuit of the state that keeps described interrupt signal.

And, the present invention is in foregoing invention, it is characterized in that, described interrupt condition generative circuit is playing the indication that resets that described holding circuit is resetted through output till the time of predesignating from power connection, removing the described indication that resets through after this time, reach under the situation of the predetermined voltage of predesignating detecting described supply voltage, described holding circuit is carried out set remove described interrupt signal.

And, the present invention is in foregoing invention, it is characterized in that, described interrupt condition generative circuit is by the comparison based on the threshold potential of predesignating, do not reach the indication that resets that output resets described holding circuit under the situation of this threshold potential at described supply voltage, reach at this supply voltage and remove the described indication that resets under the situation of this threshold potential, reach under the situation of the predetermined voltage of predesignating detecting described supply voltage, described holding circuit is carried out set remove described interrupt signal.

And, the present invention is in foregoing invention, it is characterized in that, described interrupt condition is accepted circuit and was not allowed to export described input signal before the interruption based on described interrupt signal is disengaged and export under the situation of predetermined voltage as the interrupt status of output signal being set to, the signal of output predetermined logic, under the situation of the disarm state that this interrupt status is disengaged, select the logic of output signal according to described input signal.

And, the present invention is in foregoing invention, it is characterized in that, described interrupt condition is accepted circuit and was not allowed to export described input signal before the interruption based on described interrupt signal is disengaged and export under the situation of predetermined voltage as the interrupt status of output signal being set to, the signal of output predetermined potential, under the situation of the disarm state that this interrupt status is disengaged, select the current potential of output signal according to described input signal.

And, the present invention is characterized in that in foregoing invention described testing circuit also has the comparator that detects described input signal, described interrupt condition is accepted the output signal that circuit is transfused to described comparator, and generates the output signal of exporting according to described interrupt signal.

And, the present invention is characterized in that in foregoing invention described testing circuit also has the comparator that detects described input signal, described interrupt condition is accepted circuit and is generated the output signal of exporting according to described interrupt signal, and output signal is input to described comparator.

And, the invention provides a kind of sensor device, it is characterized in that this sensor device has: any described testing circuit in the foregoing invention; And test section, the information that its output is corresponding with detected physical quantity.

And the present invention is characterized in that in foregoing invention described test section is the temperature sensor of detected temperatures.

According to the present invention, testing circuit detects the input signal imported and output signal is exported.The supply voltage that is provided directly is provided the interrupt condition generative circuit, and exports interrupt signal be converted to the voltage range of regulation at this supply voltage before.Interrupt condition is accepted circuit and was not allowed to export input signal before the interruption based on interrupt signal is disengaged and export predetermined voltage as output signal, allows the output input signal and it is exported as output signal when the interruption based on this interrupt signal is disengaged.

Thus, in testing circuit, the interrupt condition generative circuit directly detects supply voltage.Testing circuit does not use the circuit of conversion electric power voltage can detect supply voltage.And, can suppress the needed consumption electric power of voltage transitions, can save the conversion circuitry needed.Promptly, rigidly connect the output signal of logical back output at power supply for testing circuit, detect the voltage range that supply voltage is converted to regulation by the interrupt condition generative circuit, and before removing interrupt signal, accept the predetermined voltage that circuit output is predesignated by interrupt condition, when interrupt signal is disengaged, can allow to export input signal and it is exported as output signal.So, rigidly connect the signal of logical back by avoiding exporting from the expression labile state of testing circuit output at power supply, can also guarantee the reliability of output signal.

Description of drawings

Fig. 1 is the summary construction diagram that the testing circuit of the 1st execution mode of the present invention is shown.

Fig. 2 is the sequential chart that the action of the testing circuit in the 1st execution mode is shown.

Fig. 3 is the summary construction diagram that the testing circuit of the 2nd execution mode is shown.

Fig. 4 is the sequential chart that the action of the testing circuit in the 2nd execution mode is shown.

Fig. 5 is the summary construction diagram that the testing circuit of the 3rd execution mode is shown.

Fig. 6 is the sequential chart that the action of the testing circuit in the 3rd execution mode is shown.

Fig. 7 is the summary construction diagram that the testing circuit of the 4th execution mode is shown.

Fig. 8 is the summary construction diagram that the low supply voltage testing circuit of the 4th execution mode is shown.

Fig. 9 is the figure of action that the low supply voltage testing circuit of the 4th execution mode is shown.

Figure 10 is the sequential chart that the action of the testing circuit in the 4th execution mode is shown.

Figure 11 is the summary construction diagram that the low supply voltage testing circuit of the 5th execution mode is shown.

Figure 12 is the figure of action that the low supply voltage testing circuit of the 5th execution mode is shown.

Figure 13 is the summary construction diagram that the testing circuit of the 6th execution mode is shown.

Figure 14 is the sequential chart that the action of the testing circuit in the 6th execution mode is shown.

Figure 15 is the summary construction diagram that the testing circuit of the 7th execution mode is shown.

Figure 16 is the sequential chart that the action of the testing circuit in the 7th execution mode is shown.

Embodiment

Below, with reference to the testing circuit of description of drawings an embodiment of the invention.

(the 1st execution mode)

Fig. 1 is the summary construction diagram that the testing circuit of the 1st execution mode is shown.

Testing circuit 100 has: interrupt condition generative circuit 10a, interrupt condition are accepted circuit 20a and comparator 30.Interrupt condition generative circuit 10a in the testing circuit 100 has two input terminals (Tip, Tin) and lead-out terminal To.Interrupt condition generative circuit 10a compares the current potential of two signals being imported, detects its potential difference whether more than predetermined value, uses the logical signal after the binaryzation to export testing result.

A form as interrupt condition generative circuit 10a illustrates offset comparator 11.Offset comparator 11 has bias voltage source 11b and comparator 11c.Bias voltage source 11b produces predetermined bias potential Vb, sets the variation of the current potential amount that is produced in the signal of being imported.Comparator 11c detects the potential difference of two signals being imported.

In offset comparator 11, input terminal Tin is connected with the inverting input of comparator 11c via bias voltage source 11b, and input terminal Tip is connected with the in-phase input end of comparator 11c, and the output of comparator 11c is connected with lead-out terminal To.

The signal that is input to input terminal Tin is converted to the current potential that exceeds bias potential Vb by bias voltage source 11b, and is input to comparator 11c.

By adopting this structure, offset comparator 11 relatively is input to the voltage of signals of input terminal Tip by the threshold voltage that exceeds predetermined voltage (bias potential Vb) than the voltage of signals that is input to input terminal Tin.When the low state-transition of the voltage of current potential after the current potential than the signal that is input to input terminal Tin adds bias potential Vb of signal that is input to input terminal Tip becomes than the high state of described voltage, the output signal counter-rotating.This output signal illustrates low level under the former state (than the low state of voltage after adding bias potential Vb).

From the interrupt condition generative circuit 10a output signal identical with the output of offset comparator 11.

Interrupt condition is accepted circuit 20a and is had signal input terminal In, the sub-Cont in control input end and lead-out terminal Out.A form accepting circuit 20a as interrupt condition illustrates output initialization circuit 21.Output initialization circuit 21 has inverter (negative circuit) 21a and NAND (NAND) door 21b.In output initialization circuit 21, signal input terminal In is connected with the input of NAND door 21b, and the sub-Cont in control input end is connected with another input of NAND door 21b, and the output of NAND door 21b is connected with lead-out terminal Out via inverter 21a.By adopting this structure, at the control signal Scont that is input to the sub-Cont in control input end is under the low level situation, output signal Vout is set to low level, at control signal Scont is under the low level situation, to the signal of output signal Vout output expression with the signal Sg identity logic of being imported.That is, interrupt condition was accepted circuit 20a before the interruption that the interrupt signal that releasing is imported as control signal causes, did not allow to export the signal Sg that is imported, and the low level predetermined voltage of expression is exported as output signal Vout.In addition, interrupt condition is accepted circuit 20a when removing the interruption that interrupt signal causes, allows signal Sg that output imported and exports as output signal Vout.

Comparator 30 detects the potential difference of two signals being imported, exports the result who determines according to detected potential difference with the logical signal after the binaryzation.

The connection example of the testing circuit 100 that constitutes sensor circuit then, is shown.To testing circuit 100 input make the supply voltage VDD of testing circuit 100 actions, from the input signal Vtemp of not shown sensor circuit and the reference voltage V ref of never illustrated reference power supply RF output.Not shown sensor circuit is connected to the power supply terminal that is connected with power supply with reference power supply RF with constant-current source, and is connected with earthed voltage VSS via the impedance component of the load that becomes this constant-current source.Output separately is from constant-current source and the output of impedor tie point.Thus, under the lower state of supply voltage VDD, these output voltages become supply voltage by the effect of current source.

On the input terminal Tip in interrupt condition generative circuit 10a, connect power supply and input supply voltage VDD.In addition, the output that on input terminal Tin, connects not shown sensor circuit.

On the in-phase input terminal in comparator 30, connect the not shown reference power supply RF of output reference voltage Vref, on reversed input terminal, connect the output of not shown sensor circuit.

Accept to connect on the input terminal In among the circuit 20a output of comparator 30 in interrupt condition, connect the lead-out terminal To of interrupt condition generative circuit 10a on the sub-Cont in control input end, lead-out terminal To is connected with the lead-out terminal of testing circuit 100.

In the testing circuit 100 of this structure,, under the low situation of the current potential after the voltage of supply voltage VDD comparison input signal Vtemp adds bias potential Vb low level is shown from the control signal Scont of interrupt condition generative circuit 10a output.In addition, from the control signal Scont of interrupt condition generative circuit 10a output, under the high situation of the current potential after the voltage of supply voltage VDD comparison input signal Vtemp adds bias potential Vb high level is shown.

The output signal Sg of comparator 30 illustrates high level under the low situation of the voltage ratio reference voltage V ref of input signal Vtemp.In addition, under the high situation of the voltage ratio reference voltage V ref of input signal Vtemp, low level is shown.

Accept among the output signal Vout of circuit 20a in interrupt condition, at control signal Scont is under the low level situation, fixedly output low level is under the situation of high level at control signal Scont, the output signal Sg from comparator 30 that output changes according to input signal Vtemp.

Fig. 2 is the example of sequential chart that the action of the testing circuit 100 in the 1st execution mode is shown.According to the some A～H shown in the block diagram of Fig. 1, describe at the transformation of each signal in these points.

The waveform of point A represents to detect from sensor circuit input, testing circuit 100 voltage transition of the input signal Vtemp of processing.The waveform of point B represents to supply to the voltage transition of the supply voltage VDD of testing circuit 100.This supply voltage VDD represents to supply to testing circuit 100 and not at the reference power supply RF shown in Fig. 1 and the supply voltage of sensor circuit.The waveform of point C represent by the offset comparator 11 among the interrupt condition generative circuit 10a determine, from the voltage transition of the control signal Scont of interrupt condition generative circuit 10a output.Accept circuit 20a according to this signal controlling interrupt condition.The waveform of point F is represented from the voltage transition of the reference voltage V ref of reference power supply RF output.The waveform of point G represents that the result of determination of comparator 30 is the voltage transition of output signal Sg.This signal becomes to interrupt condition accepts the input signal of circuit 20a.The waveform of point H represents that interrupt condition accepts the voltage transition of the output signal Vout of circuit 20a.In the scope shown in this sequential chart, the state of the phenomenon that should detect by sensor circuit takes place in expression, and output signal Vout illustrates low level all the time.

Under illustrated initial condition, power supply is the state of access failure, does not also have the charging of electric charge etc. in each circuit, and each signal all illustrates the state of no signal.

At moment t1, at testing circuit 100 and sensor circuit that is connected with testing circuit 100 and reference power supply RF energized.

After this, supply voltage VDD rises gradually.From the output of the sensor circuit of identical power supply supply capability and reference power supply RF be input signal Vtemp and reference voltage V ref under the lower state of supply voltage VDD, these output voltages become supply voltage VDD by the effect of current source.Input signal Vtemp and reference voltage V ref are along with the rise tables of supply voltage VDD reveals same variation characteristic and rising gradually.

In interrupt condition generative circuit 10a, compare by in the judgement of the signal of being imported, a signal being applied drift potential, even also exporting the result who compares judgement by the current potential after the skew under the less situation of the potential difference of the signal of being imported, therefore, output signal can alternately not exported high level and low level and become the unsure state of similar shake.Therefore control signal Scont illustrates low level.

In testing circuit 100, behind the power connection to supplying with under the transition state can move before the supply voltage, export unwanted detection signal to the output signal Sg of comparator 30 sometimes.That is, because do not reach the needed supply voltage of input signal decision circuit regular event that comparator 30 has, thereby output signal Sg becomes indeterminate state that can not determine signal condition.

On the other hand, interrupt condition was accepted circuit 20a before supply voltage VDD reaches predetermined voltage, does not allow to export input signal and predetermined voltage is exported as output signal Vout.As the predetermined voltage of output signal Vout output, in sensor circuit, set the voltage of expression non-detection status (disarm state), Scont controls according to control signal.Output low level in control signal Scont, output signal Vout guarantees to be low level thus, can not export the signal of unwanted expression detected state.

At moment t2, supply voltage VDD rises, and each circuit is transformed into movable state.

In interrupt condition generative circuit 10a, input signal Vtemp rises along with the rising of supply voltage VDD, and their potential difference is in less state.By a signal is applied drift potential, the control signal Scont that is exported is defined as low level.The output of sensor circuit and reference power supply RF is that input signal Vtemp and reference voltage V ref also rise gradually along with the rising of supply voltage VDD, so their potential difference is in less state.Two less signals of potential difference are compared and the output signal Sg that obtains continues can not determine the indeterminate state of signal condition.Accept among the circuit 20a in interrupt condition, by control signal Scont is defined as low level, output signal Vout guarantees to be low level, can not export the signal of unwanted expression detected state.

At moment t3, when reaching predetermined voltage, the reference voltage V ref from reference power supply RF input carries out constant voltage control, import constant voltage.Supply voltage VDD and continue to rise from the current potential of the input signal Vtemp of sensor circuit.

Reference voltage V ref represents the voltage be scheduled to, and reference voltage V ref represents the current potential lower than input signal Vtemp, and therefore, output signal Sg is transformed into the state of the correct result of determination of output from the uncertain indeterminate state of state.In addition, by continuing the control based on control signal Scont, output signal Vout guarantees to be low level, can not export the signal of unwanted expression detected state.

At moment t4, be transformed into the operating stably state of expression preset detection state from the input signal Vtemp of sensor circuit.Thus, input signal Vtemp changes according to the state that sensor circuit detects, and the rising of the rising of following supply voltage VDD of Ji Xuing before this stops.In addition, the electric current that supply voltage VDD supplies with than the constant-current circuit that has by sensor circuit and the impedance of sensor circuit and the magnitude of voltage height of definite input signal Vtemp, thus, can detect the variation that the input signal Vtemp from sensor circuit causes.

At moment t5, detect in by interrupt condition generative circuit 10a and to produce predetermined potential difference, be the situation of the potential difference more than the voltage of the drift potential among the interrupt condition generative circuit 10a from the input signal Vtemp of sensor circuit and supply voltage VDD.Show by this detection, supply voltage VDD is transformed into situation from the state of movable supply voltage to sensor circuit that supply with.In interrupt condition generative circuit 10a, by removing the interrupt status (low level) of control signal Scont, the voltage of control signal Scont follows the current potential of supply voltage VDD to rise and rise.

At moment t6, supply voltage VDD reaches predetermined moved supply voltage and stops to rise, and supply voltage VDD illustrates steady state value.In addition, the voltage of control signal Scont rises and also to stop and being transformed into the state that steady state value is shown.

As implied above, the state of each signal changes by energized.Before supply voltage VDD reached predetermined moved supply voltage, output signal Vout guaranteed to be low level, can not export the signal of unwanted expression detected state.

(the 2nd execution mode)

With reference to accompanying drawing, the execution mode of the testing circuit of different modes is shown.

Testing circuit 200 has; Interrupt condition generative circuit 10b, interrupt condition are accepted circuit 20a and comparator 30.The structure identical with Fig. 1 is marked with same numeral, different structures is described.

Interrupt condition generative circuit 10b in the testing circuit 200 when power connection, at the fixed time during, output keeps the signal of initial condition.Interrupt condition generative circuit 10b is made of POC (Power On Clear: zero clearing powers on) circuit 12.POC circuit 12 is so-called power connection initializing circuits.

In POC circuit 12, for electric capacity 12C that is connected in series and resistance 12R, the end of electric capacity 12C is connected with power supply (supply voltage VDD), and the end of resistance 12R is connected with the power supply that becomes benchmark (earthed voltage VSS).The tie point of electric capacity 12C and resistance 12R is connected with the input of inverter (NOT circuit) 12a, the control signal Scont of inverter 12a output interrupt condition generative circuit 10b.The lead-out terminal of this interrupt condition generative circuit 10b is connected with the sub-Cont in control input end that interrupt condition is accepted circuit 20a.

In the testing circuit 200 of this structure, behind power connection, low level had been shown in the past from the control signal Scont of interrupt condition generative circuit 10a output through preset time, through behind the preset time high level is being shown.

The output signal Sg of comparator 30 illustrates high level under the low situation of the voltage ratio reference voltage V ref of input signal Vtemp.In addition, the output signal Sg of comparator 30 illustrates low level under the high situation of the voltage ratio reference voltage V ref of input signal Vtemp.

The output signal Vout that interrupt condition is accepted circuit 20a is a fixing output low level under the low level situation at control signal Scont, at control signal Scont is under the situation of high level, exports the output signal Sg of the comparator 30 that changes according to input signal Vtemp.

According to the some A～H shown in the block diagram of Fig. 3, some P and some Vd, describe at the transformation of each signal in these points.To the signal identical, constantly be marked with same numeral, with different signals, be that the center describes constantly with Fig. 2.Testing circuit shown in Figure 2 100 is changed note make testing circuit 200.

Waveform VDD represents the voltage transition of the supply voltage VDD of POC circuit 12.The waveform of point Vd is represented the voltage transition of the junction point Vd of the CR circuit in the POC circuit 12.The waveform of point P is represented the voltage transition by the control signal Scont of 12 judgements of the POC circuit among the interrupt condition generative circuit 10b and output.Accept circuit 20a according to this signal controlling interrupt condition.

At moment t1, at testing circuit 200 and sensor circuit that is connected with testing circuit 200 and reference power supply RF energized.After this, supply voltage VDD rises gradually.The output of sensor circuit and reference power supply RF be input signal Vtemp and reference voltage V ref under the lower state of supply voltage VDD, these output voltages become supply voltage VDD by the effect of current source.Input signal Vtemp and reference voltage V ref reveal same variation characteristic and rising gradually according to the rise tables of supply voltage VDD.

In the POC circuit 12 in interrupt condition generative circuit 10b, detect supply voltage VDD.

The current potential of point Vd changes according to the transient response of time lag of first order, and with being decided to be the step response as input with supply voltage VDD, this time constant circuit is made of capacitor 12c and resistance 12R the transient response of this time lag of first order by time constant circuit.The current potential of point Vd is followed power connection and is risen, but inverter 12a also is not activated, so control signal Scont illustrates low level.

In testing circuit 200, be in behind the power connection transition state that can move before the supply voltage to supplying with, the output signal Sg of comparator 30 becomes indeterminate state that can not determine signal condition.

Be illustrated in the POC circuit 12 among the interrupt condition generative circuit 10b current potential state higher of point Vd than the threshold potential among the inverter 12a.Along with the supply voltage of inverter 12a excessively rises, the threshold potential of inverter 12a also rises according to the rising of supply voltage.Thus, control signal Scont is defined as low level.The output of sensor circuit and reference power supply RF is that input signal Vtemp and reference voltage V ref also rise gradually along with the rising of supply voltage VDD, so their potential difference is in less state.Two less signals of potential difference are compared and the output signal Sg that obtains continues can not determine the indeterminate state of signal condition.Accept among the circuit 20a in interrupt condition, by control signal Scont is defined as low level, output signal Vout guarantees to be low level, can not export the signal of unwanted expression detected state.

At moment t4, be transformed into the operating stably state of expression preset detection state from the input signal Vtemp of sensor circuit.Thus, input signal Vtemp changes according to the state that sensor circuit detects, and the rising of the rising of following supply voltage VDD of Ji Xuing before this stops.In addition, the electric current that supply voltage VDD supplies with than the constant-current circuit that has by sensor circuit and the impedance of sensor circuit and the magnitude of voltage height of definite input signal Vtemp can detect the variation that the input signal Vtemp from sensor circuit causes thus.

In the POC circuit 12 of interrupt condition generative circuit 10b, supply voltage VDD is transformed into constant voltage control, and therefore, the current potential of some Vd rises and stops and transferring decline to.

At moment t7, in the POC circuit 12 of interrupt condition generative circuit 10b, be reduced to below the threshold voltage of inverter 12a by the current potential that will put Vd, control signal Scont is transformed into high level.Interrupt condition generative circuit 10b removes the interrupt status (low level) of the control signal that outputs to control signal Scont.Thus, testing circuit 200 is transformed into the common state of the output that can carry out detection signal.

(the 3rd execution mode)

Testing circuit 300 has: interrupt condition generative circuit 10c, interrupt condition are accepted circuit 20a and comparator 30.The structure identical with Fig. 1 and Fig. 3 is marked with same numeral, different structures is described.

In testing circuit 300, interrupt condition generative circuit 10c has offset comparator 11, POC circuit 13 and rest-set flip-flop 14.

POC circuit 13 is so-called power connection initializing circuits.In POC circuit 13, for electric capacity 13C that is connected in series and resistance 13R, the end of electric capacity 13C is connected with the positive pole of power supply (supply voltage VDD), and the end of resistance 13R is connected with the negative pole of power supply (earthed voltage VSS).The tie point of electric capacity 13C and resistance 13R is connected with the input of buffer 13b.Buffer 13b reaches the threshold voltage (reversal voltage) of buffer 13b when above at the voltage of being imported (some Vd voltage), output signal Sp ' becomes by the high level shown in the supply voltage VDD, reaching threshold voltage (reversal voltage) when following, output signal Sp ' becomes by the low level shown in the reference voltage V SS.Become the output signal of POC circuit 13 from the signal of buffer 13b output.When Vd reaches the reversal voltage of buffer 13b when above, signal Sp ' becomes supply voltage VDD, and when reaching reversal voltage when following, signal Sp ' becomes reference voltage V SS.The threshold voltage of buffer 13b becomes the half voltage of supply voltage VDD.

Offset comparator 11 output signal Sc.Control signal Scont in signal Sc and the execution mode is suitable.Rest-set flip-flop 14 illustrates the RS D-flip flop.

The output of offset comparator 11 is connected with the set input (S) of rest-set flip-flop 14, the output of POC circuit 13 is connected with the RESET input (R) of rest-set flip-flop 14, the control signal Scont of the output output interrupt condition generative circuit 10c of rest-set flip-flop 14.Rest-set flip-flop 14 is under the situation of set input (S) and the RESET input (R) input high level, respectively output signal is set at high level (set) and low level (resetting), when all being transfused to high level, preferential reset request is set low level (resetting).

In the testing circuit 300 of this structure, under the low situation of the current potential of control signal Scont after the voltage of supply voltage VDD comparison input signal Vtemp adds bias potential Vb of interrupt condition generative circuit 10c output, low level is shown.In addition, under the situation that the current potential of control signal Scont after the voltage of supply voltage VDD comparison input signal Vtemp adds bias potential Vb is high high level is shown.

Behind power connection, high level had been shown in the past from the control signal Scont of interrupt condition generative circuit 10c output, low level had been shown through behind the preset time through preset time.

According to some A～H shown in the block diagram of Fig. 5 and some P ', describe at the transformation of each signal in these points.To the signal identical, constantly be marked with same numeral, with different signals, be that the center describes constantly with Fig. 2 and Fig. 4.Testing circuit shown in Figure 2 100 and testing circuit 200 shown in Figure 4 are changed note make testing circuit 300.

The waveform of point C is represented the voltage transition of the signal Sc of offset comparator 11 outputs among the therefrom disconnected condition generative circuit 10c.The waveform of point E is represented the control signal Scont of rest-set flip-flop 14 outputs among the therefrom disconnected condition generative circuit 10c.The waveform of point P ' is represented the voltage transition of the signal Sp ' of POC circuit 13 outputs among the therefrom disconnected condition generative circuit 10c.

At moment t1, at testing circuit 300 and sensor circuit that is connected with testing circuit 300 and reference power supply RF energized.After this, supply voltage VDD rises gradually.The output of sensor circuit and reference power supply RF be input signal Vtemp and reference voltage V ref under the lower state of supply voltage VDD, these output voltages become supply voltage VDD by the effect of current source.Input signal Vtemp and reference voltage V ref reveal same variation characteristic and rising gradually according to the rise tables of supply voltage VDD.

In testing circuit 300, be in behind the power connection transition state that can move before the supply voltage to supplying with, the output signal Sg of comparator 30 becomes indeterminate state that can not determine signal condition.

In the offset comparator 11 of interrupt condition generative circuit 10c, compare by in the judgement of the signal of being imported, a signal being applied drift potential, even also exporting the result who compares judgement by the current potential after the skew under the less situation of the potential difference of the signal of being imported, therefore can not become unstable.Therefore signal Sc illustrates low level.

In POC circuit 13, detect supply voltage VDD.The current potential of point Vd is followed power connection and is risen, but buffer 13b also is not activated, so signal Sp ' illustrates low level.Rest-set flip-flop 14, to (R) terminal input low level that resets but also is not activated to set (S) terminal input low level, so control signal Scont output keeps the low level of initial condition.

In the offset comparator 11 of interrupt condition generative circuit 10c, the potential difference of input signal Vtemp and supply voltage VDD is in less state, but a signal is applied drift potential, and signal Sc is defined as low level thus.Be illustrated in the POC circuit 13 the voltage of signals state higher on the some Vd than the threshold potential among the buffer 13b.Along with the supply voltage VDD of buffer 13b excessively rises, the threshold potential of buffer 13b also rises according to the rising of supply voltage VDD.Thus, signal Sp ' output high level.Rest-set flip-flop 14 is to set (S) terminal input low level, to (R) terminal input high level that resets, to exporting (Q) terminal output low level as control signal Scont.

The output of sensor circuit and reference power supply RF is that input signal Vtemp and reference voltage V ref also rise gradually along with the rising of supply voltage VDD, so their potential difference is in less state.Two less signals of potential difference are compared and the output signal Sg that obtains continues can not determine the indeterminate state of signal condition.

Accept among the circuit 20a in interrupt condition, by control signal Scont is defined as low level, output signal Vout guarantees to be low level, can not export the signal of unwanted expression detected state.

At moment t3, when reaching predetermined voltage by the input shown in the reference voltage V ref, carry out constant voltage control from reference power supply RF, import constant voltage.Supply voltage VDD and continue to rise from the current potential of the input signal Vtemp of sensor circuit.

Reference voltage V ref represents the voltage be scheduled to, and reference voltage V ref represents the current potential lower than input signal Vtemp, so output signal Sg is transformed into the state of the correct result of determination of output from the uncertain indeterminate state of state.In addition, by continuing the control based on control signal Scont, output signal Vout guarantees to be low level, can not export the signal of unwanted expression detected state.

At moment t5, offset comparator among the interrupt condition generative circuit 10c 11 detects in from the input signal Vtemp of sensor circuit and supply voltage VDD and produces predetermined potential difference, be the situation of the potential difference more than the voltage of the drift potential among the interrupt condition generative circuit 10c.Show by this detection, supply voltage VDD is transformed into situation from the state of movable supply voltage to sensor circuit that supply with.

Offset comparator 11 is to signal Sc output high level, and its current potential follows the current potential of supply voltage VDD to rise and rise.Rest-set flip-flop 14 is to set (S) terminal input high level, to (R) terminal input high level that resets, to output (Q) terminal output low level.In addition, by continuing the control based on control signal Scont, output signal Vout guarantees to be low level, can not export the signal of unwanted expression detected state.

At moment t6, supply voltage VDD reaches predetermined moved supply voltage and stops to rise, and supply voltage VDD illustrates steady state value.In addition, except that signal Sc, the rising of other signals also stops and being transformed into the state that steady state value is shown.On the some Vd of the POC circuit 13 in interrupt condition generative circuit 10c, the current potential of the signal on the some Vd descends.Signal on the some Vd comes the half voltage of supply voltage VDD to judge by buffer 13b as threshold voltage, to signal Sp ' output high level.

Rest-set flip-flop 14 among the interrupt condition generative circuit 10c does not have the change of state in input signal, to set (S) terminal input high level, to (R) terminal input high level that resets, continue output low level to output (Q) terminal.Interrupt condition generative circuit 10c continues the interrupt status (low level) of control signal Scont.In addition, by continuing the control based on control signal Scont, output signal Vout guarantees to be low level, can not export the signal of unwanted expression detected state.

At moment t7, on the some Vd of the POC circuit 13 in interrupt condition generative circuit 10c, be reduced to by the current potential that will put the signal on the Vd below the threshold voltage (half voltage of supply voltage VDD) of buffer 13b, signal Sp ' changes low level into.

Rest-set flip-flop 14 to (R) terminal input low level that resets, is used as control signal Scont output to output (Q) terminal output high level to set (S) terminal input high level.

Interrupt condition generative circuit 10c is set at interrupt release state (high level) with control signal Scont.Thus, testing circuit 300 is transformed into the common state of the output that can carry out detection signal, and the input that switches to output interrupt condition generative circuit 20a is output signal Sg.Output signal Sg is a low level, so output signal Vout guarantees to be low level, can not export the signal of unwanted expression detected state.

(the 4th execution mode)

Testing circuit 400 has: interrupt condition generative circuit 10d, interrupt condition are accepted circuit 20a and comparator 30.The structure identical with Fig. 1 and Fig. 5 is marked with same numeral, different structures is described.

In testing circuit 400, interrupt condition generative circuit 10d has offset comparator 11, rest-set flip-flop 14 and low supply voltage testing circuit 15.

The decline that low supply voltage testing circuit 15 carries out supply voltage VDD detects.

Fig. 8 is the summary construction diagram that an example of low supply voltage testing circuit 15 is shown.

Low supply voltage testing circuit 15 shown in Figure 8 has transistor Q1 and constant-current source I1.

Transistor Q1 illustrates N channel field-effect transistor npn npn (NMOSFET).The grid of transistor Q1 is connected with the positive pole of power supply (supply voltage VDD), and source electrode is connected with the negative pole (earthed voltage VSS) of power supply, and the constant-current source I1 that drain electrode is connected with the positive pole of an end and power supply connects.That is, transistor Q1 constitutes the source ground type amplifying circuit of constant-current source I1 as load.

Fig. 9 is the figure that the action of low supply voltage testing circuit 15 shown in Figure 8 is shown.

Fig. 9 (a) is that transverse axis is represented voltage (VGS) between gate/source among the transistor Q1, and the longitudinal axis is represented drain current (ID), thereby the curve chart of the amplification characteristic of transistor Q1 is shown.Cut the threshold voltage that square Vth represents voltage between the gate/source of transistor Q1 on the transverse axis of curve chart.Shown in this curve chart, under the state below the predetermined voltage V α, transistor Q1 can not become saturation condition, can not flow through the constant current i1 that sets in constant-current source I1 at voltage VGS between the gate/source of transistor Q1.In addition, surpass at voltage VGS between gate/source under the state of predetermined voltage V α, transistor Q1 becomes saturation condition.

Fig. 9 (b) is by by the characteristic shown in this circuit structure, and the sequential chart of the variation of the signal Sd when applying the supply voltage VDD that rises gradually is shown.Before supply voltage VDD reached voltage V α, the voltage of signal Sd changed along with the variation of voltage VDD.When supply voltage VDD reached voltage V α, signal Sd was transformed into the low level state that illustrates.

Return Fig. 7, the connection of interrupt condition generative circuit 10d is shown.

The output of offset comparator 11 is connected with the set input (S) of rest-set flip-flop 14, the output of low supply voltage testing circuit 15 is connected with the RESET input (R) of rest-set flip-flop 14, the output signal of the output output interrupt condition generative circuit 10d of rest-set flip-flop 14.

According to the some A～H shown in the block diagram of Fig. 7, describe at the transformation of each signal in these points.To the signal identical, constantly be marked with same numeral, with different signals, be that the center describes constantly with Fig. 2, Fig. 4 and Fig. 6.Testing circuit shown in Figure 2 100, testing circuit 200 shown in Figure 4 and testing circuit 300 shown in Figure 6 are changed note make testing circuit 400.

The waveform D of point represents from the signal Sd of low supply voltage testing circuit 15 outputs.

At moment t1, at testing circuit 400 and sensor circuit that is connected with testing circuit 400 and reference power supply RF energized.After this, supply voltage VDD rises gradually.The output of sensor circuit and reference power supply RF be input signal Vtemp and reference voltage V ref under the lower state of supply voltage VDD, these output voltages become supply voltage VDD by the effect of current source.Input signal Vtemp and reference voltage V ref reveal same variation characteristic and rising gradually according to the rise tables of supply voltage VDD.

In testing circuit 400, be in behind the power connection transition state that can move before the supply voltage to supplying with, the output signal Sg of comparator 30 becomes indeterminate state that can not determine signal condition.

In the offset comparator 11 of interrupt condition generative circuit 10d, compare by in the judgement of the signal of being imported, a signal being applied drift potential, even also exporting the result who compares judgement by the current potential after the skew under the less situation of the potential difference of the signal of being imported, therefore can not become unstable.Therefore signal Sc illustrates low level.

In low supply voltage testing circuit 15, be in supply voltage than the low state of threshold potential in the semiconductor element (for example transistor Q1 and Q2) of forming circuit, signal Sd rises with the rising of supply voltage.Rest-set flip-flop 14, to (R) terminal input low level that resets but also is not activated to set (S) terminal input low level, so control signal Scont output keeps the low level of initial condition.

On the other hand, interrupt condition was accepted circuit 20a before supply voltage reaches predetermined voltage, does not allow to export input signal and predetermined voltage is exported as output signal Vout.As the predetermined voltage of output signal Vout output, in sensor circuit, set the voltage of expression non-detection status (disarm state), Scont controls according to control signal.In control signal Scont, as control signal Scont output low level, output signal Vout guarantees to be low level thus, can not export the signal of unwanted expression detected state.

In the offset comparator 11 of interrupt condition generative circuit 10d, the potential difference of input signal Vtemp and supply voltage VDD is in less state, but a signal is applied drift potential, and signal Sc is defined as low level thus.In low supply voltage testing circuit 15, become supply voltage than the high state of threshold potential in the semiconductor element (for example transistor Q1 and Q2) of forming circuit, supply voltage has surpassed predetermined threshold value voltage, thereby signal Sd output low level.Rest-set flip-flop 14 is to set (S) terminal input low level, to (R) terminal input low level that resets, and in control signal Scont, active circuit and along with the state output low level of input signal.

At moment t5, offset comparator among the interrupt condition generative circuit 10d 11 detects in from the input signal Vtemp of sensor circuit and supply voltage VDD and produces predetermined potential difference, be the situation of the potential difference more than the voltage of the drift potential among the interrupt condition generative circuit 10d.Show by this detection, supply voltage VDD is transformed into situation from the state of movable supply voltage to sensor circuit that supply with.

Offset comparator 11 is to signal Sc output high level, and its current potential follows the current potential of supply voltage VDD to rise and rise.Rest-set flip-flop 14 to (R) terminal input low level that resets, makes the output counter-rotating and the output high level to set (S) terminal input high level.Interrupt condition generative circuit 10d removes the interrupt status (low level) of control signal Scont.Thus, testing circuit 400 is transformed into the common state of the output that can carry out detection signal.

At moment t6, supply voltage VDD reaches predetermined moved supply voltage and stops to rise, and supply voltage VDD illustrates steady state value.In addition, signal Sc and other signals stop to follow the voltage of the rising of supply voltage to rise and are transformed into the state that steady state value is shown.

(the 5th execution mode)

With reference to accompanying drawing, the execution mode of the low supply voltage testing circuit of different modes is shown.

Low supply voltage testing circuit 15b shown in Figure 11 has transistor Q1, Q2 and constant-current source I1, I2.

Transistor Q1 and Q2 represent N channel field-effect transistor npn npn (NMOSFET).The grid of transistor Q2 is connected with the positive pole (supply voltage VDD) of power supply with drain electrode, and the constant-current source I2 that source electrode is connected with the negative pole (voltage VSS is set) of an end and power supply connects.

The grid of transistor Q1 is connected with the source electrode of transistor Q2, and source electrode is connected with earthed voltage VSS, and the constant-current source I1 that drain electrode is connected with the positive pole of an end and power supply connects.That is, transistor Q1 forms the multistage amplifying circuit that is connected with Q2, becomes constant-current source I1 as the source ground type amplifying circuit of the load structure as output stage.

Figure 12 (a) is that transverse axis is represented voltage (VGS) between gate/source among the transistor Q1 (Q2), and the longitudinal axis is represented drain current (ID), thereby the curve chart of the amplification characteristic of transistor Q1 (Q2) is shown.The curve chart transverse axis cut the threshold voltage that square Vth represents voltage VGS between the gate/source of transistor Q1 (Q2).Shown in this curve chart, under the state below the predetermined voltage V α, the transistor Q1 (Q2) that can not flow through the constant current I1 that sets becomes by (off) state at voltage VGS between the gate/source of transistor Q1 (Q2).In addition, surpass at voltage VGS between gate/source under the state of predetermined voltage V α, transistor Q1 (Q2) becomes conducting (on) state.In addition, transistor Q1 also can select the different transistor of characteristic with Q2.

Figure 12 (b) is by by the characteristic shown in this circuit structure, and the sequential chart of the variation of the signal Sd when applying the supply voltage VDD that rises gradually is shown.

Reach voltage (2 * V α) before at supply voltage VDD, the voltage of signal Sd changes along with the variation of voltage VDD.When supply voltage VDD reached voltage (2 * V α), signal Sd was transformed into the low level state that illustrates.By transistor Q1 and Q2 being made as the multistage structure that is connected, voltage at double that can be when hanging down threshold voltage that power supply detects voltage and be made as 1 grade in transistor.

(the 6th execution mode)

Testing circuit 500 has: interrupt condition generative circuit 10a, interrupt condition are accepted circuit 20b and comparator 30.The structure identical with Fig. 1 is marked with same numeral, different structures is described.

Interrupt condition in the testing circuit 500 is accepted circuit 20b and is had the circuit 22 of selection.

Select circuit 22 to have switch 22a and the 22b that links with the control signal of being imported.

Switch 22a and switch 22b are connected between the output (Out1, Out2) with the corresponding setting of input (In1, In2), according to the interrupt signal that is input to the sub-Cont of signal input end as control signal Scont, selecting to switch is predetermined voltage of output or the input signal that is input to input.For predetermined voltage, set lowly than the voltage of exporting from switch 22b (V+) from the voltage (V-) of switch 22a output from switch 22a and 22b output.That is, interrupt condition was accepted circuit 20b before the interruption of removing based on the interrupt signal of importing as control signal, did not allow to export input signal, will export as output signal via the predetermined voltage of switch 22a and switch 22b output.In addition, interrupt condition is accepted circuit 20b when the interruption of removing based on interrupt signal, allows the output input signal and exports as output signal.

The connection of testing circuit 500 then, is shown.

To testing circuit 500 input make the supply voltage VDD of testing circuit 500 actions, from the input signal Vtemp of not shown sensor circuit and the reference voltage V ref of never illustrated reference power supply RF output.

On the input terminal Tip in interrupt condition generative circuit 10a, connect the anodal of power supply and apply voltage VDD.In addition, on input terminal Tin, connect the output of not shown sensor circuit.On interrupt condition is accepted input terminal In1 among the circuit 20b, the not shown reference power supply RF that connects output reference voltage Vref, the output that on input terminal In2, connects not shown sensor circuit, the output of connection interrupt condition generative circuit 10a on the sub-Cont in control input end.On in-phase output end in comparator 30, connection interrupt condition is accepted the lead-out terminal Out1 among the circuit 20b, and on reversed-phase output, connection interrupt condition is accepted the lead-out terminal Out2 among the circuit 20b.

According to the some A～G ' shown in the block diagram of Figure 13, describe at the transformation of each signal in these points.To the signal identical, constantly be marked with same numeral, with different signals, be that the center describes constantly with Fig. 2.Testing circuit shown in Figure 2 100 is changed note make testing circuit 500.

Waveform A ' the expression of point outputs to the voltage transition that interrupt condition is accepted the signal Sa ' of the some A ' among the circuit 20b.To signal Sa ' output with from identical signal of the input signal Vtemp of sensor circuit input or any one of predetermined predetermined voltage.

Waveform F ' the expression of point outputs to the voltage transition that interrupt condition is accepted the signal Sf ' of the some F ' among the circuit 20b.To signal Sf ' output supply to testing circuit 500 from the reference voltage V ref of reference power supply RF output or any one of predetermined predetermined voltage.

The waveform G ' of point becomes the output signal Vout of the testing circuit 500 that determines by comparator 30.In the scope shown in this sequential chart, the state of the phenomenon that should detect by sensor circuit takes place in expression, and output signal Vout illustrates low level all the time.

At moment t1, at testing circuit 500 and sensor circuit that is connected with testing circuit 500 and reference power supply RF energized.After this, supply voltage VDD rises gradually.The output of sensor circuit and reference power supply RF be input signal Vtemp and reference voltage V ref under the lower state of supply voltage VDD, these output voltages become supply voltage VDD by the effect of current source.Input signal Vtemp and reference voltage V ref reveal same variation characteristic and rising gradually according to the rise tables of supply voltage VDD.

In interrupt condition generative circuit 10a, compare by in the judgement of the signal of being imported, a signal being applied drift potential.Thus, in interrupt condition generative circuit 10a,, therefore can not become unstable even exporting the result who compares judgement by the current potential after the skew under the less situation of the potential difference of the signal of being imported yet.Therefore control signal Scont illustrates low level.

On the other hand, accept in the comparator 30 of signal of circuit 20b being transfused to interrupt condition, before supply voltage VDD reaches predetermined voltage, implement to determine that output signal Vout represents the processing of non-detection status (disarm state).The processing that is specified to the expression disarm state is controlled by control signal Scont.Control signal Scont is a low level, and interrupt condition is accepted the predetermined voltage that circuit 20b is illustrated by signal Sg ' and signal Sa ' from output (Out1, Out2) output thus.Interrupt condition is accepted near the voltage (V-) of the circuit 20b middle output earthing potential of signal Sg ' VSS, at the voltage (V+) of the middle output of signal Sa ' according to supply voltage VDD rising.Thus, the output signal Vout of comparator 30 guarantees to be low level, can not export the signal of unwanted expression detected state.

In interrupt condition generative circuit 10a, the potential difference of input signal Vtemp and supply voltage VDD is in less state, but a signal is applied drift potential, and control signal Scont is defined as low level thus.The output of sensor circuit and reference power supply RF is that input signal Vtemp and reference voltage V ref also rise and rise gradually along with supply voltage VDD.

Control signal Scont is a low level, accepts in circuit 20b and the comparator 30 in interrupt condition thus, continues the state since moment t1.Thus, the output signal Vout of comparator 30 guarantees to be low level, can not export the signal of unwanted expression detected state.

Reference voltage V ref represents the voltage be scheduled to, and reference voltage V ref represents the current potential lower than input signal Vtemp.

With aforesaid state since moment t2 similarly, in interrupt condition generative circuit 10a, the potential difference of input signal Vtemp and supply voltage VDD is in less state, but a signal is applied drift potential, and control signal Scont is defined as low level thus.The output of sensor circuit, be input signal Vtemp along with supply voltage VDD rises and rises gradually.

At moment t5, detect in by interrupt condition generative circuit 10a and to produce predetermined potential difference, be the situation of the potential difference more than the voltage (bias voltage Vb) of the drift potential among the interrupt condition generative circuit 10a from the input signal Vtemp of sensor circuit and supply voltage VDD.Show by this detection, supply voltage VDD is transformed into situation from the state of movable supply voltage to sensor circuit that supply with.In interrupt condition generative circuit 10a, control signal Scont is set at interrupt release state (high level), and the voltage of control signal Scont follows the current potential of supply voltage VDD to rise and rise.

By control signal Scont being set at interrupt release state (high level), interrupt condition is accepted circuit 20b and is switched to the input signal that is input to input.Interrupt condition is accepted the input signal Vtemp that circuit 20b is imported in the middle output of signal Sa ', the reference voltage V ref that is imported in the middle output of signal Sg '.

At moment t6, supply voltage VDD reaches predetermined moved supply voltage and stops to rise, and steady state value is shown.In addition, the voltage of control signal Scont rises and also to stop and being transformed into the state that steady state value is shown.

As implied above, the state of each signal changes by energized.Before supply voltage VDD reaches predetermined moved supply voltage, can in output signal Vout, not export unwanted detection signal, output signal Vout guarantees to be low level, can not export the signal of unwanted expression detected state.

(the 7th execution mode)

Testing circuit 600 has: interrupt condition generative circuit 10b, interrupt condition are accepted circuit 20b and comparator 30.The structure identical with Figure 13 with Fig. 1, Fig. 3 is marked with same numeral.

The connection of testing circuit 600 is shown then.

To testing circuit 600 input make the supply voltage VDD of testing circuit 600 actions, from the input signal Vtemp of not shown sensor circuit and the reference voltage V ref of never illustrated reference power supply RF output.On interrupt condition is accepted input terminal In1 among the circuit 20b, the positive pole (supply voltage VDD) that connects the not shown power supply of output reference voltage Vref, the output that on input terminal In2, connects not shown sensor circuit, the output of connection interrupt condition generative circuit 10b on the sub-Cont in control input end.On in-phase output end in comparator 30, connection interrupt condition is accepted the lead-out terminal OUT1 among the circuit 20b, and on reversed-phase output, connection interrupt condition is accepted the lead-out terminal OUT2 among the circuit 20b.

According to some A～G ' shown in the block diagram of Figure 15 and some P, describe at the transformation of each signal in these points.To the signal identical with Figure 14, constantly be marked with same numeral, with different signals, be that the center describes constantly with Fig. 2, Fig. 4.Testing circuit shown in Figure 1 100, testing circuit 200 shown in Figure 3 and testing circuit 500 shown in Figure 13 are changed note make testing circuit 600.

At moment t1, at testing circuit 600 and sensor circuit that is connected with testing circuit 600 and reference power supply RF energized.After this, supply voltage VDD rises gradually.The output of sensor circuit and reference power supply RF be input signal Vtemp and reference voltage V ref under the lower state of supply voltage VDD, these output voltages become supply voltage VDD by the effect of current source.Input signal Vtemp and reference voltage V ref reveal same variation characteristic and rising gradually according to the rise tables of supply voltage VDD.

In the POC circuit 12 of interrupt condition generative circuit 10b, detect supply voltage VDD.

The current potential of point Vd changes according to the transient response of time lag of first order, and with being decided to be the step response as input with supply voltage VDD, this time constant circuit is made of capacitor 12c and resistance 12R the transient response of this time lag of first order by time constant circuit.Supply voltage VDD follows power connection and rises, but inverter 12a also is not activated, so control signal Scont illustrates low level.

On the other hand, accept in the comparator 30 of signal of circuit 20b being transfused to interrupt condition, before supply voltage VDD reaches predetermined voltage, implement to determine that output signal Vout represents the processing of non-detection status (disarm state).The processing that is specified to the expression disarm state is controlled by control signal Scont.Control signal Scont is a low level, and interrupt condition is accepted the predetermined voltage that circuit 20b is illustrated by signal Sf ' and signal Sa ' from output (Out1, Out2) output thus.Near the middle output earthing potential of signal Sf ' VSS voltage (V-) is at the voltage (V+) of the middle output of signal Sa ' according to supply voltage VDD rising.

Thus, output low level in the output signal Vout of comparator 30, can not export the signal of unwanted expression detected state and export the expression disarm state signal.

Be illustrated in the POC circuit 12 of interrupt condition generative circuit 10b the high state of threshold potential among the voltage ratio inverter 12a of some Vd.Along with the supply voltage VDD of inverter 12a excessively rises, the threshold potential of inverter 12a also rises according to the rising of supply voltage VDD.Thus, control signal Scont is defined as low level.The output of sensor circuit and reference power supply RF is that input signal Vtemp and reference voltage V ref also rise and rise gradually along with supply voltage VDD.

With aforesaid state since moment t2 similarly, the state among the interrupt condition generative circuit 10b does not change, output low level in control signal Scont.The output of sensor circuit, be input signal Vtemp along with supply voltage VDD rises and rises gradually.

At moment t4, be transformed into the operating stably state of expression preset detection state from the input signal Vtemp of sensor circuit.Thus, input signal Vtemp changes according to the state that sensor circuit detects, and the rising of the rising of following supply voltage VDD of Ji Xuing before this stops.

At moment t6, supply voltage VDD reaches predetermined moved supply voltage and stops to rise, and steady state value is shown.In addition, the rising of control signal Scont also stops and being transformed into the state that steady state value is shown.In the POC circuit 12 of interrupt condition generative circuit 10b, the current potential of some Vd rises and to stop and transferring decline to.

At moment t7, drop to below the threshold voltage of inverter 12a by current potential the some Vd of the POC circuit 12 of interrupt condition generative circuit 10b, control signal Scont changes high level into.Interrupt condition generative circuit 10b removes the interrupt status (low level) of the control signal that outputs to control signal Scont, the high level of output expression interrupt release state.

In the comparator 30 that is transfused to the signal of accepting circuit 20b from interrupt condition, be input to the signal that interrupt condition accepts circuit 20b and accept circuit 20b input via interrupt condition.Before supply voltage VDD reaches predetermined voltage, implement to determine that output signal Vout represents the processing of disarm state.The processing that is specified to the expression disarm state is controlled by the control signal Scont as control signal Scont input.

Control signal Scont is a high level, and interrupt condition is accepted circuit 20b from output (Out1, Out2) output signal Sf ' and signal Sa ' thus, and this signal becomes the signal based on reference voltage V ref and input signal Vtemp.

Thus, testing circuit 600 is transformed into the common state of the output that can carry out detection signal.

(execution mode 8)

Execution mode 1 by making up with transducer 900, can constitute the sensor device 1 of expectation to the testing circuit shown in the execution mode 7 (testing circuit 100 is to testing circuit 600).

As the example that can be used as the various transducers of transducer 900, can enumerate temperature sensor, MR transducer and BGR transducer etc.

Transducer 900 can make up the impedance circuit of constant-current circuit that is connected with the positive pole (supply voltage VDD) of power supply and the load that becomes constant-current circuit and constitute.Impedance circuit is according to the purpose of each transducer, the element that selected impedance changes according to the size of detected phenomenon.Thus, can be formed in the action behind the power connection, can not send the sensor device of high reliability of the detection signal of output signal mistake by power connection.

In existing testing circuit and sensor device, but the general structure that does not have to outside transmission self operate condition.In the supply voltage monitoring circuit that this testing circuit and sensor device have, can not effectively use supply voltage VDD, hindered the reduction minimum voltage action.Can solve the problems referred to above by being suitable for the present invention.

According to the present invention, testing circuit 100,200,300,400,500 and 600 detects the input signal imported and output signal is exported.The supply voltage VDD that is provided directly is provided for interrupt condition

generative circuit

10a, 10b, 10c and 10d, and exports interrupt signal be converted to the voltage range of regulation at supply voltage VDD before.Interrupt condition accepts

circuit

20a and 20b did not allow to export input signal before this interruption is disengaged and predetermined voltage is exported as output signal, and permission is exported input signal and it is exported as output signal when the interruption based on this interrupt signal is disengaged.

Thus, in testing circuit 100,200,300,400,500 and 600, interrupt condition

generative circuit

10a, 10b, 10c and 10d directly detect supply voltage VDD.Testing circuit 100,200,300,400,500 and 600 does not use the circuit of conversion electric power voltage VDD can detect supply voltage VDD.Thus, the needed consumption electric power of voltage transitions can be suppressed, the conversion circuitry needed can be saved.Promptly, testing circuit 100,200,300,400,500 and 600 rigidly connects in the output signal of logical back output at power supply, detects supply voltage VDD by interrupt condition

generative circuit

10a, 10b, 10c and 10d and is converted to the voltage range of regulation and removes interrupt signal.So far accept the predetermined voltage that

circuit

20a and 20b output is predesignated by interrupt condition, can when interrupt signal is disengaged, allow to export input signal and it is exported as output signal.Then, rigidly connect the signal of logical back, can also guarantee the reliability of output signal from the expression labile state of testing circuit output by avoiding exporting at power supply.

And, according to the present invention, in foregoing invention, in interrupt condition generative circuit 10a, decision circuit is exported interrupt signal under the situation that does not reach the drift potential of being represented by the potential difference of predesignating, reach in this potential difference under the situation of this drift potential to remove interrupt signal.

Thus, interrupt condition generative circuit 10a can be set at threshold value with the predetermined potential difference of predesignating, and according to the voltage transition of this threshold test input signal, can generate the interrupt signal of control output signal exactly.

And, according to the present invention, in foregoing invention, interrupt condition generative circuit 10b from behind the power connection to through exporting interrupt signal before the time of predesignating, and removing interrupt signal through after this time.

Thus, interrupt condition generative circuit 10b can generate the interrupt signal of control output signal exactly in the interrupt signal of accepting the output signal of

circuit

20a and 20b through the definite interrupt condition of output before the scheduled time of predesignating.

And, according to the present invention, in foregoing invention, interrupt condition

generative circuit

10c and 10d are by the comparison based on the threshold potential of predesignating, do not reach at supply voltage VDD under the situation of this threshold potential and export interrupt signal, reach at this supply voltage VDD under the situation of this threshold potential and remove interrupt signal.

And according to the present invention, in foregoing invention, the threshold potential of predesignating is by transistor Q1 that carries out switch motion and Q2 preset threshold current potential.

Thus, interrupt condition

generative circuit

10c and 10d do not carry out voltage by bleeder circuit etc. and set and can carry out voltage ratio.Voltage relatively be to determine according to the threshold voltage that semiconductor element has.The supply voltage VDD that decidable is imported can generate the interrupt signal of controlling output signal exactly.

And according to the present invention, in foregoing invention, interrupt condition

generative circuit

10c and 10d have the holding circuit of the state that keeps interrupt signal.

Thus, keep by rest-set flip-flop from the interrupt signal of interrupt condition

generative circuit

10c and 10d output, thereby can prevent the state counter-rotating of the output signal that the influence by noise etc. causes,, can guarantee the reliability of output signal by determine the logic of output signal according to the interrupt signal of being imported.

And, according to the present invention, in foregoing invention, interrupt condition generative circuit 10c from behind the power connection to the indication that resets that rest-set flip-flop 14 is resetted through output before the time of predesignating, in the indication that resets that rest-set flip-flop 14 is resetted through releasing after this time, reach under the situation of the predetermined voltage of predesignating detecting supply voltage VDD, rest-set flip-flop 14 is carried out set remove interrupt signal.

And, according to the present invention, in foregoing invention, interrupt condition generative circuit 10d is by the comparison based on the threshold potential of predesignating, do not reach the indication that resets that output resets rest-set flip-flop 14 under the situation of this threshold potential at supply voltage VDD, reach at this supply voltage VDD and remove the indication that resets that rest-set flip-flop 14 is resetted under the situation of this threshold potential, reach under the situation of the predetermined voltage of predesignating detecting supply voltage VDD, rest-set flip-flop 14 is carried out set remove interrupt signal.

Thus, owing to can keep the result of determination of input signal, thereby the state counter-rotating of the output signal that the influence by noise etc. causes can be prevented,, the reliability of output signal can be guaranteed by determine the logic of output signal according to the interrupt signal of being imported.

And, according to the present invention, in foregoing invention, interrupt condition is accepted circuit 20a under the situation that is set to the interrupt status that did not allow to export input signal and predetermined voltage is exported as output signal before the interruption based on interrupt signal is disengaged, the signal of output predetermined logic, under the situation of the disarm state that this interrupt status is disengaged, select the logic of output signal according to input signal.

Thus, interrupt condition is accepted circuit 20a by do not determine the logic of output signal according to input signal according to the interrupt signal of being imported, and can guarantee the reliability of output signal.

And, according to the present invention, in foregoing invention, interrupt condition is accepted circuit 20b under the situation that is set to the interrupt status that did not allow to export input signal and predetermined voltage is exported as output signal before the interruption based on interrupt signal is disengaged, the signal of output predetermined potential, under the situation of the disarm state that this interrupt status is disengaged, select the current potential of output signal according to input signal.

Thus, interrupt condition is accepted circuit 20b by do not determine the logic of output signal according to input signal according to the interrupt signal of being imported, and can guarantee the reliability of output signal.

And according to the present invention, in foregoing invention, comparator 30 detects the input signal of being imported.Interrupt condition is accepted the output signal Sg that circuit 20a is transfused to comparator 30, and generates the output signal Vout that exports according to the interrupt signal from interrupt condition

generative circuit

10a, 10b, 10c and 10d input.

Thus, carry out determination processing by 30 pairs of input signals of comparator from sensor circuit.Flase drop during the power connection that comprises in the signal of comparator 30 output is surveyed signal and can be accepted circuit 20a blocking by interrupt condition, and can not export as detection signal.

And according to the present invention, in foregoing invention, comparator 30 detects the input signal of being imported.Interrupt condition is accepted circuit 20b and is generated signal Sa ' and the signal Sf ' that exports according to the interrupt signal (control signal Scont) from interrupt condition

generative circuit

10a and 10b input, and output signal is input to comparator 30.

Thus, survey signal, accept the input signal of circuit 20a blocking, can make from the signal of comparator 30 outputs that are connected with the back level not comprise flase drop survey signal from sensor circuit by utilizing interrupt condition at the flase drop that produces when the power connection.

And, according to the present invention, sensor device 1 utilize any described testing circuit 100,200,300,400,500 and 600 in the foregoing invention export with by the corresponding information of transducer 900 detected physical quantitys, and detect the information of this physical quantity of expression.

Thus, by avoiding to guarantee the reliability of output signal from the nondeterministic statement of signal the power connection process of sensor device 1 output.Then, sensor device 1 constitutes by using each testing circuit, can save electric power.By constituting the testing circuit that comprises direct detection supply voltage VDD, can in the scale of cutting down testing circuit, guarantee to detect quality.

And according to the present invention, in foregoing invention, transducer 900 is temperature sensors of detected temperatures.

Thus, sensor device 1 can form the temperature sensor of detected temperatures, by avoiding can guaranteeing the reliability of output signal from the nondeterministic statement of signal the power connection process of sensor device 1 output.Then, sensor device 1 constitutes by using each testing circuit, can save electric power.By constituting the testing circuit that comprises direct detection supply voltage VDD, can in the scale of cutting down testing circuit, guarantee to detect quality.

In addition, the invention is not restricted to the respective embodiments described above, can in the scope that does not deviate from purport of the present invention, change.Voltage setting by being connected of testing circuit 100,200,300,400,500 and 600 comparators that have 30, offset comparator 11, input signal etc. can also make the polarity inversion of output signal.

In addition, testing circuit of the present invention is equivalent to testing circuit 100,200,300,400,500 and 600.And interrupt condition generative circuit of the present invention is equivalent to interrupt condition generative circuit 10a, 10b.And interrupt condition of the present invention is accepted circuit and is equivalent to interrupt condition and accepts circuit 20a, 20b.And decision circuit of the present invention is equivalent to offset comparator 11.And holding circuit of the present invention is equivalent to rest-set flip-flop 14.And sensor device of the present invention is equivalent to sensor device 1.And test section of the present invention is equivalent to transducer 900.

Claims

1. testing circuit, this testing circuit detect the input signal imported and with output signal output, it is characterized in that this testing circuit has:

The interrupt condition generative circuit, supply voltage that is provided directly is provided for it, and exports interrupt signal be converted to the voltage range of regulation at this supply voltage before; And

Interrupt condition is accepted circuit, it is before the interruption based on described interrupt signal is disengaged, do not allow to export described input signal and export predetermined voltage as output signal, when the interruption based on this interrupt signal was disengaged, permission was exported described input signal and it is exported as output signal.

2. testing circuit according to claim 1, it is characterized in that, described interrupt condition generative circuit has decision circuit, this decision circuit will be set at an input by the drift potential that the potential difference of predesignating is represented, do not reach the described interrupt signal of output under the situation of this drift potential in the potential difference of two signals being imported, reach in this potential difference under the situation of this drift potential and remove described interrupt signal.

3. testing circuit according to claim 1 and 2 is characterized in that, described interrupt condition generative circuit is being removed described interrupt signal playing from power connection through the described interrupt signal of output till the time of predesignating through after this time.

4. testing circuit according to claim 1 and 2, it is characterized in that, described interrupt condition generative circuit is by the comparison based on the threshold potential of predesignating, do not reach the described interrupt signal of output under the situation of this threshold potential at described supply voltage, reach at this supply voltage under the situation of this threshold potential and remove described interrupt signal.

5. testing circuit according to claim 4 is characterized in that, the described threshold potential of predesignating is by the semiconductor element preset threshold current potential that carries out switch motion.

6. testing circuit according to claim 1 is characterized in that, described interrupt condition generative circuit has the holding circuit of the state that keeps described interrupt signal.

7. testing circuit according to claim 6, it is characterized in that, described interrupt condition generative circuit is playing the indication that resets that described holding circuit is resetted through output till the time of predesignating from power connection, removing the described indication that resets through after this time

Reach under the situation of the predetermined voltage of predesignating detecting described supply voltage, described holding circuit is carried out set remove described interrupt signal.

8. testing circuit according to claim 6, it is characterized in that, described interrupt condition generative circuit is by the comparison based on the threshold potential of predesignating, do not reach the indication that resets that output resets described holding circuit under the situation of this threshold potential at described supply voltage, reach at this supply voltage and remove the described indication that resets under the situation of this threshold potential

9. testing circuit according to claim 1, it is characterized in that, described interrupt condition is accepted circuit and was not allowed to export described input signal before the interruption based on described interrupt signal is disengaged and export under the situation of predetermined voltage as the interrupt status of output signal being set to, the signal of output predetermined logic, under the situation of the disarm state that this interrupt status is disengaged, select the logic of the signal exported according to described input signal.

10. testing circuit according to claim 1, it is characterized in that, described interrupt condition is accepted circuit and was not allowed to export described input signal before the interruption based on described interrupt signal is disengaged and export under the situation of predetermined voltage as the interrupt status of output signal being set to, the signal of output predetermined potential, under the situation of the disarm state that this interrupt status is disengaged, select the current potential of the signal exported according to described input signal.

11. testing circuit according to claim 1 is characterized in that,

Described testing circuit also has the comparator that detects described input signal,

Described interrupt condition is accepted the output signal that circuit is transfused to described comparator, and generates output signal according to described interrupt signal.

12. testing circuit according to claim 1 is characterized in that,

Described interrupt condition is accepted circuit and is generated output signal according to described interrupt signal, and output signal is input to described comparator.

13. a sensor device is characterized in that, this sensor device has:

Any described testing circuit in the claim 1～12; And

Test section, the information that its output is corresponding with detected physical quantity.

14. sensor device according to claim 13 is characterized in that, described test section is the temperature sensor of detected temperatures.