CN101789410B - Upright packaging structure with paddle exposed out of chip for heat dissipation block - Google Patents
Upright packaging structure with paddle exposed out of chip for heat dissipation block Download PDFInfo
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- CN101789410B CN101789410B CN 201010113384 CN201010113384A CN101789410B CN 101789410 B CN101789410 B CN 101789410B CN 201010113384 CN201010113384 CN 201010113384 CN 201010113384 A CN201010113384 A CN 201010113384A CN 101789410 B CN101789410 B CN 101789410B
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- Prior art keywords
- chip
- heat dissipation
- metal
- heat
- dissipation block
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention relates to an upright packaging structure with a paddle exposing a chip for a heat dissipation block, comprising a chip (3), a metal paddle (1) carried below the chip, a metal inner pin (4), a metal wire (5) interconnecting signals between the chip and the metal inner pin, a conductive or nonconductive heat-conducting bonding substance I (2) between the chip and the metal paddle and a plastic package body (8), wherein the metal paddle (1) exposes the plastic package body (8). The packaging structure is characterized in that a heat dissipation block (7) is arranged above the chip (3) and a conductive or nonconductive heat-conducting bonding substance II (6) is embedded between the heat dissipation block (7) and the chip (3). Through adding the heat dissipation block above the chip to play the function of dissipating the high heat, the invention has strong ability of heat dissipation so that the heat of the chip can be quickly conducted to the outside of the plastic package body and the quick ageing, or even burning or burning-out of the chip is avoided.
Description
(1) technical field
The present invention relates to a kind of upright packaging structure with paddle exposed out of chip for heat dissipation block.Belong to the semiconductor packaging field.
(2) background technology
The radiating mode of traditional Chip Packaging form mainly be to have adopted the Metal Substrate island of chip below as heat radiation conduction instrument or approach, and there is following not enough point in the heat radiation of this conventional package mode conduction:
1, Metal Substrate island volume is too little
The Metal Substrate island is in the conventional package form, in order to pursue the reliability safety of packaging body, nearly all adopted the Metal Substrate island to be embedded in the packaging body, and in limited packaging body, to imbed the interior pin (as shown in Figures 1 and 2) of metal of Metal Substrate island and signal, power supply conduction usefulness simultaneously, very the little so effective area on Metal Substrate island and volume just seem, and the function of the heat radiation of high heat also will be served as in the Metal Substrate island simultaneously, will seem deficiency more.
2, baried type Metal Substrate island (as shown in Figures 1 and 2)
The Metal Substrate island is in the conventional package form, in order to pursue the reliability safety of packaging body, nearly all adopted the Metal Substrate island to be embedded in the packaging body, and the Metal Substrate island is about dependence or four fine support bars in corner fix or support metal Ji Dao, also because the characteristic of this fine support bar, the heat that has caused the Metal Substrate island to be absorbed from the chip, can't conduct out from fine support bar fast, so the heat of chip can't or be transmitted to the packaging body external world fast, caused the life-span quick aging of chip even burn or burnt out.
3, Metal Substrate island exposed type (as shown in Figures 3 and 4)
Though expose on the Metal Substrate island, can provide also will good heat-sinking capability than the heat sinking function of baried type, because the volume on Metal Substrate island and area still very little in packaging body, so heat dissipation capability can be provided, still very limited.
(3) summary of the invention
The objective of the invention is to overcome above-mentioned deficiency, providing a kind of can provide heat dissipation capability strong upright packaging structure with paddle exposed out of chip for heat dissipation block.
The object of the present invention is achieved like this: a kind of upright packaging structure with paddle exposed out of chip for heat dissipation block, include chip, the Metal Substrate island of being carried of chip below, the interior pin of metal, chip to conduction or nonconducting heat conduction bonding material I and plastic-sealed body between wire, chip and the Metal Substrate island of the signal interconnection of the interior pin of metal, the base island exposed plastic-sealed body of described metal, above described chip, be provided with radiating block, be equipped with conduction or nonconducting heat conduction bonding material II between this radiating block and the described chip.
The invention has the beneficial effects as follows:
The present invention serves as the function of the heat radiation of high heat by addition radiating block above chip, can provide heat dissipation capability strong, makes the heat of chip can be transmitted to the packaging body external world fast.Can be applied in and make it become height or superelevation heat radiation (High Thermal or Super High Thermal) ability on the packaging body of general packing forms and the packaging technology, can become SHT-FBP/QFN as FBP can become SHT-QFN/BGA and can become SHT-BGA/CSP and can become SHT-CSP ...Avoided the life-span quick aging of chip even burn or burnt out.
(4) description of drawings
Fig. 1 is Metal Substrate island baried type chip-packaging structure schematic diagram in the past.
Fig. 2 is the vertical view of Fig. 1.
Fig. 3 is Metal Substrate island exposed type chip-packaging structure schematic diagram in the past.
Fig. 4 is the vertical view of Fig. 3.
Fig. 5 is a upright packaging structure with paddle exposed out of chip for heat dissipation block schematic diagram of the present invention.
Reference numeral among the figure:
(5) embodiment
Referring to Fig. 5, Fig. 5 is a upright packaging structure with paddle exposed out of chip for heat dissipation block schematic diagram of the present invention.As seen from Figure 5, upright packaging structure with paddle exposed out of chip for heat dissipation block of the present invention, include chip 3, the Metal Substrate island 1 of being carried of chip below, the interior pin 4 of metal, chip to conduction or nonconducting heat conduction bonding material I 2 and plastic-sealed body 8 between wire 5, chip and the Metal Substrate island of the signal interconnection of the interior pin of metal, plastic-sealed body 8 is exposed on described Metal Substrate island 1, above described chip 3, be provided with radiating block 7, be equipped with conduction or nonconducting heat conduction bonding material II 6 between this radiating block 7 and the described chip 3.
The material of described radiating block 7 can be copper, aluminium, pottery or alloy etc.
Claims (2)
1. upright packaging structure with paddle exposed out of chip for heat dissipation block, include chip (3), the Metal Substrate island (1) of being carried of chip below, pin (4) in the metal, chip is to the wire (5) of the signal interconnection of the interior pin of metal, conduction between chip and the Metal Substrate island or nonconducting heat conduction bonding material I (2) and plastic-sealed body (8), plastic-sealed body (8) is exposed on described Metal Substrate island (1), it is characterized in that being provided with radiating block (7), be equipped with conduction or nonconducting heat conduction bonding material II (6) between this radiating block (7) and the described chip (3) in described chip (3) top.
2. a kind of upright packaging structure with paddle exposed out of chip for heat dissipation block according to claim 1, the material that it is characterized in that described radiating block (7) is copper, aluminium, pottery or alloy.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
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CN 201010113384 CN101789410B (en) | 2010-01-26 | 2010-01-26 | Upright packaging structure with paddle exposed out of chip for heat dissipation block |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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CN 201010113384 CN101789410B (en) | 2010-01-26 | 2010-01-26 | Upright packaging structure with paddle exposed out of chip for heat dissipation block |
Publications (2)
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CN101789410A CN101789410A (en) | 2010-07-28 |
CN101789410B true CN101789410B (en) | 2011-10-05 |
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CN 201010113384 Active CN101789410B (en) | 2010-01-26 | 2010-01-26 | Upright packaging structure with paddle exposed out of chip for heat dissipation block |
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Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN201623084U (en) * | 2010-01-26 | 2010-11-03 | 江苏长电科技股份有限公司 | Normal chip packaging structure with exposed substrate and heat sink |
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2010
- 2010-01-26 CN CN 201010113384 patent/CN101789410B/en active Active
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN201623084U (en) * | 2010-01-26 | 2010-11-03 | 江苏长电科技股份有限公司 | Normal chip packaging structure with exposed substrate and heat sink |
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CN101789410A (en) | 2010-07-28 |
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Effective date of registration: 20170224 Address after: 239000 Century Avenue, Anhui, Chuzhou, No. 999 Patentee after: Changjiang Electronics Technology (Chuzhou) Co., Ltd. Address before: 214434 Binjiang Middle Road, Jiangyin Development Zone, Jiangsu, China, 275 Patentee before: Jiangsu Changjiang Electronics Technology Co., Ltd. |