CN201754402U - Normal printed circuit board chip packaging structure with rectangular heat sink having locking hole - Google Patents
Normal printed circuit board chip packaging structure with rectangular heat sink having locking hole Download PDFInfo
- Publication number
- CN201754402U CN201754402U CN 201020117743 CN201020117743U CN201754402U CN 201754402 U CN201754402 U CN 201754402U CN 201020117743 CN201020117743 CN 201020117743 CN 201020117743 U CN201020117743 U CN 201020117743U CN 201754402 U CN201754402 U CN 201754402U
- Authority
- CN
- China
- Prior art keywords
- chip
- circuit board
- printed circuit
- heat sink
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
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Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4912—Layout
- H01L2224/49171—Fan-out arrangements
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73215—Layer and wire connectors
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The utility model relates to a normal printed circuit board chip packaging structure with a rectangular heat sink having locking hole, which comprises a chip (3), a single-layer or multi-layer printed circuit board (9), metal wires (5), conductive or non-conductive heat conducting adhesives I (2) and a plastic package body (8), wherein the single-layer or multi-layer printed circuit board (9) is supported below the chip, the metal wires (5) are used for signal interconnection from the chip to the single-layer or multi-layer printed circuit board, and the conductive or non-conductive heat conducting adhesives I (2) are arranged between the chip and the single-layer or multi-layer printed circuit board (9). The packaging structure is characterized in that the heat sink (7) with the locking hole (7.1) is arranged above the chip (3), and conductive or non-conductive heat conducting adhesives II (2) are embedded between the heat sink (7) and the chip (3), wherein the heat sink (7) is in a rectangular structure. By adding the heat sink on the chip to realize radiating high heat, the packaging structure is high in radiating capacity, enables heat of the chip to be rapidly conducted to the outside of the package body, and avoids rapid aging and even burning or burnout of the chip.
Description
(1) technical field
The utility model relates to a kind of chip of printed circuit board formal dress band lock hole rectangular heat dissipation block encapsulating structure.Belong to the semiconductor packaging field.
(2) background technology
The radiating mode of traditional Chip Packaging form mainly be to have adopted the Metal Substrate island of chip below as heat radiation conduction instrument or approach, and there is following not enough point in the heat radiation of this conventional package mode conduction:
1, Metal Substrate island volume is too little
The Metal Substrate island is in the conventional package form, in order to pursue the reliability safety of packaging body, nearly all adopted the Metal Substrate island to be embedded in the packaging body, and in limited packaging body, to imbed the interior pin (as shown in Figures 1 and 2) of metal of Metal Substrate island and signal, power supply conduction usefulness simultaneously, very the little so effective area on Metal Substrate island and volume just seem, and the function of the heat radiation of high heat also will be served as in the Metal Substrate island simultaneously, will seem deficiency more.
2, baried type Metal Substrate island (as shown in Figures 1 and 2)
The Metal Substrate island is in the conventional package form, in order to pursue the reliability safety of packaging body, nearly all adopted the Metal Substrate island to be embedded in the packaging body, and the Metal Substrate island is about dependence or four fine support bars in corner fix or support metal Ji Dao, also because the characteristic of this fine support bar, the heat that has caused the Metal Substrate island to be absorbed from the chip, can't conduct out from fine support bar fast, so the heat of chip can't or be transmitted to the packaging body external world fast, caused the life-span quick aging of chip even burn or burnt out.
3, Metal Substrate island exposed type (as shown in Figures 3 and 4)
Though expose on the Metal Substrate island, can provide also will good heat-sinking capability than the heat sinking function of baried type, because the volume on Metal Substrate island and area still very little in packaging body, so heat dissipation capability can be provided, still very limited.
(3) summary of the invention
The purpose of this utility model is to overcome above-mentioned deficiency, and providing a kind of can provide heat dissipation capability strong chip of printed circuit board formal dress band lock hole rectangular heat dissipation block encapsulating structure.
The purpose of this utility model is achieved in that a kind of chip of printed circuit board formal dress band lock hole rectangular heat dissipation block encapsulating structure, include chip, the single or multiple lift printed substrate that is carried of chip below, the wire that chip is used to the signal interconnection of single or multiple lift printed substrate, conduction between chip and the described single or multiple lift printed substrate or nonconducting heat conduction bonding material I and plastic-sealed body, above described chip, be provided with radiating block, this radiating block has lock hole, is equipped with conduction or nonconducting heat conduction bonding material II between this radiating block and the described chip; This radiating block is square type structure.
The beneficial effects of the utility model are:
The utility model is served as the function of the heat radiation of high heat by addition radiating block above chip, can provide heat dissipation capability strong, makes the heat of chip can be transmitted to the packaging body external world fast.Can be applied in and make it become height or superelevation heat radiation (High Thermal or Super High Thermal) ability on the packaging body of general packing forms and the packaging technology, can become SHT-FBP/QFN as FBP can become SHT-QFN/BGA and can become SHT-BGA/CSP and can become SHT-CSP ...Avoided the life-span quick aging of chip even burn or burnt out.
(4) description of drawings
Fig. 1 is Metal Substrate island baried type chip-packaging structure schematic diagram in the past.
Fig. 2 is the vertical view of Fig. 1.
Fig. 3 is Metal Substrate island exposed type chip-packaging structure schematic diagram in the past.
Fig. 4 is the vertical view of Fig. 3.
Fig. 5 is the utility model chip of printed circuit board formal dress band lock hole rectangular heat dissipation block encapsulating structure schematic diagram.
Reference numeral among the figure:
Conduction or nonconducting heat conduction bonding material I 2, chip 3, wire 5, conduction or nonconducting heat conduction bonding material II 6, radiating block 7, lock hole 7.1, plastic-sealed body 8, printed substrate 9.
(5) embodiment
Referring to Fig. 5, Fig. 5 is the utility model chip of printed circuit board formal dress band lock hole rectangular heat dissipation block encapsulating structure schematic diagram.As seen from Figure 5, the utility model chip of printed circuit board formal dress band lock hole rectangular heat dissipation block encapsulating structure, include chip 3, the single or multiple lift printed substrate 9 that is carried of chip below, the wire 5 that chip is used to the signal interconnection of single or multiple lift printed substrate, conduction between chip and the described single or multiple lift printed substrate 9 or nonconducting heat conduction bonding material I 2 and plastic-sealed body 8, above described chip 3, be provided with radiating block 7, this radiating block 7 has lock hole 7.1, is equipped with conduction or nonconducting heat conduction bonding material II 6 between this radiating block 7 and the described chip 3; This radiating block 7 is square type structure.
The material of described radiating block 7 can be copper, aluminium, pottery or alloy etc.
Claims (2)
1. chip of printed circuit board formal dress band lock hole rectangular heat dissipation block encapsulating structure, include chip (3), the single or multiple lift printed substrate (9) that is carried of chip below, the wire that chip is used to the signal interconnection of single or multiple lift printed substrate (5), conduction between chip and the described single or multiple lift printed substrate (9) or nonconducting heat conduction bonding material I (2) and plastic-sealed body (8), it is characterized in that being provided with radiating block (7) in described chip (3) top, this radiating block (7) has lock hole (7.1), is equipped with conduction or nonconducting heat conduction bonding material II (6) between this radiating block (7) and the described chip (3); This radiating block (7) is square type structure.
2. a kind of chip of printed circuit board formal dress band lock hole rectangular heat dissipation block encapsulating structure according to claim 1, the material that it is characterized in that described radiating block (7) is copper, aluminium, pottery or alloy.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201020117743 CN201754402U (en) | 2010-01-27 | 2010-01-27 | Normal printed circuit board chip packaging structure with rectangular heat sink having locking hole |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN 201020117743 CN201754402U (en) | 2010-01-27 | 2010-01-27 | Normal printed circuit board chip packaging structure with rectangular heat sink having locking hole |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN201754402U true CN201754402U (en) | 2011-03-02 |
Family
ID=43622134
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN 201020117743 Expired - Fee Related CN201754402U (en) | 2010-01-27 | 2010-01-27 | Normal printed circuit board chip packaging structure with rectangular heat sink having locking hole |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN201754402U (en) |
-
2010
- 2010-01-27 CN CN 201020117743 patent/CN201754402U/en not_active Expired - Fee Related
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| C14 | Grant of patent or utility model | ||
| GR01 | Patent grant | ||
| C17 | Cessation of patent right | ||
| CF01 | Termination of patent right due to non-payment of annual fee |
Granted publication date: 20110302 Termination date: 20140127 |